- always enable options MIPS3_ENABLE_CLOCK_INTR and just clear the compare
register in cpu_intr() to make CLKF_BASE() works
properly
- prepare only possible number of cpu_inttab
- use macro for interrupt priority number passed to arc_set_intr()
to avoid confusion
- merge arc_hardware_intr() into cpu_intr()
- check independent timer interrupt first in cpu_intr()
- tweak MIPS_SR_INT_IE before calling hardclock timer handlers so that
spllowersoftclock(9) will be invoked properly in hardclock(9)
- reenable interrupt for timer in cpu_intr() rather than each timer handlers
okay'ed by soda.
Note the real fix is to make CLKF_BASE() check all independent
interrupt sources including jazz and isa devices.
so that PCI devices over ppb(4) work properly on PCI based NEC machines.
Tested on my NEC JC94 (Express5800/230) and 3Com 3C982-TXM,
which has a DEC/Intel 21154 PCI-PCI bridge and two 3C920 Ethernet chips.
in the TODO file. At least this fixes "sn0: receive buffers exhausted"
messages on my NEC-JC94.
XXX: does anyone know what "Dont reenable" comment means, which was
XXX: there since initial import of pica (not arc).
which bustype should be attached with a specific call to config_found()
(from a "mainbus" or a bus bridge).
Do it for isa/eisa/mca and pci/agp for now. These buses all attach to
an mi interface attribute "isabus", "eisabus" etc., and the autoconf
framework now allows to specify an interface attribute on config_found()
and config_search(), which limits the search of matching config data
to these which attach to that specific attribute.
So we basically have to call config_found_ia(..., "foobus", ...) where
such a bus is attached.
As a consequence, where a "mainbus" or alike also attaches other
devices (eg CPUs) which do not attach to a specific attribute yet,
we need at least pass an attribute name (different from "foobus") so
that the foo bus is not found at these places. This made some minor
changes necessary which are not obviously related to the mentioned buses.
enabled on amd64). Add a dmat64 field to various PCI attach structures,
and pass it down where needed. Implement a simple new function called
pci_dma64_available(pa) to test if 64bit DMA addresses may be used.
This returns 1 iff _PCI_HAVE_DMA64 is defined in <machine/pci_machdep.h>,
and there is more than 4G of memory.
NULL for root PCI busses. For busses behind a bridge, it points to
a persistent copy of the bridge's pcitag_t. This can be very useful
for machine-dependent PCI bus enumeration code.
* Implement a machine-dependent pci_enumerate_bus() for sparc64 which
uses OFW device nodes to enumerate the bus. When a PCI bus that is
behind a bridge is attached, pci_attach_hook() allocates a new PCI
chipset tag for the new bus and sets it's "curnode" to the OFW node
of the bridge. This is used as a starting point when enumerating
that bus. Root busses get the OFW node of the host bridge (psycho).
* Garbage-collect "ofpci" and "ofppb" from the sparc64 port.
console initialization, from "struct necpb_config necpb_configuration;"
to "struct necpb_context necpb_main_context".
to resolve naming conflicts with "struct XXX_config *XXX_conf;"
which describes platform-dependent configuration variants.
console initialization, from "struct necpb_config necpb_configuration;"
to "struct necpb_context necpb_main_context".
to resolve naming conflicts with "struct XXX_config *XXX_conf;"
which describes platform-dependent configuration variants.
them define __HAVE_PCIIDE_MACHDEP_COMPAT_INTR_ESTABLISH
in pci_machdep.h and pciide_map_compat_intr() only calls
pciide_machdep_compat_intr_establish() if that preprocessor
define exists.
Ports that don't need to do this no longer need to supply a
dummy function.
<vm/pglist.h> -> <uvm/uvm_pglist.h>
<vm/vm_inherit.h> -> <uvm/uvm_inherit.h>
<vm/vm_kern.h> -> into <uvm/uvm_extern.h>
<vm/vm_object.h> -> nothing
<vm/vm_pager.h> -> into <uvm/uvm_pager.h>
also includes a bunch of <vm/vm_page.h> include removals (due to redudancy
with <vm/vm.h>), and a scattering of other similar headers.
