caveats, but works quite well in a lot of MP cases, and all
UP cases that I have tested. Parts of this will hopefully be
reworked in the not-too-distant future.
NULL for root PCI busses. For busses behind a bridge, it points to
a persistent copy of the bridge's pcitag_t. This can be very useful
for machine-dependent PCI bus enumeration code.
* Implement a machine-dependent pci_enumerate_bus() for sparc64 which
uses OFW device nodes to enumerate the bus. When a PCI bus that is
behind a bridge is attached, pci_attach_hook() allocates a new PCI
chipset tag for the new bus and sets it's "curnode" to the OFW node
of the bridge. This is used as a starting point when enumerating
that bus. Root busses get the OFW node of the host bridge (psycho).
* Garbage-collect "ofpci" and "ofppb" from the sparc64 port.
-remove the check for i810's internal graphics completely: we'll attach
AGP whether in GFX or AGP mode anyway, and the SMRAM register test
was of questionable value (should have masked with 0xc0, but even then
the builtin graphics appeared enabled although I used an external
PCI card)
be spread over several devices, and the phcb is usually the main one.
Add agp_machdep.c file which implements MD agp functions (currently
just agp_flush_cache).
setting for the "Idle/Pipeline DRAM Leadoff Timing (IPLDT)" parameter
(bits 9:8) is 01. Unfortunately, some BIOSs do not set these bits properly.
Based on a hint from OpenBSD.
driver is a place-holder, which will nicely print version information
about your PCI chipset (try with "options PCIVERBOSE"). Eventually,
this can be used to enable/disable features/bugs of individual PCI
chipsets.
fvdl