-attach auxilary PCI buses at the 450NX chipset,
tested by hubertf in a small configuration (1 PXB - 2 PCI buses) -being here, remove the per-VID/DID matching code which was commented out for a while
This commit is contained in:
drochner
parent
8fedbd8497
commit
d5d280d015
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@ -1,4 +1,4 @@
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/* $NetBSD: pchb.c,v 1.17 1998/10/10 14:12:21 drochner Exp $ */
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/* $NetBSD: pchb.c,v 1.18 2000/05/11 16:44:14 drochner Exp $ */
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/*-
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* Copyright (c) 1996, 1998 The NetBSD Foundation, Inc.
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@ -82,93 +82,6 @@ pchbmatch(parent, match, aux)
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{
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struct pci_attach_args *pa = aux;
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#if 0
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/*
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* PCI host bridges are matched on class/subclass.
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* This list contains only the bridges where correct
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* (or incorrect) behaviour is not yet confirmed.
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*/
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switch (PCI_VENDOR(pa->pa_id)) {
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case PCI_VENDOR_INTEL:
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_INTEL_CDC:
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case PCI_PRODUCT_INTEL_PCMC:
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case PCI_PRODUCT_INTEL_82437FX:
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case PCI_PRODUCT_INTEL_82437MX:
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case PCI_PRODUCT_INTEL_82437VX:
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case PCI_PRODUCT_INTEL_82439HX:
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case PCI_PRODUCT_INTEL_82441FX:
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case PCI_PRODUCT_INTEL_82443BX:
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case PCI_PRODUCT_INTEL_82443LX:
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case PCI_PRODUCT_INTEL_PCI450_PB:
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case PCI_PRODUCT_INTEL_PCI450_MC:
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return (1);
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}
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break;
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case PCI_VENDOR_UMC:
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_UMC_UM8891N:
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case PCI_PRODUCT_UMC_UM8881F:
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return (1);
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}
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break;
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case PCI_VENDOR_ACC:
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_ACC_2188:
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return (1);
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}
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break;
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case PCI_VENDOR_ACER:
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_ACER_M1435:
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return (1);
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}
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break;
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case PCI_VENDOR_ALI:
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_ALI_M1445:
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case PCI_PRODUCT_ALI_M1451:
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case PCI_PRODUCT_ALI_M1461:
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case PCI_PRODUCT_ALI_M1541:
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return (1);
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}
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break;
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case PCI_VENDOR_COMPAQ:
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_COMPAQ_TRIFLEX1:
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case PCI_PRODUCT_COMPAQ_TRIFLEX2:
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case PCI_PRODUCT_COMPAQ_TRIFLEX4:
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return (1);
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}
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break;
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case PCI_VENDOR_NEXGEN:
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_NEXGEN_NX82C501:
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return (1);
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}
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break;
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case PCI_VENDOR_NKK:
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_NKK_NDR4600:
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return (1);
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}
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break;
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case PCI_VENDOR_TOSHIBA:
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_TOSHIBA_R4X00:
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return (1);
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}
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break;
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case PCI_VENDOR_VIATECH:
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_VIATECH_VT82C570M:
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case PCI_PRODUCT_VIATECH_VT82C595:
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return (1);
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}
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break;
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}
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#endif
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if (PCI_CLASS(pa->pa_class) == PCI_CLASS_BRIDGE &&
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PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_BRIDGE_HOST) {
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return (1);
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@ -187,6 +100,7 @@ pchbattach(parent, self, aux)
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struct pcibus_attach_args pba;
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pcireg_t bcreg;
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u_char bdnum, pbnum;
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pcitag_t tag;
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printf("\n");
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@ -244,6 +158,52 @@ pchbattach(parent, self, aux)
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self->dv_xname);
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}
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break;
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case PCI_PRODUCT_INTEL_82451NX_PXB:
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/*
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* The NX chipset supports up to 2 "PXB" chips
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* which can drive 2 PCI buses each. Each bus
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* shows up as logical PCI device, with fixed
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* device numbers between 18 and 21.
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* See the datasheet at
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ftp://download.intel.com/design/chipsets/datashts/24377102.pdf
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* for details.
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* (It would be easier to attach all the buses
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* at the MIOC, but less aesthetical imho.)
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*/
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pbnum = 0;
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switch (pa->pa_device) {
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case 18: /* PXB 0 bus A - primary bus */
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break;
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case 19: /* PXB 0 bus B */
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/* read SUBA0 from MIOC */
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tag = pci_make_tag(pa->pa_pc, 0, 16, 0);
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bcreg = pci_conf_read(pa->pa_pc, tag, 0xd0);
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pbnum = ((bcreg & 0x0000ff00) >> 8) + 1;
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break;
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case 20: /* PXB 1 bus A */
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/* read BUSNO1 from MIOC */
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tag = pci_make_tag(pa->pa_pc, 0, 16, 0);
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bcreg = pci_conf_read(pa->pa_pc, tag, 0xd0);
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pbnum = (bcreg & 0xff000000) >> 24;
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break;
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case 21: /* PXB 1 bus B */
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/* read SUBA1 from MIOC */
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tag = pci_make_tag(pa->pa_pc, 0, 16, 0);
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bcreg = pci_conf_read(pa->pa_pc, tag, 0xd4);
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pbnum = (bcreg & 0x000000ff) + 1;
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break;
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}
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if (pbnum != 0) {
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pba.pba_busname = "pci";
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pba.pba_iot = pa->pa_iot;
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pba.pba_memt = pa->pa_memt;
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pba.pba_dmat = pa->pa_dmat;
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pba.pba_bus = pbnum;
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pba.pba_flags = pci_bus_flags();
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pba.pba_pc = pa->pa_pc;
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config_found(self, &pba, pchb_print);
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}
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break;
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}
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/*
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* XXX: vendor=PEQUR, device=0x0005 - host bridge with
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