- Clean up the way cpu-specific tlb/cache functions are configured
and used.
- Add a workaround for a problem whereby cpu* at superhyway? fails
to probe.
- Print more info about the cpu/cache.
- Move the RESVEC handlers back into generic sh5 code and ditch
the panic stack hack.
- Make the on-chip SCIF device the default console on Cayman.
- Add experimental support for booting via a standalone bootstrap
program (not yet committed) and using the boot parameters passed
in by it.
- Add a few more SH elf constants.
- Tick a couple of items off the TODO list.
came from kernel mode. Otherwise, print details of the exception
and send a SIGILL to the process.
The is necessary now that debug exceptions are handled here.
possible to use alternate system call tables. This is usefull for
displaying correctly the arguments in Mach binaries traces.
If NULL is given, then the regular systam call table for the process is used.
under some circumstances, leave turds in the icache following vmspace
teardown.
It's not yet clear if this is a pmap bug or a toolchain problem since
the hack is unecessary when the kernel is compiled with -O0. Of course
that could just be masking the problem due to increased icache pressure...
- Overhaul the TLB management code such that we now keep track of
the exact TLB slot at which a mapping was inserted, both for user-
space and kernel mappings. This addresses #2 on the TODO list.
original system call number, which can be negative for a Mach trap.
We cannot just replace code by realcode, because ktrsyscall uses it as
an index in the system call table, thus crashing the kernel when the
value is negative.
unmanaged mappings) so we can deal with cache aliases, make sure to
skip unmanaged/wired mappings (added via pmap_kenter_pa()) when doing
things like pmap_page_protect().
kqueue provides a stateful and efficient event notification framework
currently supported events include socket, file, directory, fifo,
pipe, tty and device changes, and monitoring of processes and signals
kqueue is supported by all writable filesystems in NetBSD tree
(with exception of Coda) and all device drivers supporting poll(2)
based on work done by Jonathan Lemon for FreeBSD
initial NetBSD port done by Luke Mewburn and Jason Thorpe
- Shift a leading misaligned quad to compensate for the implicit shift
in the "ldlo.q" instruction. (And remove the "XXX:" comment which correctly
hinted that this might be necessary).
- Clean up some comments.
alignment code. (There was nothing wrong with the original code path
other than it was slightly slower if the buffer was already aligned).
Also, catch another corner case related to alignment/length of the
last 1-7 bytes.
using a "movi imm, Rn / sub R15, RN, R15" pair. This is how the compiler
creates frames which are too big to fit in the immediate field of "addi";
something which happens a lot with -O0 ...
While I'm here, add a simple heuristic to detect infinite loops caused by
tracing back through some non-leaf asm routines which don't set up frames.
- Allocate interrupt handles dynamically from a pool(9) to reduce the
number of TLB misses during interrupt dispatch.
- Fully support evcnt(9) in all interrupt dispatchers.
- Use the PVO_CACHEABLE flag in the pvo as the One True Indicator of
the cacheable status of a mapping instead of peeking at the PTEH.
- Don't inline some of the larger routines, in an effort to appease
the somewhat buggy compiler.
- Fix some comments.
- Fix some casts.
- Add a bunch more debugging instrumentation.
- Move usr, sr, pc, and the branch-target registers to the top of
the listing so that it is no longer necessary to scroll through
64 integer registers to see them.
The main bug fixes are:
- pmap_pvo_remove() must calculate the kipt index if the idx param is -1.
- Don't assume that if a pmap's ASID generation is out of date that we
can skip purging/invalidating the cache for any of its constituent
mappings. At this time, the ASID generation just indicates that none
of its mappings are in the TLB. However, there may still be some valid
cache entries for them.
Finally, the subtle NFS and buffer cache corruption problems disappear.
useful should one occur.
- Manually poke some config values into the sh5pci host bridge's
config registers since it doesn't appear in config. space.
- Reserve the first 256 bytes of i/o space to avoid assigning i/o
address 0 to any cards.
- Slight tweak to the initialisation code after consultation with
SuperH and the linux driver.
map accurately tracks the same flag in the segments belonging to it.
The map's copy can be set only if all the segments are coherent.
This finally gets NFS writes fully working on my PCI ex(4) card.
- Track unmanaged mappings of RAM more closely by allocating a pvo
for them. This allows us to check more accurately for multiple
cache-mode-incompatible mappings.
- As part of the above, implement pmap_steal_memory(). This has the
beneficial side-effect of moving a fair chunk of kernel data
structures into KSEG0.
pretty much working, at least for non-NFS use.
With NFS, it fails under pressure probably due to operand cache aliases
between KSEG0 and regular 4KB mappings elsewhere. Sigh.
scw