Commit Graph

30552 Commits

Author SHA1 Message Date
thorpej e0ea696615 * Add support for running the IQ80310 kernel where KERNEL_BASE !=
physical memory start.  Garbage-collect some cruft while here.
* Move the kernel up to 0xc0000000, giving a 1G/3G kernel/user split.
* Adjust the Integrator startup code accordingly.
2002-03-03 21:22:15 +00:00
thorpej e23381908a inittodr(): Actually initialize time from the file system time. 2002-03-03 21:10:40 +00:00
mhitch d616d3990b Enable transmit error and EPH interrupt, and reset NIC on EPH interrupt.
Fixes a source of lost interrupts.
2002-03-03 18:21:37 +00:00
uch bf5bf0be48 remove obsolete headers. 2002-03-03 14:59:55 +00:00
uch 0894ee8f62 use GENERIC. 2002-03-03 14:45:21 +00:00
uch 0d29f32a67 clean up config files. 2002-03-03 14:36:48 +00:00
uch 3c9bf76936 make it work correctly when both hd64461uart and hd64465uart are enabled. 2002-03-03 14:35:08 +00:00
uch 7592c6aa95 don't initialize twice 2002-03-03 14:34:36 +00:00
uch 7166e5033d platform dependent HD64461 PCMCIA module (power supply). 2002-03-03 14:34:00 +00:00
uch 08aefbe07d remove temporal debug code. 2002-03-03 14:32:21 +00:00
uch 90baa8b206 SR related parts moved to psl.h. cpufunc.h segments.h are removed.
kernel mode checking is only SR.MD. no check stack pointer.
2002-03-03 14:31:24 +00:00
uch 17fbf85dc3 machine dependent sysctl are moved to machine/cpu.h
dreamcast, hpcsh ... CPU_CONSDEV
	mmeye, evbsh3	 ... CPU_CONSDEV, CPU_LOADANDRESET
2002-03-03 14:28:48 +00:00
uch 24ebe31f30 remove unneeded configuration. 2002-03-03 14:27:24 +00:00
chris 1181e367e0 Implement pmap_growkernel for arm32 based ports.
Note that this has been compiled on some systems, cats, IQ80310, IPAQ, netwinder and shark (note that shark's build is currently broken due to other reasons), but only actually run on cats.
Shark doesn't make use of the functionality as I believe there has to be a correlation between OFW and the kernel tables so that calls into OFW work.
2002-03-03 11:22:58 +00:00
scw 293681cdc3 Rename the bootstrap from netboot to just boot as eventually it will
support both network and scsi devices in one binary.
(There are no absolute size restrictions for a PReP-style one-stage
bootloader).
2002-03-03 11:03:43 +00:00
scw 087d3361fc Define NEWPMAP here if it is not already defined, for the benefit
of lkms.
2002-03-03 10:55:35 +00:00
scw 44c52d4714 No longer need to define CACHELINESIZE here, and move NEWPMAP option
to std.mvmeppc since the old pmap module is not supported on mvmeppc.
2002-03-03 10:53:10 +00:00
nathanw b50fb54af2 Calculate and print the speed of G3 and G4 processors.
Add code to read the on-chip temperature sensor on the G3 and hook it in
to the envsys/sysmon subsystem. "envstat" now prints the CPU temperature.
2002-03-03 07:31:33 +00:00
nathanw 1eeb28024d Add sysmon data structures to struct cpu_info. 2002-03-03 07:09:09 +00:00
matt d26c78e764 All Moto PPC revisions should be printed as maj.min (0x0200 -> 2.0). 2002-03-03 07:09:01 +00:00
nathanw 780a2774c6 The cpu device now requires sysmon_envsys. 2002-03-03 07:04:34 +00:00
nathanw de0fe89086 Add sysmon device (62). 2002-03-03 07:02:54 +00:00
matt e0ba5cf38d Add initial MPC7455 support. 2002-03-03 06:56:09 +00:00
matt 997374a8dd Add MPC7455 2002-03-03 06:47:25 +00:00
nathanw 5d5aeaa547 Add bit definitions for the MMCR's, and event numbers for the events
that are common to the G3 and G4.
2002-03-03 06:38:31 +00:00
nathanw 7a92615001 Correct the SPR numbers of PMC3 and PMC4.
SIA wasn't retconned, but the SPR number was wrong. Re-add it, and add
USIA.
2002-03-03 05:32:37 +00:00
nathanw c2b8ec655a Delete the retconned SIAR SPR. 2002-03-03 05:17:48 +00:00
nathanw ee2cbbfe4a Add MPC7xx/7xxx performance monitor control registers (MMCR0-2, UMMCR0-2). 2002-03-03 05:15:44 +00:00
nathanw 28b2a20fb9 Add bit definitions for the MPC750 thermal management registers. 2002-03-03 04:31:53 +00:00
jmc 8c3c52f61d Provide a definition for DEV_EEPROM so mem.c will compile if SUN4 is defined. 2002-03-03 03:11:06 +00:00
thorpej 20dd585980 Add RCS ID. 2002-03-02 22:29:40 +00:00
uch 6042c0a3fc Initial support for KGDB on the sh3. 2002-03-02 22:26:25 +00:00
uch 65af267aeb Add SH7709A INTEVT2 register define. 2002-03-02 22:25:19 +00:00
thorpej ebcb5cdd36 Move the DBSYM bits up in the file. 2002-03-02 22:23:10 +00:00
uch 36c7edfda4 recompile 2002-03-02 22:03:51 +00:00
uch 795a7cf404 WCE210 support. 2002-03-02 22:01:57 +00:00
uch 2a2cc9f493 always open COM1 for the sake of KGDB. 2002-03-02 22:01:34 +00:00
uch ddf9130f5c add run-time detection of Windows CE version. 2002-03-02 22:01:05 +00:00
kleink 4a513728e8 Add end-of-comment missing in previous. 2002-03-02 21:36:27 +00:00
mhitch 9de3e943c6 Make reset actually do something and enable the use of the watchdog timer.
Losing interrupts no longer will hang the network.
2002-03-02 21:08:04 +00:00
chris a973797a7a Remove ref to VM_MAXKERN_ADDRESS, it's not used in this file 2002-03-02 15:35:05 +00:00
chris 4fa8495ff4 Update the types, pt_entry and pd_entry should be unsigned, and fixed at 32 bits. 2002-03-02 15:30:49 +00:00
kleink a34187bca3 Also reset segment register 0 on kernel entry: there may not always be
a fixed BAT entry covering segment 0, or not completely covering it,
and we do restore it on return to user level already.
2002-03-02 15:19:56 +00:00
kleink dc0a08feaa Note that Guarded bit is not implemented on the 601. 2002-03-02 15:07:35 +00:00
kleink 98eeb8198f Give block translations to I/O memory the Guarded attribute; from Matt Thomas. 2002-03-02 14:25:02 +00:00
mrg ccc760f047 check _KERNEL_OPT for opt_ddb.h 2002-03-02 12:28:16 +00:00
scw 6cf459ffb5 Add BAT_G to the I/O bats, as per matt@netbsd.org's change for macppc. 2002-03-02 11:01:50 +00:00
matt b7a4d57a9e Now all MBR_* definitions come from <sys/disklabel_mbr.h> 2002-03-02 07:05:30 +00:00
jmc 68b038f787 Wrap the generation of machine and powerpc links so they don't happen during
make obj, clean or cleandir as the proper objdir may not be around yet.
2002-03-02 06:32:28 +00:00
matt 4b948be2fc Disable BTIC on rev 2.0 or earlier MPC7450s as Motorola Errata #31 for the
MPC7450.
2002-03-02 02:18:38 +00:00