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6e5d6d35f1
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121582 Commits

Author SHA1 Message Date
njoly
6e5d6d35f1 Fix wrong KASSERTs. Do not compare size vs. entries count. 2014-02-23 11:09:42 +00:00
martin
575b76f8d7 Fix obvious typo 2014-02-23 08:07:33 +00:00
mlelstv
5d1221e5bf ttioctl always gets a valid lwp reference. Replace attempt to handle a NULL 
reference in only one place with a regular assertion.
 2014-02-23 07:54:43 +00:00
martin
2c07e7980c Provide a prototype for xputchar 2014-02-23 07:49:04 +00:00
matt
b2cdde2ce0 Add way_size to arm_cache_info 
Fix arm67_tlb_purge prototype
 2014-02-22 20:50:46 +00:00
matt
1999199781 Add L1_TABLE_SIZE_REAL 2014-02-22 20:46:35 +00:00
matt
5803417a10 Don't manipulate the pte to get uncached memory, use PMAP_NOCACHE instead. 
Convert footbring to kenter_pa/kremove
 2014-02-22 20:33:00 +00:00
matt
9e762b54d5 Trim include files 2014-02-22 19:16:06 +00:00
mlelstv
509b7e4910 Drop empty priority lists, not the full ones. Fixes kern/48611. 2014-02-22 19:05:31 +00:00
matt
7469d28fa0 Deal with non-4KB page sizes 2014-02-22 19:03:06 +00:00
matt
53872253af include <arm/locore.h> 2014-02-22 18:56:25 +00:00
matt
13df20be52 Deal with non-4K page sizes. 2014-02-22 18:55:53 +00:00
matt
723d94f9f2 use kenter_pa/kremove 2014-02-22 18:55:18 +00:00
martin
25a68bc40b Allow kernels without tsciic to build. 2014-02-22 18:42:47 +00:00
dsl
fc194a52bb Re-use the unused ci_cpu_serial[3] to save the highest cpuid values 
for the normal and extended leafs.
(The 'normal' one might be luring in the global cpulevel.)
Read the 'extended feature' from cpuid.80000001.%ecx/edx into
    ci_feat_val[3/2] just after saving cpuid.1.%ecx/dx in ci_feat_val[1/0]
    instead of doing it separately for amd k678 and via c3 processors
    in their probe functions and repeating it for all cpus a few instructions
    later when x86_cpu_topology() is called.
x86_cpu_topology() is only called from cpu_probe() and really doesn't
  deserve its own source file. Chasing the setup code is bad enough anyway.
 2014-02-22 17:48:08 +00:00
martin
49de48ba03 Explicitly include armreg.h (for the interrupt enable bit) 2014-02-22 16:14:38 +00:00
matt
6b03678558 Define __HAVE_ATOMIC64_OPS if EABI && ARMv6 or later. 2014-02-22 08:02:28 +00:00
maxv
33cfa4fef0 Simplify error path. 
ok christos@
 2014-02-22 07:53:16 +00:00
matt
84691a419e Match *INSTALL* (so we can match *INSTALL.MP) 2014-02-21 22:33:08 +00:00
matt
d1eabf3d33 Rearrange KERNEL_BASE_PHYS 2014-02-21 22:31:58 +00:00
matt
ef9e661b7b Rework PIC method to be simplier. Change be more cortex neutral. 2014-02-21 22:22:48 +00:00
matt
ced22eb961 Add EMAC and CPUCFG registers 2014-02-21 22:18:47 +00:00
skrll
0785dcba86 Remove unnecessary struct simplelock forward declaration. 2014-02-21 22:08:07 +00:00
skrll
fbc004dd11 Remove struct simplelock forward declaration. 2014-02-21 22:06:48 +00:00
skrll
481e98f13b Remove unnecessary include of sys/simplelock.h 2014-02-21 22:05:58 +00:00
joerg
4d7f1b16bf Use code model small for LLVM, it should be equivalent to GCC's medlow. 2014-02-21 20:45:12 +00:00
palle
4ad8530004 sun4v: Rename TLB_ defines to SUN4U_TLB_ so entries created using TSB_DATA() are properly setup for sun4u and sun4v. Relocate the cputyp variable from autoconf.c to locore.s and make it const in param.h so optimized code can be generated. Parts from OpenBSD. Optimization suggested by nakayama@. OK martin@, mrg@, nakayama@ 2014-02-21 18:00:09 +00:00
skrll
bb7a6c8038 No need to include sys/simplelock.h here. 2014-02-21 16:08:19 +00:00
martin
74c216e103 Declare 16 and 8 bit atomic CAS - while it is not usually sane to expect 
these functions to work in MI code, we need them to provide some of the
__sync_* functions gcc and other compilers expect nowadays on some
architectures.
 2014-02-21 15:52:53 +00:00
jdc
ad1bbf54eb Add tsciic (alpha MI). 2014-02-21 12:24:52 +00:00
jdc
ad145e06bc Add tsciic and more (commented out) DS20L i2c devices. 2014-02-21 12:24:31 +00:00
jdc
5c7ee0a0a0 Add tsciic, a driver for the DECchip 21272 Core Logic chipset I2C controller. 
Tested on DS20L.
 2014-02-21 12:23:30 +00:00
skrll
d44a8024fa Fix typo in fix for PR/48606 2014-02-21 08:33:51 +00:00
maxv
0ff9025533 Revert rev1.38. The header already begins with EXEC_SCRIPT_MAGIC="#!". 
So it can't be ELFMAG="\177ELF" at the same time.

ok christos@
 2014-02-21 08:11:59 +00:00
maxv
c23f93773f Increase LINUX32_ELF_AUX_ENTRIES to avoid overrun in linux32/. Also, 
add comments and KASSERTs to make sure people don't forget to increase
XX_AUX_ENTRIES's when adding vectors.

Reported by martin@ (CV), with suggestions from chs@.

ok martin@ chs@
 2014-02-21 07:53:53 +00:00
maxv
c14dea48b0 Properly check the section size to avoid out-of-bound reads. The 
computed size must be the exact same size that is indicated in
sh_size.

ok agc@ christos@
 2014-02-21 07:47:02 +00:00
matt
d0fba2d7dc defparam KERNHIST_DELAY 2014-02-21 07:32:43 +00:00
matt
70eecc9d6e For now, don't reset arm_cache_prefer_mask unless both l1 caches are PIPT 2014-02-21 06:28:25 +00:00
christos
7d843710ef PR/48606: Lloyd Parkes: Drivers not using ifp->if_input but using ether_input 
directly.
 2014-02-21 02:10:40 +00:00
matt
6ea2c0761e Keep track of what each cache is (VIVT/VIPT/PIPT). 
cpu0: 32KB/32B 2-way L1 VIPT Instruction cache
cpu0: 32KB/64B 4-way write-back-locking-C L1 PIPT Data cache
cpu0: 256KB/64B 8-way write-through L2 PIPT Unified cache
 2014-02-20 23:24:54 +00:00
matt
eff4a750b9 #include <sys/param.h> 2014-02-20 21:48:38 +00:00
matt
35dc007e85 Include gtmr_var.h 2014-02-20 21:46:14 +00:00
matt
c141068760 Add support for running BE 2014-02-20 21:45:49 +00:00
matt
2b2dfca217 Add prototype for awin_cpu_hatch 2014-02-20 21:45:06 +00:00
jdc
28d753f27a (Belatedly) add lmenv. 2014-02-20 19:47:19 +00:00
dsl
ebf02f5265 This doesn't need fpu.h, but should include ucontext.h 2014-02-20 18:20:39 +00:00
dsl
8b623c15d9 Move the amd64 and i386 pcb to the bottom of the uarea, and move the 
kernel stack to the top.
Change the pcb layouts so that fpu save area is at the end and is
  64byte aligned ready for xsave (saving the ymm registers).
Welcome to 6.99.32
 2014-02-20 18:19:09 +00:00
dsl
3b3cbac768 This needs stdint.h in userspace (for uint64_t) 2014-02-20 18:14:11 +00:00
matt
5cf541518d cpu_cortex doesn't need the arm11 cpufuncs any more 2014-02-20 17:39:59 +00:00
matt
7d78d35b32 armv7 doens't need to use the arm11 routines anymore. 2014-02-20 17:38:42 +00:00