Aren/NetBSD
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Deal with non-4KB page sizes

Browse Source
This commit is contained in:
matt 2014-02-22 19:03:06 +00:00
parent 53872253af
commit 7469d28fa0
5 changed files with 35 additions and 32 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
sys/arch/acorn32/acorn32/rpc_machdep.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: rpc_machdep.c,v 1.87 2013/08/18 21:42:16 matt Exp $ */
/* $NetBSD: rpc_machdep.c,v 1.88 2014/02/22 19:03:06 matt Exp $ */
/*
* Copyright (c) 2000-2002 Reinoud Zandijk.
@ -55,7 +55,7 @@
#include <sys/param.h>
__KERNEL_RCSID(0, "$NetBSD: rpc_machdep.c,v 1.87 2013/08/18 21:42:16 matt Exp $");
__KERNEL_RCSID(0, "$NetBSD: rpc_machdep.c,v 1.88 2014/02/22 19:03:06 matt Exp $");
#include <sys/systm.h>
#include <sys/kernel.h>
@ -1096,14 +1096,14 @@ rpc_sa110_cc_setup(void)
{
int loop;
paddr_t kaddr;
pt_entry_t *pte;
(void) pmap_extract(pmap_kernel(), KERNEL_TEXT_BASE, &kaddr);
const pt_entry_t npte = L2_S_PROTO | kaddr |
L2_S_PROT(PTE_KERNEL, VM_PROT_READ) | pte_l2_s_cache_mode;
for (loop = 0; loop < CPU_SA110_CACHE_CLEAN_SIZE; loop += PAGE_SIZE) {
pte = vtopte(sa110_cc_base + loop);
*pte = L2_S_PROTO | kaddr |
L2_S_PROT(PTE_KERNEL, VM_PROT_READ) | pte_l2_s_cache_mode;
PTE_SYNC(pte);
pt_entry_t * const ptep = vtopte(sa110_cc_base + loop);
l2pte_set(ptep, npte, 0);
PTE_SYNC(ptep);
}
sa1_cache_clean_addr = sa110_cc_base;
sa1_cache_clean_size = CPU_SA110_CACHE_CLEAN_SIZE / 2;

13
sys/arch/acorn32/podulebus/esc.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: esc.c,v 1.26 2014/01/21 19:50:40 christos Exp $ */
/* $NetBSD: esc.c,v 1.27 2014/02/22 19:03:06 matt Exp $ */
/*
* Copyright (c) 1990 The Regents of the University of California.
@ -86,7 +86,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: esc.c,v 1.26 2014/01/21 19:50:40 christos Exp $");
__KERNEL_RCSID(0, "$NetBSD: esc.c,v 1.27 2014/02/22 19:03:06 matt Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@ -185,7 +185,6 @@ esc_init_nexus(struct esc_softc *dev, struct nexus *nexus)
void
escinitialize(struct esc_softc *dev)
{
u_int *pte;
int i;
dev->sc_led_status = 0;
@ -249,9 +248,11 @@ escinitialize(struct esc_softc *dev)
* Setup pages to noncachable, that way we don't have to flush the cache
* every time we need "bumped" transfer.
*/
pte = vtopte((vaddr_t) dev->sc_bump_va);
*pte &= ~L2_C;
PTE_SYNC(pte);
pt_entry_t * const ptep = vtopte((vaddr_t) dev->sc_bump_va);
const pt_entry_t opte = *ptep;
const pt_entry_t npte = opte & ~L2_C;
l2pte_set(ptep, npte, opte);
PTE_SYNC(ptep);
cpu_tlb_flushD();
cpu_dcache_wbinv_range((vm_offset_t)dev->sc_bump_va, PAGE_SIZE);

13
sys/arch/acorn32/podulebus/sfas.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: sfas.c,v 1.23 2014/01/21 19:50:40 christos Exp $ */
/* $NetBSD: sfas.c,v 1.24 2014/02/22 19:03:06 matt Exp $ */
/*
* Copyright (c) 1990 The Regents of the University of California.
@ -82,7 +82,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: sfas.c,v 1.23 2014/01/21 19:50:40 christos Exp $");
__KERNEL_RCSID(0, "$NetBSD: sfas.c,v 1.24 2014/02/22 19:03:06 matt Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@ -178,7 +178,6 @@ sfas_init_nexus(struct sfas_softc *dev, struct nexus *nexus)
void
sfasinitialize(struct sfas_softc *dev)
{
u_int *pte;
int i;
dev->sc_led_status = 0;
@ -245,9 +244,11 @@ sfasinitialize(struct sfas_softc *dev)
* Setup pages to noncachable, that way we don't have to flush the cache
* every time we need "bumped" transfer.
*/
pte = vtopte((vaddr_t) dev->sc_bump_va);
*pte &= ~(L2_C | L2_B);
PTE_SYNC(pte);
pt_entry_t * const ptep = vtopte((vaddr_t) dev->sc_bump_va);
const pt_entry_t opte = *ptep;
const pt_entry_t npte = opte & ~(L2_C | L2_B);
l2pte_set(ptep, npte, opte);
PTE_SYNC(ptep);
cpu_tlb_flushD();
cpu_dcache_wbinv_range((vm_offset_t)dev->sc_bump_va, PAGE_SIZE);

15
sys/arch/arm/xscale/pxa2x0_lcd.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: pxa2x0_lcd.c,v 1.34 2014/01/28 12:22:32 martin Exp $ */
/* $NetBSD: pxa2x0_lcd.c,v 1.35 2014/02/22 19:03:06 matt Exp $ */
/*
* Copyright (c) 2002 Genetec Corporation. All rights reserved.
@ -38,7 +38,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: pxa2x0_lcd.c,v 1.34 2014/01/28 12:22:32 martin Exp $");
__KERNEL_RCSID(0, "$NetBSD: pxa2x0_lcd.c,v 1.35 2014/02/22 19:03:06 matt Exp $");
#include "opt_pxa2x0_lcd.h"
@ -550,7 +550,6 @@ pxa2x0_lcd_new_screen(struct pxa2x0_lcd_softc *sc, int depth,
/* XXX: should we have BUS_DMA_WRITETHROUGH in MI bus_dma(9) API? */
if (pxa2x0_lcd_writethrough) {
pt_entry_t *ptep;
vaddr_t va, eva;
va = (vaddr_t)scr->buf_va;
@ -559,13 +558,15 @@ pxa2x0_lcd_new_screen(struct pxa2x0_lcd_softc *sc, int depth,
/* taken from arm/arm32/bus_dma.c:_bus_dmamem_map() */
cpu_dcache_wbinv_range(va, PAGE_SIZE);
cpu_drain_writebuf();
ptep = vtopte(va);
*ptep &= ~L2_S_CACHE_MASK;
*ptep |= L2_C;
pt_entry_t * const ptep = vtopte(va);
const pt_entry_t opte = *ptep;
const pt_entry_t npte = (opte & ~L2_S_CACHE_MASK)
| L2_C;
l2pte_set(ptep, npte, opte);
PTE_SYNC(ptep);
tlb_flush();
va += PAGE_SIZE;
}
tlb_flush();
}
memset(scr->buf_va, 0, scr->buf_size);

12
sys/arch/evbarm/ixm1200/ixm1200_machdep.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: ixm1200_machdep.c,v 1.54 2013/08/18 15:58:20 matt Exp $ */
/* $NetBSD: ixm1200_machdep.c,v 1.55 2014/02/22 19:03:57 matt Exp $ */
/*
* Copyright (c) 2002, 2003
@ -61,7 +61,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: ixm1200_machdep.c,v 1.54 2013/08/18 15:58:20 matt Exp $");
__KERNEL_RCSID(0, "$NetBSD: ixm1200_machdep.c,v 1.55 2014/02/22 19:03:57 matt Exp $");
#include "opt_ddb.h"
#include "opt_modular.h"
@ -761,14 +761,14 @@ ixdp_ixp12x0_cc_setup(void)
{
int loop;
paddr_t kaddr;
pt_entry_t *pte;
(void) pmap_extract(pmap_kernel(), KERNEL_TEXT_BASE, &kaddr);
for (loop = 0; loop < CPU_IXP12X0_CACHE_CLEAN_SIZE; loop += PAGE_SIZE) {
pte = vtopte(ixp12x0_cc_base + loop);
*pte = L2_S_PROTO | kaddr |
pt_entry_t * const ptep = vtopte(ixp12x0_cc_base + loop);
const pt_entry_t npte = L2_S_PROTO | kaddr |
L2_S_PROT(PTE_KERNEL, VM_PROT_READ) | pte_l2_s_cache_mode;
PTE_SYNC(pte);
l2pte_set(ptep, npte, 0);
PTE_SYNC(ptep);
}
ixp12x0_cache_clean_addr = ixp12x0_cc_base;
ixp12x0_cache_clean_size = CPU_IXP12X0_CACHE_CLEAN_SIZE / 2;