For now, don't reset arm_cache_prefer_mask unless both l1 caches are PIPT
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@ -1,4 +1,4 @@
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/* $NetBSD: cpufunc.c,v 1.139 2014/02/20 23:24:55 matt Exp $ */
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/* $NetBSD: cpufunc.c,v 1.140 2014/02/21 06:28:25 matt Exp $ */
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/*
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* arm7tdmi support code Copyright (c) 2001 John Fremlin
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@ -49,7 +49,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.139 2014/02/20 23:24:55 matt Exp $");
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__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.140 2014/02/21 06:28:25 matt Exp $");
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#include "opt_compat_netbsd.h"
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#include "opt_cpuoptions.h"
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@ -1595,7 +1595,8 @@ get_cachetype_cp15(void)
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if (arm_scache.dcache_line_size < arm_dcache_align)
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arm_dcache_align = arm_scache.dcache_line_size;
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}
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if (arm_pcache.dcache_type == CACHE_TYPE_PIPT) {
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if (arm_pcache.dcache_type == CACHE_TYPE_PIPT
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&& arm_pcache.icache_type == CACHE_TYPE_PIPT) {
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arm_cache_prefer_mask = 0;
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}
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goto out;
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