* Create arch/mips/Makefile.inc with source list of generic MIPS-cpu
files for tags
* Use mips/Makefile.inc and updated tag list in pmax/Makefile
* Try building bootblocks in arch/pmax/stand.
clock_attach() time (for now).
This removes our dependance on the DraCo ROM access timing and frees
the second CIA on Amigas.
b) support for DraCo rev. >= 4 native timer chips.
for a level 6 interrupt. An interrupt only occurs if IR is set, and IR is
only set if the individual mask bits are set. The individual interrupt
status bits can be set without causing an interrupt if the corresponding
enable bits are not set.
NOTE: THESE FILES ARE NOW IDENTICAL TO THEIR ALPHA COUNTERPARTS.
The C preprocessor does the Right Thing when these files are built
on a SPARC. This makes it significantly easier to diff the two
versions (until a real MI 53c9x driver is done, hint hint).
* Handle message retransmissions and partially sent messages correctly.
* Make sure we clear ATN after the last message is sent.
* Do the right thing if the target initiates negotiation for async mode
after having negotiated sync mode.
* Fix some cases where we set ATN with no message queued, or schedule a
message without setting ATN.
* Issue a REQUEST SENSE after an unexpected disconnect, per SCSI spec.
* Fix abort handling in a number of cases.
* Recognize selection timeouts better (to speed up probing).
ELF-outputting version of the assembler. (It was dying when it saw
some CPP line number markers.) This is temporary. (Workaround suggested
by Matt Thomas.)
would generate two interrupts, one real and one spurious. The solution
is to force a drain of the SBus->MBus write buffers after writing to the
lance to clear the interrupt. Thanks to Chris Torek for pointing out a much
easier way to do this than I had planned...
consistency with the way machdep headers for other things are done.
(the creation of the ecoff_machdep.h files was done on the CVS server, to
keep the RCS logs intact.)
macros to use to remove #ifdefs from the machine ID case check.
Eventually, these headers will contain other information, e.g.
machine-dependent relocation information, etc.
use the pre-autoconfig cold serial-console inititialization entry
points from the bus-specific cfattach front-end code.
* Delete post-autoconfig code to switch from PROM output to kernel
driver for machines with dc serial chips.
cfattach front-end code:
dc_ds for the decstation 2100( pmin), 3100 (pmax), and 5100.
dc_ioasic for the decstation 5000/200 (3max) which does not have a
DEC TC-style IOCTL asic, but is configured as if it did.
* Add pre-autoconfig code initialization of kerenl dc driver console I/O
for remote serial consoles. The hack to use PROM serial I/O until the
dc device is autoconfigured is no longer necessary.
* Add MIPS make variable pointing at $S/arch/mips
* Build locore from $MIPS/mips locore source
* Build locore.o and fp.o (fp emulation) from arch/mips locore source
* Add target and rules to build pmax-specific locore code locore_machdep.o
from $PMAX/pmax/lcore_machdep.S
>* Use `-S' rather than `-x' to remove debugging symbols.
because the pmax toolchain and gcc disagree about what is a "local"
symbol, and ld requires a "-x" to let elf2aout build bootable a.out kernels.
to call mcount(). This is needed because the ``link a6,#0'' insn used
trips up gcc's ANSI preprocessor (A # in a function-type macro must be
followed by a macro argument). _PROF_PROLOG is also used in the i386
asm.h.
Solaris' asm_linkage.h has a MCOUNT macro similar to _PROF_PROLOG
except it expands to different code sequences based on whether a
function is being compiled with "prof" or "gprof" instrumentation.
I also discovered that the m68k ALTENTRY is very different than the
implementation used by other NetBSD ports. Usually ALTENTRY simply
provides an alternate function entry point. The m68k version takes a
second argument and jumps inside the second function when profiling is
enabled. The m68k behavior is similar to the ENTRY2 macro found in
solaris.
Providing ENTRY2 and changing all the code that uses ALTENTRY to use
it would be a desirable change.