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93605 Commits

Author SHA1 Message Date
thorpej 1d1d02da94 Make sure <bsd.own.mk> is pulled in before ${PRINTOBJDIR} is used. 2002-03-05 21:23:28 +00:00
wiz b6e7b17180 KNF: No space after casts. 2002-03-05 21:18:14 +00:00
thorpej 0d1f6a757d Use ${PRINTOBJDIR}. 2002-03-05 21:16:51 +00:00
wiz 9c3d74c30b Replace another tempnam() with mkstemp(), and remove the tempResid variable. 
Inspired by OpenBSD.
 2002-03-05 21:11:46 +00:00
wiz d44726b8b5 Replace a 0-cast with NULL. 2002-03-05 20:58:54 +00:00
wiz 69047878cf Replace another tempnam with mkstemp (inspired by OpenBSD). 
Replace perror with warn.
Use NULL instead of some cast 0.
s|/usr/mail|/var/mail| in a comment.
 2002-03-05 20:57:28 +00:00
thorpej 22a7a11f35 Use ${PRINTOBJDIR}. 2002-03-05 20:41:28 +00:00
thorpej bdf6ab32ff Use ${PRINTOBJDIR}. 2002-03-05 20:29:33 +00:00
wiz afc1761e0b Replace another tempnam() with mkstemp(), and remove the tempMesg variable. 
Inspired by OpenBSD.
 2002-03-05 20:26:59 +00:00
wiz c3df89412e Replace printf+exit with errx. 2002-03-05 20:15:33 +00:00
wiz 4361c5156c Check tmpdir for being empty and remove trailing slashes in it. Replace one 
tempnam() with mkstemp(), and remove the tempQuit variable.
Inspired by OpenBSD.
 2002-03-05 20:14:02 +00:00
thorpej f44b824188 Use ${PRINTOBJDIR}. 2002-03-05 19:53:19 +00:00
wiz a5643639a9 ANSIfy another function (overlooked that one...). 2002-03-05 19:26:42 +00:00
wiz ad41eb4f49 Use strpbrk(3) instead of anyof(). 2002-03-05 19:25:16 +00:00
thorpej 87a37178ee There is no need to explcitly use ${.OBJDIR}; it's implied. 2002-03-05 19:17:44 +00:00
briggs 257f8fe26f Add BAT_G for EUMB (incl. I/O) space. Per matt@netbsd.org's macppc change. 2002-03-05 19:06:38 +00:00
shiba 081fae3ddb Fix up a bug which PB150 shuts down when one boots up in progress. 
PB150 will work with SCSI disk. But we cannot use an internal IDE
disk yet.

Reviewed by briggs
 2002-03-05 17:39:25 +00:00
pk 363e8b8dbc Build whatis.db and infodir-meta from the commands list of the afterinstall 
target. Remember: inserting `dummy' targets is not equivalent of some
convenient macro expansion; it has side effects!
 2002-03-05 16:17:06 +00:00
simonb 8b5599e7ce Remove HPCMIPS_FLUSHCACHE_XXX debug code. 2002-03-05 16:16:45 +00:00
simonb 0d0a449d80 mips/mips/fp.S is in mips/conf/files.mips now. 2002-03-05 16:16:03 +00:00
christos 3e7f0b7101 add updwtmpx(); requested by tron. 2002-03-05 16:16:02 +00:00
simonb 4c27f5f8f7 mips/mips/fp.S is in mips/conf/files.mips now. 2002-03-05 16:14:57 +00:00
simonb fd77e40b6b Provide a L2 cache configuration function. 2002-03-05 16:12:35 +00:00
simonb 713adcd0e8 Use new cache coherency attribute macro. 2002-03-05 16:11:57 +00:00
christos 2e53a01f3e add a couple of XOPEN compatibility defines, and a non-xopen function that 
we are expected to have (updwtmpx). Requested by tron.
 2002-03-05 16:09:06 +00:00
simonb f1dbc97679 Not used anymore. 2002-03-05 16:08:55 +00:00
simonb 811ee92532 Add support for MIPS32 and MIPS64 architectures: 
- Build mips3/5900/32/64 support subroutines.
 - Move arch/mips/mips/fp.S to central location.
 - Move NOFPU to opt_cputype.h.
 2002-03-05 16:08:00 +00:00
simonb f340c57568 Values related to the MIPS32/MIPS64 Privileged Resource Architecture 
(from Broadcom Corp).
 2002-03-05 16:07:10 +00:00
simonb 9ac7c86a0f Adjust for 5900 include file changes. 2002-03-05 16:06:04 +00:00
simonb 3f2f4c9bf6 r5900_vector_init() is in mips_machdep.c now. 2002-03-05 16:05:26 +00:00
simonb dd756c0ca5 Rename <mips/r5900/cpuregs.h> to <mips/r5900regs.h> and remove some 
content no longer needed.
 2002-03-05 16:04:57 +00:00
simonb fcdc111c1a Cosmestic changes (more like the mips3+ code). 2002-03-05 16:03:22 +00:00
simonb c5d34b4371 Remove the number of TLB entries for different rx39 CPUs - this info 
is in the table in mips_machdep.c now.
 2002-03-05 16:02:48 +00:00
simonb c6bcfb2589 Add support for MIPS32 and MIPS64 architectures: 
- Move away from using CPUISMIPS3; use MIPS_HAS_R4K_MMU instead.
 - Bump the Sysmap size a little for large-memory machines.
XXX: still need work, especially in pmap_procwr().
 2002-03-05 16:01:25 +00:00
simonb 0f9c00fc2e Add support for MIPS32 and MIPS64 architectures: 
- Move away from using CPUISMIPS3; use MIPS_HAS_R4K_MMU instead.
 - ANSIfy.
 2002-03-05 15:57:20 +00:00
simonb fa9c08ab16 Remove HPCMIPS_FLUSHCACHE_XXX debug code. 
Remove old unused exception frame unwind code.
Change a MIPS3 check to a MIPS3_PLUS check.
ANSIfy.
 2002-03-05 15:55:41 +00:00
simonb 278bfc1c02 Add support for MIPS32 and MIPS64 architectures: 
- move away from using CPUISMIPS3; use MIPS_HAS_CLOCK instead.
 2002-03-05 15:54:33 +00:00
simonb 351c1c16a6 Add support for MIPS32 and MIPS64 architectures: 
- Use a table-driven CPU detection algorithm instead of multiple
   case statements.
 - Add MIPS32/64 feature detection using the architected CP0 registers
   (from Broadcom Corp).
 - Call MD mips_machdep_cache_config() function if
   __HAVE_MIPS_MACHDEP_CACHE_CONFIG is defined - used to set up the
   L2 cache on some ports.
 2002-03-05 15:53:00 +00:00
simonb ba8e2e82e4 Add support for MIPS32 and MIPS64 architectures: 
- Remove all mmu-related code that may use 32 register on mips32-style
   implementatios and move them to mipsX_subr.S - which is then included
   from mips{3,32,64,5900}_subr.S with various control defines enabled.
 - Remove local cache instruction flags
 - Add badaddr64 (from Broadcom Corp).
 2002-03-05 15:50:59 +00:00
simonb 9ed4fd257f Change a MIPS3 check to a MIPS3_PLUS check. 
XXX: I'm not 100% sure of the intent of this code - it would seem that
 it needs a run-time check of CPU ISA to be completely correct...
 2002-03-05 15:48:31 +00:00
simonb d62813603c Check userland address and address alignent as two separate checks. 
Fix for when mips_reg_t is 64-bits.
ANSIfy.
 2002-03-05 15:46:51 +00:00
simonb fe86ad150e Change MIPS3 checks to MIPS3_PLUS checks (XXX - still bogus!). 2002-03-05 15:44:40 +00:00
simonb c9a3bd8900 Add support for MIPS32 and MIPS64 architectures: 
- Move away from using CPUISMIPS3; use MIPS_HAS_R4K_MMU instead.
 - Add a command to dump cp0 state.
 2002-03-05 15:43:25 +00:00
simonb 9b785c48f3 Cache ops for MIPS32/64 cpus. 2002-03-05 15:42:50 +00:00
simonb 0446046fde Add MIPS32/64 cache setup code (from Broadcom Corp). 2002-03-05 15:42:21 +00:00
simonb cae6e0e516 Prototypes for MIPS32/64 cache ops. 2002-03-05 15:41:48 +00:00
simonb 0ff59237ca Change a MIPS3 check to a MIPS3_PLUS check (XXX - still bogus!). 2002-03-05 15:41:14 +00:00
simonb 01422aae5c Add support for MIPS32 and MIPS64 architectures: 
- move away from using CPUISMIPS3; use MIPS_HAS_CLOCK instead.
 2002-03-05 15:40:10 +00:00
simonb 1d05db445d Add support for MIPS32 and MIPS64 architectures: 
- Move away from using CPUISMIPS3; use MIPS_HAS_R4K_MMU instead.
 2002-03-05 15:39:31 +00:00
simonb 934c4ba555 Add support for MIPS32 and MIPS64 architectures: 
Remove the unused PSL_USERCLR and BASEPRI macros.
 2002-03-05 15:38:33 +00:00