* lpt device is defined in MI place (dev/ppbus/files.ppbus), dev/ic/lpt.c
is included there too; dev/ic/lpt.c is not included if ppbus is
configured or if there is alternative platform lpt (like for pc532)
* g/c MD lpt definitions and custom puc/upc attachments,
glue moved to conf/files and dev/pci/files.pci respectively; remove
device lpt definition from dev/isa/files.isa
* add ppbus parport attribute, atppc device attachments, adjust plip and lpt
glue
files for machines I know to have genuine PCI slots. As sent to tech-kern
for feedback in December 2003. Based on feedback, opencrypto is commented
out in the macppc GENERIC (due to absense of GENERIC_SOFTINT support),
and added to the sparc64 config (sys/arch/sparc64/conf/GENERIC32).
get from <arm/arm32/machdep.h> anyway. Consistently use ANSI style
function definitions (most functions already were in ANSI style).
Generated object file is not changed.
Rewrite netwinder_restart to be self-contained, when it runs the MMU
is disabled. Set cpu_reset_address to the physical address of
netwinder_restart, not virtual.
Also in the ARM32_PMAP_NEW case, reclaim the USPACE-bytes of wasted space
at the top of the user address that hasn't been needed for a very very
long time.
cd ${KERNSRCDIR}/${KERNARCHDIR}/compile && ${PRINTOBJDIR}
This is far simpler than the previous system, and more robust with
objdirs built via BSDOBJDIR.
The previous method of finding KERNOBJDIR when using BSDOBJDIR by
referencing _SRC_TOP_OBJ_ from another directory was extremely
fragile due to the depth first tree walk by <bsd.subdir.mk>, and
the caching of _SRC_TOP_OBJ_ (with MAKEOVERRIDES) which would be
empty on the *first* pass to create fresh objdirs.
This change requires adding sys/arch/*/compile/Makefile to create
the objdir in that directory, and descending into arch/*/compile
from arch/*/Makefile. Remove the now-unnecessary .keep_me files
whilst here.
Per lengthy discussion with Andrew Brown.
This is based upon Jason's work on xscale.
Most of the interrupt handling code is now written in C using an asm stub to
call into the C code.
spl* now only updates a software mask, and does not update the hardware,
this should be much faster.
The new code works well on cats, it's untested on netwinder, but should work.
The code implements generic soft interrupts.
More work is still required to bring the isa interrupt handling code upto
scratch currently all isa interrupts are handled at IPL_BIO on the footbridge.
This may cause isa interrupts to be handled later than they should be.
I plan to fix this in the near future.
