Remove old pmap support for platforms which have fully switched over.
This commit is contained in:
thorpej
parent
803e64c800
commit
1dff12252d
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@ -1,4 +1,4 @@
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/* $NetBSD: cats_machdep.c,v 1.42 2003/05/02 23:22:34 thorpej Exp $ */
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/* $NetBSD: cats_machdep.c,v 1.43 2003/05/03 03:29:06 thorpej Exp $ */
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/*
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* Copyright (c) 1997,1998 Mark Brinicombe.
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@ -346,9 +346,6 @@ initarm(bootargs)
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u_int l1pagetable;
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struct exec *kernexec = (struct exec *)KERNEL_TEXT_BASE;
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pv_addr_t kernel_l1pt;
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#ifndef ARM32_PMAP_NEW
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pv_addr_t kernel_ptpt;
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#endif
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/*
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* Heads up ... Setup the CPU / MMU / TLB functions
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@ -488,15 +485,8 @@ initarm(bootargs)
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&& kernel_l1pt.pv_pa == 0) {
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valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
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} else {
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#ifdef ARM32_PMAP_NEW
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valloc_pages(kernel_pt_table[loop1],
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L2_TABLE_SIZE / PAGE_SIZE);
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#else
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alloc_pages(kernel_pt_table[loop1].pv_pa,
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L2_TABLE_SIZE / PAGE_SIZE);
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kernel_pt_table[loop1].pv_va =
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kernel_pt_table[loop1].pv_pa;
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#endif
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++loop1;
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}
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}
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@ -514,11 +504,6 @@ initarm(bootargs)
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*/
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alloc_pages(systempage.pv_pa, 1);
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#ifndef ARM32_PMAP_NEW
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/* Allocate a page for the page table to map kernel page tables*/
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valloc_pages(kernel_ptpt, L2_TABLE_SIZE / PAGE_SIZE);
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#endif
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/* Allocate stacks for all modes */
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valloc_pages(irqstack, IRQ_STACK_SIZE);
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valloc_pages(abtstack, ABT_STACK_SIZE);
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@ -566,10 +551,6 @@ initarm(bootargs)
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pmap_curmaxkvaddr =
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KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
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#ifndef ARM32_PMAP_NEW
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pmap_link_l2pt(l1pagetable, PTE_BASE, &kernel_ptpt);
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#endif
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#ifdef VERBOSE_INIT_ARM
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printf("Mapping kernel\n");
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#endif
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@ -628,10 +609,6 @@ initarm(bootargs)
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pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
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UPAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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#ifndef ARM32_PMAP_NEW
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pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
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L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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#else
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pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
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L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
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@ -640,40 +617,6 @@ initarm(bootargs)
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kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
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VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
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}
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#endif
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#ifndef ARM32_PMAP_NEW
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/* Map the page table that maps the kernel pages */
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pmap_map_entry(l1pagetable, kernel_ptpt.pv_va, kernel_ptpt.pv_pa,
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VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
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/*
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* Map entries in the page table used to map PTE's
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* Basically every kernel page table gets mapped here
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*/
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/* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */
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for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
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pmap_map_entry(l1pagetable,
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PTE_BASE + ((KERNEL_BASE +
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(loop * 0x00400000)) >> (PGSHIFT-2)),
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kernel_pt_table[KERNEL_PT_KERNEL + loop].pv_pa,
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VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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pmap_map_entry(l1pagetable,
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PTE_BASE + (PTE_BASE >> (PGSHIFT-2)),
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kernel_ptpt.pv_pa,
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VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
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pmap_map_entry(l1pagetable,
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PTE_BASE + (0x00000000 >> (PGSHIFT-2)),
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kernel_pt_table[KERNEL_PT_SYS].pv_pa,
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VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; ++loop)
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pmap_map_entry(l1pagetable,
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PTE_BASE + ((KERNEL_VM_BASE +
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(loop * 0x00400000)) >> (PGSHIFT-2)),
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kernel_pt_table[KERNEL_PT_VMDATA + loop].pv_pa,
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VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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#endif
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/* Map the vector page. */
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pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
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@ -714,12 +657,9 @@ initarm(bootargs)
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*/
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/* fcomcndetach(); */
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#ifdef ARM32_PMAP_NEW
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cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
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#endif
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setttb(kernel_l1pt.pv_pa);
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cpu_tlb_flushID();
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#ifdef ARM32_PMAP_NEW
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cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
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/*
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* Moved from cpu_startup() as data_abort_handler() references
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@ -727,7 +667,6 @@ initarm(bootargs)
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*/
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proc0paddr = (struct user *)kernelstack.pv_va;
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lwp0.l_addr = proc0paddr;
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#endif
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/*
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* XXX this should only be done in main() but it useful to
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* have output earlier ...
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@ -861,11 +800,8 @@ initarm(bootargs)
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/* Boot strap pmap telling it where the kernel page table is */
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printf("pmap ");
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#ifndef ARM32_PMAP_NEW
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pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt);
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#else
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pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va);
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#endif
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/* Setup the IRQ system */
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printf("irq ");
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footbridge_intr_init();
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@ -1,4 +1,4 @@
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/* $NetBSD: vmparam.h,v 1.18 2003/04/28 01:34:29 thorpej Exp $ */
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/* $NetBSD: vmparam.h,v 1.19 2003/05/03 03:29:07 thorpej Exp $ */
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/*
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* Copyright (c) 1988 The Regents of the University of California.
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@ -52,9 +52,6 @@
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/* Various constants used by the MD code*/
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#define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00000000)
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#ifndef ARM32_PMAP_NEW
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#define APTE_BASE (KERNEL_BASE + 0x00c00000)
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#endif
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#define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000)
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/*
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* The Kernel VM Size varies depending on the machine depending on how
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@ -1,4 +1,4 @@
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/* $NetBSD: brh_machdep.c,v 1.7 2003/05/02 23:22:34 thorpej Exp $ */
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/* $NetBSD: brh_machdep.c,v 1.8 2003/05/03 03:29:07 thorpej Exp $ */
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/*
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* Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
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@ -388,9 +388,6 @@ initarm(void *arg)
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int loop1;
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u_int l1pagetable;
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pv_addr_t kernel_l1pt;
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#ifndef ARM32_PMAP_NEW
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pv_addr_t kernel_ptpt;
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#endif
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paddr_t memstart;
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psize_t memsize;
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@ -517,15 +514,8 @@ initarm(void *arg)
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&& kernel_l1pt.pv_pa == 0) {
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valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
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} else {
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#ifdef ARM32_PMAP_NEW
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valloc_pages(kernel_pt_table[loop1],
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L2_TABLE_SIZE / PAGE_SIZE);
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#else
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alloc_pages(kernel_pt_table[loop1].pv_pa,
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L2_TABLE_SIZE / PAGE_SIZE);
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kernel_pt_table[loop1].pv_va =
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kernel_pt_table[loop1].pv_pa;
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#endif
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++loop1;
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}
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}
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@ -541,11 +531,6 @@ initarm(void *arg)
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*/
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alloc_pages(systempage.pv_pa, 1);
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#ifndef ARM32_PMAP_NEW
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/* Allocate a page for the page table to map kernel page tables. */
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valloc_pages(kernel_ptpt, L2_TABLE_SIZE / PAGE_SIZE);
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#endif
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/* Allocate stacks for all modes */
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valloc_pages(irqstack, IRQ_STACK_SIZE);
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valloc_pages(abtstack, ABT_STACK_SIZE);
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@ -598,9 +583,6 @@ initarm(void *arg)
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for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
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pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
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&kernel_pt_table[KERNEL_PT_VMDATA + loop]);
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#ifndef ARM32_PMAP_NEW
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pmap_link_l2pt(l1pagetable, PTE_BASE, &kernel_ptpt);
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#endif
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/* update the top of the kernel VM */
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pmap_curmaxkvaddr =
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@ -644,10 +626,6 @@ initarm(void *arg)
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pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
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UPAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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#ifndef ARM32_PMAP_NEW
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pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
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L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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#else
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pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
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L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
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@ -656,44 +634,11 @@ initarm(void *arg)
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kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
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VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
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}
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#endif
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/* Map the Mini-Data cache clean area. */
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xscale_setup_minidata(l1pagetable, minidataclean.pv_va,
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minidataclean.pv_pa);
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#ifndef ARM32_PMAP_NEW
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/* Map the page table that maps the kernel pages */
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pmap_map_entry(l1pagetable, kernel_ptpt.pv_va, kernel_ptpt.pv_pa,
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VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
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/*
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* Map entries in the page table used to map PTE's
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* Basically every kernel page table gets mapped here
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*/
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/* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */
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for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) {
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pmap_map_entry(l1pagetable,
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PTE_BASE + ((KERNEL_BASE +
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(loop * 0x00400000)) >> (PGSHIFT-2)),
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kernel_pt_table[KERNEL_PT_KERNEL + loop].pv_pa,
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VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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}
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pmap_map_entry(l1pagetable,
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PTE_BASE + (PTE_BASE >> (PGSHIFT-2)),
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kernel_ptpt.pv_pa, VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
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pmap_map_entry(l1pagetable,
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trunc_page(PTE_BASE + (ARM_VECTORS_HIGH >> (PGSHIFT-2))),
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kernel_pt_table[KERNEL_PT_SYS].pv_pa,
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VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
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pmap_map_entry(l1pagetable,
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PTE_BASE + ((KERNEL_VM_BASE +
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(loop * 0x00400000)) >> (PGSHIFT-2)),
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kernel_pt_table[KERNEL_PT_VMDATA + loop].pv_pa,
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VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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#endif
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/* Map the vector page. */
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pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
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VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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@ -736,12 +681,9 @@ initarm(void *arg)
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#ifdef VERBOSE_INIT_ARM
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printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
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#endif
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#ifdef ARM32_PMAP_NEW
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cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
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#endif
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setttb(kernel_l1pt.pv_pa);
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cpu_tlb_flushID();
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#ifdef ARM32_PMAP_NEW
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cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
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/*
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@ -750,7 +692,6 @@ initarm(void *arg)
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*/
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proc0paddr = (struct user *)kernelstack.pv_va;
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lwp0.l_addr = proc0paddr;
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#endif
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#ifdef VERBOSE_INIT_ARM
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printf("done!\n");
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@ -854,11 +795,7 @@ initarm(void *arg)
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/* Boot strap pmap telling it where the kernel page table is */
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printf("pmap ");
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#ifdef ARM32_PMAP_NEW
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pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va);
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#else
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pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt);
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#endif
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/* Setup the IRQ system */
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printf("irq ");
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@ -1,4 +1,4 @@
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/* $NetBSD: vmparam.h,v 1.16 2003/04/29 14:04:01 scw Exp $ */
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/* $NetBSD: vmparam.h,v 1.17 2003/05/03 03:29:08 thorpej Exp $ */
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/*
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* Copyright (c) 1988 The Regents of the University of California.
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@ -53,9 +53,6 @@
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#ifndef ARM32_NEW_VM_LAYOUT
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/* Various constants used by the MD code*/
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#define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00200000)
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#ifndef ARM32_PMAP_NEW
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#define APTE_BASE (KERNEL_BASE + 0x00c00000)
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#endif
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#define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000)
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#endif
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/*
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@ -1,4 +1,4 @@
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/* $NetBSD: integrator_machdep.c,v 1.33 2003/05/03 00:39:22 thorpej Exp $ */
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/* $NetBSD: integrator_machdep.c,v 1.34 2003/05/03 03:29:08 thorpej Exp $ */
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/*
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* Copyright (c) 2001,2002 ARM Ltd
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@ -389,9 +389,7 @@ initarm(void *arg)
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extern int etext asm ("_etext");
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extern int end asm ("_end");
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pv_addr_t kernel_l1pt;
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#ifndef ARM32_PMAP_NEW
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pv_addr_t kernel_ptpt;
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#endif
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paddr_t memstart;
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psize_t memsize;
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#if NPLCOM > 0 && defined(PLCONSOLE)
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@ -540,15 +538,8 @@ initarm(void *arg)
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&& kernel_l1pt.pv_pa == 0) {
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valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
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} else {
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#ifdef ARM32_PMAP_NEW
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valloc_pages(kernel_pt_table[loop1],
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L2_TABLE_SIZE / PAGE_SIZE);
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#else
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alloc_pages(kernel_pt_table[loop1].pv_pa,
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L2_TABLE_SIZE / PAGE_SIZE);
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kernel_pt_table[loop1].pv_va =
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kernel_pt_table[loop1].pv_pa;
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#endif
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++loop1;
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}
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}
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@ -564,11 +555,6 @@ initarm(void *arg)
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*/
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alloc_pages(systempage.pv_pa, 1);
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#ifndef ARM32_PMAP_NEW
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/* Allocate a page for the page table to map kernel page tables. */
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valloc_pages(kernel_ptpt, L2_TABLE_SIZE / PAGE_SIZE);
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#endif
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/* Allocate stacks for all modes */
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valloc_pages(irqstack, IRQ_STACK_SIZE);
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valloc_pages(abtstack, ABT_STACK_SIZE);
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@ -613,9 +599,6 @@ initarm(void *arg)
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for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
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pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
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&kernel_pt_table[KERNEL_PT_VMDATA + loop]);
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#ifndef ARM32_PMAP_NEW
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pmap_link_l2pt(l1pagetable, PTE_BASE, &kernel_ptpt);
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#endif
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/* update the top of the kernel VM */
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pmap_curmaxkvaddr =
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@ -658,10 +641,6 @@ initarm(void *arg)
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pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
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UPAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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#ifndef ARM32_PMAP_NEW
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pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
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L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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#else
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pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
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L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
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@ -670,39 +649,6 @@ initarm(void *arg)
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kernel_pt_table[loop].pv_va, L2_TABLE_SIZE,
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VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
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}
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#endif
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|
||||
#ifndef ARM32_PMAP_NEW
|
||||
/* Map the page table that maps the kernel pages */
|
||||
pmap_map_entry(l1pagetable, kernel_ptpt.pv_va, kernel_ptpt.pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
|
||||
|
||||
/*
|
||||
* Map entries in the page table used to map PTE's
|
||||
* Basically every kernel page table gets mapped here
|
||||
*/
|
||||
/* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */
|
||||
for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) {
|
||||
pmap_map_entry(l1pagetable,
|
||||
PTE_BASE + ((KERNEL_BASE +
|
||||
(loop * 0x00400000)) >> (PGSHIFT-2)),
|
||||
kernel_pt_table[KERNEL_PT_KERNEL + loop].pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
}
|
||||
pmap_map_entry(l1pagetable,
|
||||
PTE_BASE + (PTE_BASE >> (PGSHIFT-2)),
|
||||
kernel_ptpt.pv_pa, VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
|
||||
pmap_map_entry(l1pagetable,
|
||||
PTE_BASE + (0x00000000 >> (PGSHIFT-2)),
|
||||
kernel_pt_table[KERNEL_PT_SYS].pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
|
||||
pmap_map_entry(l1pagetable,
|
||||
PTE_BASE + ((KERNEL_VM_BASE +
|
||||
(loop * 0x00400000)) >> (PGSHIFT-2)),
|
||||
kernel_pt_table[KERNEL_PT_VMDATA + loop].pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
#endif
|
||||
|
||||
/* Map the vector page. */
|
||||
#if 1
|
||||
|
|
@ -758,12 +704,9 @@ initarm(void *arg)
|
|||
physical_freestart, free_pages, free_pages);
|
||||
printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
|
||||
#endif
|
||||
#ifdef ARM32_PMAP_NEW
|
||||
cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
|
||||
#endif
|
||||
setttb(kernel_l1pt.pv_pa);
|
||||
cpu_tlb_flushID();
|
||||
#ifdef ARM32_PMAP_NEW
|
||||
cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
|
||||
|
||||
/*
|
||||
|
|
@ -772,7 +715,6 @@ initarm(void *arg)
|
|||
*/
|
||||
proc0paddr = (struct user *)kernelstack.pv_va;
|
||||
lwp0.l_addr = proc0paddr;
|
||||
#endif
|
||||
|
||||
#ifdef VERBOSE_INIT_ARM
|
||||
printf("done!\n");
|
||||
|
|
@ -842,11 +784,7 @@ initarm(void *arg)
|
|||
|
||||
/* Boot strap pmap telling it where the kernel page table is */
|
||||
printf("pmap ");
|
||||
#ifdef ARM32_PMAP_NEW
|
||||
pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va);
|
||||
#else
|
||||
pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt);
|
||||
#endif
|
||||
|
||||
/* Setup the IRQ system */
|
||||
printf("irq ");
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: iq80310_machdep.c,v 1.51 2003/05/02 23:22:34 thorpej Exp $ */
|
||||
/* $NetBSD: iq80310_machdep.c,v 1.52 2003/05/03 03:29:09 thorpej Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
|
||||
|
|
@ -336,9 +336,6 @@ initarm(void *arg)
|
|||
int loop1;
|
||||
u_int l1pagetable;
|
||||
pv_addr_t kernel_l1pt;
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
pv_addr_t kernel_ptpt;
|
||||
#endif
|
||||
paddr_t memstart;
|
||||
psize_t memsize;
|
||||
|
||||
|
|
@ -488,15 +485,8 @@ initarm(void *arg)
|
|||
&& kernel_l1pt.pv_pa == 0) {
|
||||
valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
|
||||
} else {
|
||||
#ifdef ARM32_PMAP_NEW
|
||||
valloc_pages(kernel_pt_table[loop1],
|
||||
L2_TABLE_SIZE / PAGE_SIZE);
|
||||
#else
|
||||
alloc_pages(kernel_pt_table[loop1].pv_pa,
|
||||
L2_TABLE_SIZE / PAGE_SIZE);
|
||||
kernel_pt_table[loop1].pv_va =
|
||||
kernel_pt_table[loop1].pv_pa;
|
||||
#endif
|
||||
++loop1;
|
||||
}
|
||||
}
|
||||
|
|
@ -512,11 +502,6 @@ initarm(void *arg)
|
|||
*/
|
||||
alloc_pages(systempage.pv_pa, 1);
|
||||
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
/* Allocate a page for the page table to map kernel page tables. */
|
||||
valloc_pages(kernel_ptpt, L2_TABLE_SIZE / PAGE_SIZE);
|
||||
#endif
|
||||
|
||||
/* Allocate stacks for all modes */
|
||||
valloc_pages(irqstack, IRQ_STACK_SIZE);
|
||||
valloc_pages(abtstack, ABT_STACK_SIZE);
|
||||
|
|
@ -571,9 +556,6 @@ initarm(void *arg)
|
|||
for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
|
||||
pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
|
||||
&kernel_pt_table[KERNEL_PT_VMDATA + loop]);
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
pmap_link_l2pt(l1pagetable, PTE_BASE, &kernel_ptpt);
|
||||
#endif
|
||||
|
||||
/* update the top of the kernel VM */
|
||||
pmap_curmaxkvaddr =
|
||||
|
|
@ -617,10 +599,6 @@ initarm(void *arg)
|
|||
pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
|
||||
UPAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
|
||||
L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
#else
|
||||
pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
|
||||
L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
|
||||
|
||||
|
|
@ -629,44 +607,11 @@ initarm(void *arg)
|
|||
kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Map the Mini-Data cache clean area. */
|
||||
xscale_setup_minidata(l1pagetable, minidataclean.pv_va,
|
||||
minidataclean.pv_pa);
|
||||
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
/* Map the page table that maps the kernel pages */
|
||||
pmap_map_entry(l1pagetable, kernel_ptpt.pv_va, kernel_ptpt.pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
|
||||
|
||||
/*
|
||||
* Map entries in the page table used to map PTE's
|
||||
* Basically every kernel page table gets mapped here
|
||||
*/
|
||||
/* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */
|
||||
for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) {
|
||||
pmap_map_entry(l1pagetable,
|
||||
PTE_BASE + ((KERNEL_BASE +
|
||||
(loop * 0x00400000)) >> (PGSHIFT-2)),
|
||||
kernel_pt_table[KERNEL_PT_KERNEL + loop].pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
}
|
||||
pmap_map_entry(l1pagetable,
|
||||
PTE_BASE + (PTE_BASE >> (PGSHIFT-2)),
|
||||
kernel_ptpt.pv_pa, VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
|
||||
pmap_map_entry(l1pagetable,
|
||||
trunc_page(PTE_BASE + (ARM_VECTORS_HIGH >> (PGSHIFT-2))),
|
||||
kernel_pt_table[KERNEL_PT_SYS].pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
|
||||
pmap_map_entry(l1pagetable,
|
||||
PTE_BASE + ((KERNEL_VM_BASE +
|
||||
(loop * 0x00400000)) >> (PGSHIFT-2)),
|
||||
kernel_pt_table[KERNEL_PT_VMDATA + loop].pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
#endif
|
||||
|
||||
/* Map the vector page. */
|
||||
pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
|
|
@ -760,12 +705,9 @@ initarm(void *arg)
|
|||
physical_freestart, free_pages, free_pages);
|
||||
printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
|
||||
#endif
|
||||
#ifdef ARM32_PMAP_NEW
|
||||
cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
|
||||
#endif
|
||||
setttb(kernel_l1pt.pv_pa);
|
||||
cpu_tlb_flushID();
|
||||
#ifdef ARM32_PMAP_NEW
|
||||
cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
|
||||
|
||||
/*
|
||||
|
|
@ -774,7 +716,6 @@ initarm(void *arg)
|
|||
*/
|
||||
proc0paddr = (struct user *)kernelstack.pv_va;
|
||||
lwp0.l_addr = proc0paddr;
|
||||
#endif
|
||||
|
||||
#ifdef VERBOSE_INIT_ARM
|
||||
printf("done!\n");
|
||||
|
|
@ -830,11 +771,7 @@ initarm(void *arg)
|
|||
|
||||
/* Boot strap pmap telling it where the kernel page table is */
|
||||
printf("pmap ");
|
||||
#ifdef ARM32_PMAP_NEW
|
||||
pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va);
|
||||
#else
|
||||
pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt);
|
||||
#endif
|
||||
|
||||
/* Setup the IRQ system */
|
||||
printf("irq ");
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: iq80321_machdep.c,v 1.20 2003/05/02 23:22:35 thorpej Exp $ */
|
||||
/* $NetBSD: iq80321_machdep.c,v 1.21 2003/05/03 03:29:09 thorpej Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
|
||||
|
|
@ -380,9 +380,6 @@ initarm(void *arg)
|
|||
int loop1;
|
||||
u_int l1pagetable;
|
||||
pv_addr_t kernel_l1pt;
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
pv_addr_t kernel_ptpt;
|
||||
#endif
|
||||
paddr_t memstart;
|
||||
psize_t memsize;
|
||||
|
||||
|
|
@ -508,15 +505,8 @@ initarm(void *arg)
|
|||
&& kernel_l1pt.pv_pa == 0) {
|
||||
valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
|
||||
} else {
|
||||
#ifdef ARM32_PMAP_NEW
|
||||
valloc_pages(kernel_pt_table[loop1],
|
||||
L2_TABLE_SIZE / PAGE_SIZE);
|
||||
#else
|
||||
alloc_pages(kernel_pt_table[loop1].pv_pa,
|
||||
L2_TABLE_SIZE / PAGE_SIZE);
|
||||
kernel_pt_table[loop1].pv_va =
|
||||
kernel_pt_table[loop1].pv_pa;
|
||||
#endif
|
||||
++loop1;
|
||||
}
|
||||
}
|
||||
|
|
@ -532,11 +522,6 @@ initarm(void *arg)
|
|||
*/
|
||||
alloc_pages(systempage.pv_pa, 1);
|
||||
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
/* Allocate a page for the page table to map kernel page tables. */
|
||||
valloc_pages(kernel_ptpt, L2_TABLE_SIZE / PAGE_SIZE);
|
||||
#endif
|
||||
|
||||
/* Allocate stacks for all modes */
|
||||
valloc_pages(irqstack, IRQ_STACK_SIZE);
|
||||
valloc_pages(abtstack, ABT_STACK_SIZE);
|
||||
|
|
@ -591,9 +576,6 @@ initarm(void *arg)
|
|||
for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
|
||||
pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
|
||||
&kernel_pt_table[KERNEL_PT_VMDATA + loop]);
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
pmap_link_l2pt(l1pagetable, PTE_BASE, &kernel_ptpt);
|
||||
#endif
|
||||
|
||||
/* update the top of the kernel VM */
|
||||
pmap_curmaxkvaddr =
|
||||
|
|
@ -637,10 +619,6 @@ initarm(void *arg)
|
|||
pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
|
||||
UPAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
|
||||
L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
#else
|
||||
pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
|
||||
L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
|
||||
|
||||
|
|
@ -649,44 +627,11 @@ initarm(void *arg)
|
|||
kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Map the Mini-Data cache clean area. */
|
||||
xscale_setup_minidata(l1pagetable, minidataclean.pv_va,
|
||||
minidataclean.pv_pa);
|
||||
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
/* Map the page table that maps the kernel pages */
|
||||
pmap_map_entry(l1pagetable, kernel_ptpt.pv_va, kernel_ptpt.pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
|
||||
|
||||
/*
|
||||
* Map entries in the page table used to map PTE's
|
||||
* Basically every kernel page table gets mapped here
|
||||
*/
|
||||
/* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */
|
||||
for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) {
|
||||
pmap_map_entry(l1pagetable,
|
||||
PTE_BASE + ((KERNEL_BASE +
|
||||
(loop * 0x00400000)) >> (PGSHIFT-2)),
|
||||
kernel_pt_table[KERNEL_PT_KERNEL + loop].pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
}
|
||||
pmap_map_entry(l1pagetable,
|
||||
PTE_BASE + (PTE_BASE >> (PGSHIFT-2)),
|
||||
kernel_ptpt.pv_pa, VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
|
||||
pmap_map_entry(l1pagetable,
|
||||
trunc_page(PTE_BASE + (ARM_VECTORS_HIGH >> (PGSHIFT-2))),
|
||||
kernel_pt_table[KERNEL_PT_SYS].pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
|
||||
pmap_map_entry(l1pagetable,
|
||||
PTE_BASE + ((KERNEL_VM_BASE +
|
||||
(loop * 0x00400000)) >> (PGSHIFT-2)),
|
||||
kernel_pt_table[KERNEL_PT_VMDATA + loop].pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
#endif
|
||||
|
||||
/* Map the vector page. */
|
||||
pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
|
|
@ -770,12 +715,9 @@ initarm(void *arg)
|
|||
physical_freestart, free_pages, free_pages);
|
||||
printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
|
||||
#endif
|
||||
#ifdef ARM32_PMAP_NEW
|
||||
cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
|
||||
#endif
|
||||
setttb(kernel_l1pt.pv_pa);
|
||||
cpu_tlb_flushID();
|
||||
#ifdef ARM32_PMAP_NEW
|
||||
cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
|
||||
|
||||
/*
|
||||
|
|
@ -784,7 +726,6 @@ initarm(void *arg)
|
|||
*/
|
||||
proc0paddr = (struct user *)kernelstack.pv_va;
|
||||
lwp0.l_addr = proc0paddr;
|
||||
#endif
|
||||
|
||||
#ifdef VERBOSE_INIT_ARM
|
||||
printf("done!\n");
|
||||
|
|
@ -840,11 +781,7 @@ initarm(void *arg)
|
|||
|
||||
/* Boot strap pmap telling it where the kernel page table is */
|
||||
printf("pmap ");
|
||||
#ifdef ARM32_PMAP_NEW
|
||||
pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va);
|
||||
#else
|
||||
pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt);
|
||||
#endif
|
||||
|
||||
/* Setup the IRQ system */
|
||||
printf("irq ");
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: ixm1200_machdep.c,v 1.17 2003/05/03 00:39:22 thorpej Exp $ */
|
||||
/* $NetBSD: ixm1200_machdep.c,v 1.18 2003/05/03 03:29:09 thorpej Exp $ */
|
||||
#undef DEBUG_BEFOREMMU
|
||||
/*
|
||||
* Copyright (c) 2002, 2003
|
||||
|
|
@ -67,7 +67,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: ixm1200_machdep.c,v 1.17 2003/05/03 00:39:22 thorpej Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: ixm1200_machdep.c,v 1.18 2003/05/03 03:29:09 thorpej Exp $");
|
||||
|
||||
#include "opt_ddb.h"
|
||||
#include "opt_pmap_debug.h"
|
||||
|
|
@ -324,9 +324,6 @@ initarm(void *arg)
|
|||
vaddr_t l1pagetable;
|
||||
vaddr_t freemempos;
|
||||
pv_addr_t kernel_l1pt;
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
pv_addr_t kernel_ptpt;
|
||||
#endif
|
||||
#if NKSYMS || defined(DDB) || defined(LKM)
|
||||
Elf_Shdr *sh;
|
||||
#endif
|
||||
|
|
@ -426,15 +423,8 @@ initarm(void *arg)
|
|||
&& kernel_l1pt.pv_pa == 0) {
|
||||
valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
|
||||
} else {
|
||||
#ifdef ARM32_PMAP_NEW
|
||||
valloc_pages(kernel_pt_table[loop1],
|
||||
L2_TABLE_SIZE / PAGE_SIZE);
|
||||
#else
|
||||
alloc_pages(kernel_pt_table[loop1].pv_pa,
|
||||
L2_TABLE_SIZE / PAGE_SIZE);
|
||||
kernel_pt_table[loop1].pv_va =
|
||||
kernel_pt_table[loop1].pv_pa;
|
||||
#endif
|
||||
++loop1;
|
||||
}
|
||||
}
|
||||
|
|
@ -452,11 +442,6 @@ initarm(void *arg)
|
|||
*/
|
||||
alloc_pages(systempage.pv_pa, 1);
|
||||
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
/* Allocate a page for the page table to map kernel page tables. */
|
||||
valloc_pages(kernel_ptpt, L2_TABLE_SIZE / PAGE_SIZE);
|
||||
#endif
|
||||
|
||||
/* Allocate stacks for all modes */
|
||||
valloc_pages(irqstack, IRQ_STACK_SIZE);
|
||||
valloc_pages(abtstack, ABT_STACK_SIZE);
|
||||
|
|
@ -513,9 +498,6 @@ initarm(void *arg)
|
|||
for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
|
||||
pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
|
||||
&kernel_pt_table[KERNEL_PT_VMDATA + loop]);
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
pmap_link_l2pt(l1pagetable, PTE_BASE, &kernel_ptpt);
|
||||
#endif
|
||||
|
||||
/* update the top of the kernel VM */
|
||||
pmap_curmaxkvaddr =
|
||||
|
|
@ -570,10 +552,6 @@ initarm(void *arg)
|
|||
pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
|
||||
UPAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
|
||||
L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
#else
|
||||
pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
|
||||
L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
|
||||
|
||||
|
|
@ -582,41 +560,6 @@ initarm(void *arg)
|
|||
kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
/* Map the page table that maps the kernel pages */
|
||||
pmap_map_entry(l1pagetable, kernel_ptpt.pv_va, kernel_ptpt.pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
|
||||
|
||||
/*
|
||||
* Map entries in the page table used to map PTE's
|
||||
* Basically every kernel page table gets mapped here
|
||||
*/
|
||||
/* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */
|
||||
pmap_map_entry(l1pagetable,
|
||||
PTE_BASE + (0x00000000 >> (PGSHIFT-2)),
|
||||
kernel_pt_table[KERNEL_PT_SYS].pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
|
||||
for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
|
||||
pmap_map_entry(l1pagetable,
|
||||
PTE_BASE + ((KERNEL_BASE +
|
||||
(loop * 0x00400000)) >> (PGSHIFT-2)),
|
||||
kernel_pt_table[KERNEL_PT_KERNEL + loop].pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
|
||||
for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
|
||||
pmap_map_entry(l1pagetable,
|
||||
PTE_BASE + ((KERNEL_VM_BASE +
|
||||
(loop * 0x00400000)) >> (PGSHIFT-2)),
|
||||
kernel_pt_table[KERNEL_PT_VMDATA + loop].pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
|
||||
pmap_map_entry(l1pagetable,
|
||||
PTE_BASE + (PTE_BASE >> (PGSHIFT-2)),
|
||||
kernel_ptpt.pv_pa, VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
|
||||
#endif
|
||||
|
||||
/* Map the vector page. */
|
||||
pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
|
||||
|
|
@ -649,12 +592,9 @@ initarm(void *arg)
|
|||
*/
|
||||
|
||||
/* Switch tables */
|
||||
#ifdef ARM32_PMAP_NEW
|
||||
cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
|
||||
#endif
|
||||
setttb(kernel_l1pt.pv_pa);
|
||||
cpu_tlb_flushID();
|
||||
#ifdef ARM32_PMAP_NEW
|
||||
cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
|
||||
|
||||
/*
|
||||
|
|
@ -663,7 +603,6 @@ initarm(void *arg)
|
|||
*/
|
||||
proc0paddr = (struct user *)kernelstack.pv_va;
|
||||
lwp0.l_addr = proc0paddr;
|
||||
#endif
|
||||
|
||||
/*
|
||||
* We must now clean the cache again....
|
||||
|
|
@ -730,11 +669,7 @@ initarm(void *arg)
|
|||
|
||||
/* Boot strap pmap telling it where the kernel page table is */
|
||||
printf("pmap ");
|
||||
#ifdef ARM32_PMAP_NEW
|
||||
pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va);
|
||||
#else
|
||||
pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt);
|
||||
#endif
|
||||
|
||||
/* Setup the IRQ system */
|
||||
printf("irq ");
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: smdk2800_machdep.c,v 1.4 2003/05/03 00:39:22 thorpej Exp $ */
|
||||
/* $NetBSD: smdk2800_machdep.c,v 1.5 2003/05/03 03:29:10 thorpej Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2002 Fujitsu Component Limited
|
||||
|
|
@ -368,9 +368,6 @@ initarm(void *arg)
|
|||
extern int etext asm("_etext");
|
||||
extern int end asm("_end");
|
||||
pv_addr_t kernel_l1pt;
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
pv_addr_t kernel_ptpt;
|
||||
#endif
|
||||
struct s3c2xx0_softc temp_softc; /* used to initialize IO regs */
|
||||
int progress_counter = 0;
|
||||
#ifdef MEMORY_DISK_DYNAMIC
|
||||
|
|
@ -534,15 +531,8 @@ initarm(void *arg)
|
|||
&& kernel_l1pt.pv_pa == 0) {
|
||||
valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
|
||||
} else {
|
||||
#ifdef ARM32_PMAP_NEW
|
||||
valloc_pages(kernel_pt_table[loop1],
|
||||
L2_TABLE_SIZE / PAGE_SIZE);
|
||||
#else
|
||||
alloc_pages(kernel_pt_table[loop1].pv_pa,
|
||||
L2_TABLE_SIZE / PAGE_SIZE);
|
||||
kernel_pt_table[loop1].pv_va =
|
||||
kernel_pt_table[loop1].pv_pa;
|
||||
#endif
|
||||
++loop1;
|
||||
}
|
||||
}
|
||||
|
|
@ -558,11 +548,6 @@ initarm(void *arg)
|
|||
*/
|
||||
alloc_pages(systempage.pv_pa, 1);
|
||||
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
/* Allocate a page for the page table to map kernel page tables. */
|
||||
valloc_pages(kernel_ptpt, L2_TABLE_SIZE / PAGE_SIZE);
|
||||
#endif
|
||||
|
||||
/* Allocate stacks for all modes */
|
||||
valloc_pages(irqstack, IRQ_STACK_SIZE);
|
||||
valloc_pages(abtstack, ABT_STACK_SIZE);
|
||||
|
|
@ -609,9 +594,6 @@ initarm(void *arg)
|
|||
for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
|
||||
pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
|
||||
&kernel_pt_table[KERNEL_PT_VMDATA + loop]);
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
pmap_link_l2pt(l1pagetable, PTE_BASE, &kernel_ptpt);
|
||||
#endif
|
||||
|
||||
/* update the top of the kernel VM */
|
||||
pmap_curmaxkvaddr =
|
||||
|
|
@ -657,10 +639,6 @@ initarm(void *arg)
|
|||
pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
|
||||
UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
|
||||
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
|
||||
L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
|
||||
#else
|
||||
pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
|
||||
L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_PAGETABLE);
|
||||
|
||||
|
|
@ -669,39 +647,6 @@ initarm(void *arg)
|
|||
kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
/* Map the page table that maps the kernel pages */
|
||||
pmap_map_entry(l1pagetable, kernel_ptpt.pv_va, kernel_ptpt.pv_pa,
|
||||
VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE);
|
||||
|
||||
/*
|
||||
* Map entries in the page table used to map PTE's
|
||||
* Basically every kernel page table gets mapped here
|
||||
*/
|
||||
/* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */
|
||||
for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) {
|
||||
pmap_map_entry(l1pagetable,
|
||||
PTE_BASE + ((KERNEL_BASE +
|
||||
(loop * 0x00400000)) >> (PGSHIFT - 2)),
|
||||
kernel_pt_table[KERNEL_PT_KERNEL + loop].pv_pa,
|
||||
VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
|
||||
}
|
||||
pmap_map_entry(l1pagetable,
|
||||
PTE_BASE + (PTE_BASE >> (PGSHIFT - 2)),
|
||||
kernel_ptpt.pv_pa, VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE);
|
||||
pmap_map_entry(l1pagetable,
|
||||
PTE_BASE + (0x00000000 >> (PGSHIFT - 2)),
|
||||
kernel_pt_table[KERNEL_PT_SYS].pv_pa,
|
||||
VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
|
||||
for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
|
||||
pmap_map_entry(l1pagetable,
|
||||
PTE_BASE + ((KERNEL_VM_BASE +
|
||||
(loop * 0x00400000)) >> (PGSHIFT - 2)),
|
||||
kernel_pt_table[KERNEL_PT_VMDATA + loop].pv_pa,
|
||||
VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
|
||||
#endif
|
||||
|
||||
/* Map the vector page. */
|
||||
#if 1
|
||||
|
|
@ -776,12 +721,9 @@ initarm(void *arg)
|
|||
printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
|
||||
#endif
|
||||
LEDSTEP();
|
||||
#ifdef ARM32_PMAP_NEW
|
||||
cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
|
||||
#endif
|
||||
setttb(kernel_l1pt.pv_pa);
|
||||
cpu_tlb_flushID();
|
||||
#ifdef ARM32_PMAP_NEW
|
||||
cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
|
||||
|
||||
/*
|
||||
|
|
@ -790,7 +732,6 @@ initarm(void *arg)
|
|||
*/
|
||||
proc0paddr = (struct user *)kernelstack.pv_va;
|
||||
lwp0.l_addr = proc0paddr;
|
||||
#endif
|
||||
|
||||
#ifdef VERBOSE_INIT_ARM
|
||||
printf("done!\n");
|
||||
|
|
@ -870,11 +811,7 @@ initarm(void *arg)
|
|||
LEDSTEP();
|
||||
/* Boot strap pmap telling it where the kernel page table is */
|
||||
printf("pmap ");
|
||||
#ifdef ARM32_PMAP_NEW
|
||||
pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va);
|
||||
#else
|
||||
pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt);
|
||||
#endif
|
||||
|
||||
LEDSTEP();
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: hpc_machdep.c,v 1.63 2003/05/02 23:22:35 thorpej Exp $ */
|
||||
/* $NetBSD: hpc_machdep.c,v 1.64 2003/05/03 03:29:10 thorpej Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1994-1998 Mark Brinicombe.
|
||||
|
|
@ -297,9 +297,6 @@ initarm(argc, argv, bi)
|
|||
u_int l1pagetable;
|
||||
vaddr_t freemempos;
|
||||
pv_addr_t kernel_l1pt;
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
pv_addr_t kernel_ptpt;
|
||||
#endif
|
||||
vsize_t pt_size;
|
||||
#if NKSYMS || defined(DDB) || defined(LKM)
|
||||
Elf_Shdr *sh;
|
||||
|
|
@ -462,11 +459,6 @@ initarm(argc, argv, bi)
|
|||
|
||||
pt_size = round_page(freemempos) - KERNEL_BASE;
|
||||
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
/* Allocate a page for the page table to map kernel page tables*/
|
||||
valloc_pages(kernel_ptpt, L2_TABLE_SIZE / PAGE_SIZE);
|
||||
#endif
|
||||
|
||||
/* Allocate stacks for all modes */
|
||||
valloc_pages(irqstack, IRQ_STACK_SIZE);
|
||||
valloc_pages(abtstack, ABT_STACK_SIZE);
|
||||
|
|
@ -533,9 +525,6 @@ initarm(argc, argv, bi)
|
|||
for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; ++loop)
|
||||
pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
|
||||
&kernel_pt_table[KERNEL_PT_VMDATA + loop]);
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
pmap_link_l2pt(l1pagetable, PTE_BASE, &kernel_ptpt);
|
||||
#endif
|
||||
|
||||
/* update the top of the kernel VM */
|
||||
pmap_curmaxkvaddr =
|
||||
|
|
@ -585,59 +574,16 @@ initarm(argc, argv, bi)
|
|||
UPAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
|
||||
pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
|
||||
#ifdef ARM32_PMAP_NEW
|
||||
L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
|
||||
#else
|
||||
L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
#endif
|
||||
|
||||
/* Map page tables */
|
||||
pmap_map_chunk(l1pagetable, KERNEL_BASE, KERNEL_BASE, pt_size,
|
||||
#ifdef ARM32_PMAP_NEW
|
||||
VM_PROT_READ | VM_PROT_WRITE, PTE_PAGETABLE);
|
||||
#else
|
||||
VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
|
||||
#endif
|
||||
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
/* Map the page table that maps the kernel pages */
|
||||
pmap_map_entry(l1pagetable, kernel_ptpt.pv_va, kernel_ptpt.pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
|
||||
#endif
|
||||
|
||||
/* Map a page for entering idle mode */
|
||||
pmap_map_entry(l1pagetable, sa11x0_idle_mem, sa11x0_idle_mem,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
|
||||
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
/*
|
||||
* Map entries in the page table used to map PTE's
|
||||
* Basically every kernel page table gets mapped here
|
||||
*/
|
||||
/* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */
|
||||
pmap_map_entry(l1pagetable,
|
||||
PTE_BASE + (0x00000000 >> (PGSHIFT-2)),
|
||||
kernel_pt_table[KERNEL_PT_SYS].pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
pmap_map_entry(l1pagetable,
|
||||
PTE_BASE + (KERNEL_BASE >> (PGSHIFT-2)),
|
||||
kernel_pt_table[KERNEL_PT_KERNEL].pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; ++loop) {
|
||||
pmap_map_entry(l1pagetable,
|
||||
PTE_BASE + ((KERNEL_VM_BASE +
|
||||
(loop * 0x00400000)) >> (PGSHIFT-2)),
|
||||
kernel_pt_table[KERNEL_PT_VMDATA + loop].pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
}
|
||||
pmap_map_entry(l1pagetable,
|
||||
PTE_BASE + (PTE_BASE >> (PGSHIFT-2)),
|
||||
kernel_ptpt.pv_pa, VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
|
||||
pmap_map_entry(l1pagetable,
|
||||
PTE_BASE + (SAIPIO_BASE >> (PGSHIFT-2)),
|
||||
kernel_pt_table[KERNEL_PT_IO].pv_pa, VM_PROT_READ|VM_PROT_WRITE,
|
||||
PTE_CACHE);
|
||||
#endif
|
||||
|
||||
/* Map the vector page. */
|
||||
pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
|
|
@ -699,7 +645,6 @@ initarm(argc, argv, bi)
|
|||
undefined_init();
|
||||
|
||||
/* Set the page table address. */
|
||||
#ifdef ARM32_PMAP_NEW
|
||||
cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
|
||||
setttb(kernel_l1pt.pv_pa);
|
||||
cpu_tlb_flushID();
|
||||
|
|
@ -711,9 +656,6 @@ initarm(argc, argv, bi)
|
|||
*/
|
||||
proc0paddr = (struct user *)kernelstack.pv_va;
|
||||
lwp0.l_addr = proc0paddr;
|
||||
#else
|
||||
setttb(kernel_l1pt.pv_pa);
|
||||
#endif
|
||||
|
||||
#ifdef BOOT_DUMP
|
||||
dumppages((char *)0xc0000000, 16 * PAGE_SIZE);
|
||||
|
|
@ -747,12 +689,7 @@ initarm(argc, argv, bi)
|
|||
}
|
||||
|
||||
/* Boot strap pmap telling it where the kernel page table is */
|
||||
#ifdef ARM32_PMAP_NEW
|
||||
pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va);
|
||||
#else
|
||||
pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt);
|
||||
#endif
|
||||
|
||||
|
||||
if (cputype == CPU_ID_SA110)
|
||||
rpc_sa110_cc_setup();
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: vmparam.h,v 1.20 2003/04/28 01:34:29 thorpej Exp $ */
|
||||
/* $NetBSD: vmparam.h,v 1.21 2003/05/03 03:29:11 thorpej Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1988 The Regents of the University of California.
|
||||
|
|
@ -52,9 +52,6 @@
|
|||
|
||||
/* Various constants used by the MD code*/
|
||||
#define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00040000)
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
#define APTE_BASE (KERNEL_BASE + 0x00800000)
|
||||
#endif
|
||||
#define KERNEL_VM_BASE (KERNEL_BASE + 0x00c00000)
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: vmparam.h,v 1.16 2003/04/28 01:34:31 thorpej Exp $ */
|
||||
/* $NetBSD: vmparam.h,v 1.17 2003/05/03 03:29:11 thorpej Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1988 The Regents of the University of California.
|
||||
|
|
@ -52,9 +52,6 @@
|
|||
|
||||
/* Various constants used by the MD code*/
|
||||
#define KERNEL_TEXT_BASE (KERNEL_BASE + 0x0000c000)
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
#define APTE_BASE (KERNEL_BASE + 0x00c00000)
|
||||
#endif
|
||||
#define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000)
|
||||
/*
|
||||
* The Kernel VM Size varies depending on the machine depending on how
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: netwinder_machdep.c,v 1.47 2003/05/02 23:22:35 thorpej Exp $ */
|
||||
/* $NetBSD: netwinder_machdep.c,v 1.48 2003/05/03 03:29:11 thorpej Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1997,1998 Mark Brinicombe.
|
||||
|
|
@ -366,9 +366,6 @@ initarm(void *arg)
|
|||
u_int l1pagetable;
|
||||
extern char _end[];
|
||||
pv_addr_t kernel_l1pt;
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
pv_addr_t kernel_ptpt;
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Set up a diagnostic console so we can see what's going
|
||||
|
|
@ -491,15 +488,8 @@ initarm(void *arg)
|
|||
&& kernel_l1pt.pv_pa == 0) {
|
||||
valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
|
||||
} else {
|
||||
#ifdef ARM32_PMAP_NEW
|
||||
valloc_pages(kernel_pt_table[loop1],
|
||||
L2_TABLE_SIZE / PAGE_SIZE);
|
||||
#else
|
||||
alloc_pages(kernel_pt_table[loop1].pv_pa,
|
||||
L2_TABLE_SIZE / PAGE_SIZE);
|
||||
kernel_pt_table[loop1].pv_va =
|
||||
kernel_pt_table[loop1].pv_pa;
|
||||
#endif
|
||||
++loop1;
|
||||
}
|
||||
}
|
||||
|
|
@ -515,11 +505,6 @@ initarm(void *arg)
|
|||
*/
|
||||
alloc_pages(systempage.pv_pa, 1);
|
||||
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
/* Allocate a page for the page table to map kernel page tables*/
|
||||
valloc_pages(kernel_ptpt, L2_TABLE_SIZE / PAGE_SIZE);
|
||||
#endif
|
||||
|
||||
/* Allocate stacks for all modes */
|
||||
valloc_pages(irqstack, IRQ_STACK_SIZE);
|
||||
valloc_pages(abtstack, ABT_STACK_SIZE);
|
||||
|
|
@ -563,9 +548,6 @@ initarm(void *arg)
|
|||
for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; ++loop)
|
||||
pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
|
||||
&kernel_pt_table[KERNEL_PT_VMDATA + loop]);
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
pmap_link_l2pt(l1pagetable, PTE_BASE, &kernel_ptpt);
|
||||
#endif
|
||||
|
||||
/* update the top of the kernel VM */
|
||||
pmap_curmaxkvaddr =
|
||||
|
|
@ -618,10 +600,6 @@ initarm(void *arg)
|
|||
pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
|
||||
UPAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
|
||||
L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
#else
|
||||
pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
|
||||
L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
|
||||
|
||||
|
|
@ -630,37 +608,6 @@ initarm(void *arg)
|
|||
kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
/* Map the page table that maps the kernel pages */
|
||||
pmap_map_entry(l1pagetable, kernel_ptpt.pv_va, kernel_ptpt.pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
|
||||
|
||||
/*
|
||||
* Map entries in the page table used to map PTE's
|
||||
* Basically every kernel page table gets mapped here
|
||||
*/
|
||||
/* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */
|
||||
pmap_map_entry(l1pagetable,
|
||||
PTE_BASE + (KERNEL_BASE >> (PGSHIFT-2)),
|
||||
kernel_pt_table[KERNEL_PT_KERNEL].pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
pmap_map_entry(l1pagetable,
|
||||
PTE_BASE + (PTE_BASE >> (PGSHIFT-2)),
|
||||
kernel_ptpt.pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
|
||||
pmap_map_entry(l1pagetable,
|
||||
PTE_BASE + (0x00000000 >> (PGSHIFT-2)),
|
||||
kernel_pt_table[KERNEL_PT_SYS].pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; ++loop)
|
||||
pmap_map_entry(l1pagetable,
|
||||
PTE_BASE + ((KERNEL_VM_BASE +
|
||||
(loop * 0x00400000)) >> (PGSHIFT-2)),
|
||||
kernel_pt_table[KERNEL_PT_VMDATA + loop].pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
#endif
|
||||
|
||||
/* Map the vector page. */
|
||||
pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
|
||||
|
|
@ -700,11 +647,8 @@ initarm(void *arg)
|
|||
printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
|
||||
#endif
|
||||
|
||||
#ifdef ARM32_PMAP_NEW
|
||||
cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
|
||||
#endif
|
||||
setttb(kernel_l1pt.pv_pa);
|
||||
#ifdef ARM32_PMAP_NEW
|
||||
cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
|
||||
|
||||
/*
|
||||
|
|
@ -713,7 +657,6 @@ initarm(void *arg)
|
|||
*/
|
||||
proc0paddr = (struct user *)kernelstack.pv_va;
|
||||
lwp0.l_addr = proc0paddr;
|
||||
#endif
|
||||
|
||||
#ifdef VERBOSE_INIT_ARM
|
||||
printf("done!\n");
|
||||
|
|
@ -845,11 +788,7 @@ initarm(void *arg)
|
|||
|
||||
/* Boot strap pmap telling it where the kernel page table is */
|
||||
printf("pmap ");
|
||||
#ifdef ARM32_PMAP_NEW
|
||||
pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va);
|
||||
#else
|
||||
pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt);
|
||||
#endif
|
||||
|
||||
/* Setup the IRQ system */
|
||||
printf("irq ");
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: vmparam.h,v 1.8 2003/04/28 01:34:32 thorpej Exp $ */
|
||||
/* $NetBSD: vmparam.h,v 1.9 2003/05/03 03:29:12 thorpej Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1988 The Regents of the University of California.
|
||||
|
|
@ -52,9 +52,6 @@
|
|||
|
||||
/* Various constants used by the MD code */
|
||||
#define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00000000)
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
#define APTE_BASE (KERNEL_BASE + 0x00c00000)
|
||||
#endif
|
||||
#define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000)
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: ofw.c,v 1.25 2003/05/02 23:22:36 thorpej Exp $ */
|
||||
/* $NetBSD: ofw.c,v 1.26 2003/05/03 03:29:12 thorpej Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright 1997
|
||||
|
|
@ -209,11 +209,7 @@ static ofw_handle_t ofw_client_services_handle;
|
|||
|
||||
|
||||
static void ofw_callbackhandler __P((void *));
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
static void ofw_construct_proc0_addrspace __P((pv_addr_t *, pv_addr_t *));
|
||||
#else
|
||||
static void ofw_construct_proc0_addrspace __P((pv_addr_t *));
|
||||
#endif
|
||||
static void ofw_getphysmeminfo __P((void));
|
||||
static void ofw_getvirttranslations __P((void));
|
||||
static void *ofw_malloc(vm_size_t size);
|
||||
|
|
@ -759,17 +755,10 @@ void
|
|||
ofw_configmem(void)
|
||||
{
|
||||
pv_addr_t proc0_ttbbase;
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
pv_addr_t proc0_ptpt;
|
||||
#endif
|
||||
int i;
|
||||
|
||||
/* Set-up proc0 address space. */
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
ofw_construct_proc0_addrspace(&proc0_ttbbase, &proc0_ptpt);
|
||||
#else
|
||||
ofw_construct_proc0_addrspace(&proc0_ttbbase);
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Get a dump of OFW's picture of physical memory.
|
||||
|
|
@ -790,9 +779,6 @@ ofw_configmem(void)
|
|||
OF_set_callback(ofw_callbackhandler);
|
||||
|
||||
/* Switch to the proc0 pagetables. */
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
setttb(proc0_ttbbase.pv_pa);
|
||||
#else
|
||||
cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
|
||||
setttb(proc0_ttbbase.pv_pa);
|
||||
cpu_tlb_flushID();
|
||||
|
|
@ -807,7 +793,6 @@ ofw_configmem(void)
|
|||
proc0paddr = (struct user *)kernelstack.pv_va;
|
||||
lwp0.l_addr = proc0paddr;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Aaaaaaaah, running in the proc0 address space! */
|
||||
/* I feel good... */
|
||||
|
|
@ -971,11 +956,7 @@ ofw_configmem(void)
|
|||
}
|
||||
|
||||
/* Initialize pmap module. */
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
pmap_bootstrap((pd_entry_t *)proc0_ttbbase.pv_va, proc0_ptpt);
|
||||
#else
|
||||
pmap_bootstrap((pd_entry_t *)proc0_ttbbase.pv_va);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -1298,23 +1279,9 @@ ofw_callbackhandler(v)
|
|||
}
|
||||
|
||||
static void
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
ofw_construct_proc0_addrspace(pv_addr_t *proc0_ttbbase, pv_addr_t *proc0_ptpt)
|
||||
#else
|
||||
ofw_construct_proc0_addrspace(pv_addr_t *proc0_ttbbase)
|
||||
#endif
|
||||
{
|
||||
int i, oft;
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
pv_addr_t proc0_pagedir;
|
||||
pv_addr_t proc0_pt_pte;
|
||||
pv_addr_t proc0_pt_sys;
|
||||
pv_addr_t proc0_pt_kernel[KERNEL_IMG_PTS];
|
||||
pv_addr_t proc0_pt_vmdata[KERNEL_VMDATA_PTS];
|
||||
pv_addr_t proc0_pt_ofw[KERNEL_OFW_PTS];
|
||||
pv_addr_t proc0_pt_io[KERNEL_IO_PTS];
|
||||
pv_addr_t msgbuf;
|
||||
#else
|
||||
static pv_addr_t proc0_pagedir;
|
||||
static pv_addr_t proc0_pt_sys;
|
||||
static pv_addr_t proc0_pt_kernel[KERNEL_IMG_PTS];
|
||||
|
|
@ -1322,7 +1289,6 @@ ofw_construct_proc0_addrspace(pv_addr_t *proc0_ttbbase)
|
|||
static pv_addr_t proc0_pt_ofw[KERNEL_OFW_PTS];
|
||||
static pv_addr_t proc0_pt_io[KERNEL_IO_PTS];
|
||||
static pv_addr_t msgbuf;
|
||||
#endif
|
||||
vm_offset_t L1pagetable;
|
||||
struct mem_translation *tp;
|
||||
|
||||
|
|
@ -1354,9 +1320,6 @@ ofw_construct_proc0_addrspace(pv_addr_t *proc0_ttbbase)
|
|||
/* Allocate/initialize space for the proc0, NetBSD-managed */
|
||||
/* page tables that we will be switching to soon. */
|
||||
ofw_claimpages(&virt_freeptr, &proc0_pagedir, L1_TABLE_SIZE);
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
ofw_claimpages(&virt_freeptr, &proc0_pt_pte, L2_TABLE_SIZE);
|
||||
#endif
|
||||
ofw_claimpages(&virt_freeptr, &proc0_pt_sys, L2_TABLE_SIZE);
|
||||
for (i = 0; i < KERNEL_IMG_PTS; i++)
|
||||
ofw_claimpages(&virt_freeptr, &proc0_pt_kernel[i], L2_TABLE_SIZE);
|
||||
|
|
@ -1386,9 +1349,6 @@ ofw_construct_proc0_addrspace(pv_addr_t *proc0_ttbbase)
|
|||
for (i = 0; i < KERNEL_IMG_PTS; i++)
|
||||
pmap_link_l2pt(L1pagetable, KERNEL_BASE + i * 0x00400000,
|
||||
&proc0_pt_kernel[i]);
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
pmap_link_l2pt(L1pagetable, PTE_BASE, &proc0_pt_pte);
|
||||
#endif
|
||||
for (i = 0; i < KERNEL_VMDATA_PTS; i++)
|
||||
pmap_link_l2pt(L1pagetable, KERNEL_VM_BASE + i * 0x00400000,
|
||||
&proc0_pt_vmdata[i]);
|
||||
|
|
@ -1472,75 +1432,9 @@ ofw_construct_proc0_addrspace(pv_addr_t *proc0_ttbbase)
|
|||
* we don't want aliases to physical addresses that the kernel
|
||||
* has-mapped/will-map elsewhere.
|
||||
*/
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
ofw_discardmappings(proc0_pt_kernel[KERNEL_IMG_PTS - 1].pv_va,
|
||||
proc0_pt_sys.pv_va, L2_TABLE_SIZE);
|
||||
for (i = 0; i < KERNEL_IMG_PTS; i++)
|
||||
ofw_discardmappings(proc0_pt_kernel[KERNEL_IMG_PTS - 1].pv_va,
|
||||
proc0_pt_kernel[i].pv_va, L2_TABLE_SIZE);
|
||||
for (i = 0; i < KERNEL_VMDATA_PTS; i++)
|
||||
ofw_discardmappings(proc0_pt_kernel[KERNEL_IMG_PTS - 1].pv_va,
|
||||
proc0_pt_vmdata[i].pv_va, L2_TABLE_SIZE);
|
||||
for (i = 0; i < KERNEL_OFW_PTS; i++)
|
||||
ofw_discardmappings(proc0_pt_kernel[KERNEL_IMG_PTS - 1].pv_va,
|
||||
proc0_pt_ofw[i].pv_va, L2_TABLE_SIZE);
|
||||
for (i = 0; i < KERNEL_IO_PTS; i++)
|
||||
ofw_discardmappings(proc0_pt_kernel[KERNEL_IMG_PTS - 1].pv_va,
|
||||
proc0_pt_io[i].pv_va, L2_TABLE_SIZE);
|
||||
#endif
|
||||
ofw_discardmappings(proc0_pt_kernel[KERNEL_IMG_PTS - 1].pv_va,
|
||||
msgbuf.pv_va, MSGBUFSIZE);
|
||||
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
/*
|
||||
* We did not throw away the proc0_pt_pte and proc0_pagedir
|
||||
* mappings as well still want them. However we don't want them
|
||||
* cached ...
|
||||
* Really these should be uncached when allocated.
|
||||
*/
|
||||
pmap_map_entry(L1pagetable, proc0_pt_pte.pv_va,
|
||||
proc0_pt_pte.pv_pa, VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
|
||||
for (i = 0; i < (L1_TABLE_SIZE / PAGE_SIZE); ++i)
|
||||
pmap_map_entry(L1pagetable,
|
||||
proc0_pagedir.pv_va + PAGE_SIZE * i,
|
||||
proc0_pagedir.pv_pa + PAGE_SIZE * i,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
|
||||
/*
|
||||
* Construct the proc0 L2 pagetables that map page tables.
|
||||
*/
|
||||
|
||||
/* Map entries in the L2pagetable used to map L2PTs. */
|
||||
pmap_map_entry(L1pagetable,
|
||||
PTE_BASE + (0x00000000 >> (PGSHIFT-2)),
|
||||
proc0_pt_sys.pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
for (i = 0; i < KERNEL_IMG_PTS; i++)
|
||||
pmap_map_entry(L1pagetable,
|
||||
PTE_BASE + ((KERNEL_BASE + i * 0x00400000) >> (PGSHIFT-2)),
|
||||
proc0_pt_kernel[i].pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
pmap_map_entry(L1pagetable,
|
||||
PTE_BASE + (PTE_BASE >> (PGSHIFT-2)),
|
||||
proc0_pt_pte.pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
|
||||
for (i = 0; i < KERNEL_VMDATA_PTS; i++)
|
||||
pmap_map_entry(L1pagetable,
|
||||
PTE_BASE + ((KERNEL_VM_BASE + i * 0x00400000)
|
||||
>> (PGSHIFT-2)), proc0_pt_vmdata[i].pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
for (i = 0; i < KERNEL_OFW_PTS; i++)
|
||||
pmap_map_entry(L1pagetable,
|
||||
PTE_BASE + ((OFW_VIRT_BASE + i * 0x00400000)
|
||||
>> (PGSHIFT-2)), proc0_pt_ofw[i].pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
for (i = 0; i < KERNEL_IO_PTS; i++)
|
||||
pmap_map_entry(L1pagetable,
|
||||
PTE_BASE + ((IO_VIRT_BASE + i * 0x00400000)
|
||||
>> (PGSHIFT-2)), proc0_pt_io[i].pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
#endif
|
||||
|
||||
/* update the top of the kernel VM */
|
||||
pmap_curmaxkvaddr =
|
||||
KERNEL_VM_BASE + (KERNEL_VMDATA_PTS * 0x00400000);
|
||||
|
|
@ -1570,9 +1464,6 @@ ofw_construct_proc0_addrspace(pv_addr_t *proc0_ttbbase)
|
|||
|
||||
/* OUT parameters are the new ttbbase and the pt which maps pts. */
|
||||
*proc0_ttbbase = proc0_pagedir;
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
*proc0_ptpt = proc0_pt_pte;
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue