Use the generic irq_dispatch.S
This commit is contained in:
thorpej
parent
6620220d46
commit
b179f9cf73
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@ -1,4 +1,4 @@
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# $NetBSD: files.footbridge,v 1.10 2002/11/03 21:43:29 chris Exp $
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# $NetBSD: files.footbridge,v 1.11 2003/01/03 01:06:40 thorpej Exp $
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#
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# Shared footbridge files information
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@ -9,7 +9,7 @@ file arch/arm/footbridge/footbridge.c footbridge
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file arch/arm/footbridge/footbridge_machdep.c footbridge
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file arch/arm/footbridge/footbridge_io.c footbridge
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file arch/arm/footbridge/footbridge_pci.c footbridge
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file arch/arm/footbridge/footbridge_irq.S footbridge
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file arch/arm/arm32/irq_dispatch.S
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file arch/arm/footbridge/footbridge_irqhandler.c footbridge
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file arch/arm/footbridge/footbridge_clock.c footbridge
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file arch/arm/arm/softintr.c footbridge
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@ -1,4 +1,4 @@
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/* $NetBSD: footbridge_intr.h,v 1.3 2002/11/11 20:44:41 chris Exp $ */
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/* $NetBSD: footbridge_intr.h,v 1.4 2003/01/03 00:56:00 thorpej Exp $ */
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/*
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* Copyright (c) 2001, 2002 Wasabi Systems, Inc.
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@ -69,6 +69,8 @@
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#define __NEWINTR /* enables new hooks in cpu_fork()/cpu_switch() */
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#define ARM_IRQ_HANDLER _C_LABEL(footbridge_intr_dispatch)
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#ifndef _LOCORE
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#include <arm/cpufunc.h>
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@ -1,144 +0,0 @@
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/* $NetBSD: footbridge_irq.S,v 1.5 2003/01/02 23:54:39 thorpej Exp $ */
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/*
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* Copyright (c) 1998 Mark Brinicombe.
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* Copyright (c) 1998 Causality Limited
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Mark Brinicombe
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* for the NetBSD Project.
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include "opt_irqstats.h"
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#include "assym.h"
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#include <machine/asm.h>
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#include <machine/cpu.h>
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#include <machine/frame.h>
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#include <arm/footbridge/dc21285mem.h>
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#include <arm/footbridge/dc21285reg.h>
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/*
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* irq_entry:
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*
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* Main entry point for the IRQ vector on dc21285 CPUs. Calls
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* external interrupt dispatch routine.
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*/
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.text
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.align 0
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.Lcurrent_intr_depth:
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.word _C_LABEL(current_intr_depth)
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.Lastpending:
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.word _C_LABEL(astpending)
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ASENTRY_NP(irq_entry)
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sub lr, lr, #0x00000004 /* Adjust the lr */
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PUSHFRAMEINSVC /* Push an interrupt frame */
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/*
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* Note that we have entered the IRQ handler.
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* We are in SVC mode so we cannot use the processor mode
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* to determine if we are in an IRQ. Instead we will count the
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* each time the interrupt handler is nested.
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*/
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ldr r0, .Lcurrent_intr_depth
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ldr r1, [r0]
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add r1, r1, #1
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str r1, [r0]
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/* branch off into the external handler */
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mov r0, sp
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bl _C_LABEL(footbridge_intr_dispatch)
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/* Decremement the nest count. */
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ldr r0, .Lcurrent_intr_depth
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ldr r1, [r0]
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sub r1, r1, #1
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str r1, [r0]
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/*
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* If we're returning to user mode, check for pending ASTs.
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*/
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ldr r0, [sp] /* Get the SPSR from stack */
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and r0, r0, #(PSR_MODE) /* Test for USR32 mode before the IRQ */
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teq r0, #(PSR_USR32_MODE)
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bne .Lirqout /* Nope, get out now */
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.Lastloop:
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ldr r0, .Lastpending /* Do we have an AST pending? */
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ldr r1, [r0]
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teq r1, #0x00000000
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beq .Lirqout /* Nope, get out now */
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mov r1, #0x00000000
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str r1, [r0] /* Clear astpending */
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mrs r4, cpsr /* save CPSR */
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bic r0, r4, #(I32_bit) /* Enable IRQs */
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msr cpsr_c, r0
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mov r0, sp
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bl _C_LABEL(ast) /* ast(frame) */
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msr cpsr_c, r4 /* Disable IRQs */
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b .Lastloop /* Check for more ASTs */
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.Lirqout:
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PULLFRAMEFROMSVCANDEXIT
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movs pc, lr /* Exit */
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.bss
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.align 0
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.global _C_LABEL(astpending)
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_C_LABEL(astpending):
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.word 0
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.global _C_LABEL(current_intr_depth)
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_C_LABEL(current_intr_depth):
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.word 0
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/*
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* XXX Provide intrnames/intrcnt for legacy code, but
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* don't actually use them.
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*/
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.global _C_LABEL(intrnames), _C_LABEL(eintrnames)
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.global _C_LABEL(intrcnt), _C_LABEL(eintrcnt)
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_C_LABEL(intrnames):
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_C_LABEL(eintrnames):
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.global _C_LABEL(intrcnt), _C_LABEL(sintrcnt), _C_LABEL(eintrcnt)
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_C_LABEL(intrcnt):
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_C_LABEL(eintrcnt):
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/* End of footbridge_irq.S */
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@ -1,10 +1,10 @@
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# $NetBSD: files.ixp12x0,v 1.2 2002/07/20 03:09:03 ichiro Exp $
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# $NetBSD: files.ixp12x0,v 1.3 2003/01/03 01:08:00 thorpej Exp $
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#
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# Configuration info for Intel IXP12x0 CPU support
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#
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file arch/arm/ixp12x0/ixp12x0_intr.c
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file arch/arm/ixp12x0/ixp12x0_irq.S
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file arch/arm/arm32/irq_dispatch.S
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# IXP1200 Slow peripheral devices
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device ixpsip { [addr=-1], [size=0], [intr=-1] }: bus_space_generic
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@ -1,7 +1,7 @@
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/* $NetBSD: ixm1200_intr.h,v 1.1 2002/08/17 16:42:23 briggs Exp $ */
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/* $NetBSD: ixp12x0_intr.h,v 1.1 2003/01/03 01:07:57 thorpej Exp $ */
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/*
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* Copyright (c) 2002 Wasabi Systems, Inc.
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* Copyright (c) 2002, 2003 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Allen Briggs for Wasabi Systems, Inc.
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@ -35,12 +35,18 @@
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _IXM1200_INTR_H_
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#define _IXM1200_INTR_H_
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#ifndef _IXP12X0_INTR_H_
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#define _IXP12X0_INTR_H_
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#define ARM_IRQ_HANDLER _C_LABEL(ixp12x0_intr_dispatch)
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#ifndef _LOCORE
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int _splraise(int);
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int _spllower(int);
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void splx(int);
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void _setsoftintr(int);
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#endif /* _IXM1200_INTR_H_ */
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#endif /* ! _LOCORE */
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#endif /* _IXP12X0_INTR_H_ */
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@ -1,145 +0,0 @@
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/* $NetBSD: ixp12x0_irq.S,v 1.4 2003/01/02 23:54:41 thorpej Exp $ */
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/*
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* Copyright (c) 2002 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Jason R. Thorpe for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "assym.h"
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#include <machine/asm.h>
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#include <machine/cpu.h>
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#include <machine/frame.h>
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/*
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* irq_entry:
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*
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* Main entry point for the IRQ vector.
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*/
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.text
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.align 0
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Lcurrent_intr_depth:
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.word _C_LABEL(current_intr_depth)
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Lintr_dispatch:
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.word _C_LABEL(ixp12x0_intr_dispatch)
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Lastpending:
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.word _C_LABEL(astpending)
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ASENTRY_NP(irq_entry)
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sub lr, lr, #0x00000004 /* Adjust the lr */
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PUSHFRAMEINSVC /* Push an interrupt frame */
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/*
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* Note that we have entered the IRQ handler. We are
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* in SVC mode so we cannot use the processor mode to
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* determine if we are in an IRQ. Instead, we will
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* count each time the interrupt handler is nested.
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*/
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ldr r0, Lcurrent_intr_depth
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ldr r1, [r0]
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add r1, r1, #1
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str r1, [r0]
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/*
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* Call the C interrupt dispatch routine.
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*/
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mov r0, sp
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mov lr, pc
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ldr pc, Lintr_dispatch
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/* Decremement the nest count. */
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ldr r0, Lcurrent_intr_depth
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ldr r1, [r0]
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sub r1, r1, #1
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str r1, [r0]
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/*
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* If we're returning to user mode, check for pending ASTs.
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*/
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ldr r0, [sp] /* Get the SPSR from stack */
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and r0, r0, #(PSR_MODE) /* Test for USR32 mode before the IRQ */
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teq r0, #(PSR_USR32_MODE)
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bne Lirqout /* Nope, get out now */
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Lastloop:
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ldr r0, Lastpending /* Do we have an AST pending? */
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ldr r1, [r0]
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teq r1, #0x00000000
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beq Lirqout /* Nope, get out now */
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mov r1, #0x00000000
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str r1, [r0] /* Clear astpending */
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mrs r4, cpsr /* save CPSR */
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bic r0, r4, #(I32_bit) /* Enable IRQs */
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msr cpsr_c, r0
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mov r0, sp
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bl _C_LABEL(ast) /* ast(frame) */
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msr cpsr_c, r4 /* Disable IRQs */
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b Lastloop /* Check for more ASTs */
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Lirqout:
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PULLFRAMEFROMSVCANDEXIT
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movs pc, lr /* Exit */
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.bss
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.align 0
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.global _C_LABEL(astpending)
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_C_LABEL(astpending):
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.word 0
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.global _C_LABEL(current_intr_depth)
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_C_LABEL(current_intr_depth):
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.word 0
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/*
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* XXX Provide intrnames/intrcnt for legacy code, but
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* don't actually use them.
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*/
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.global _C_LABEL(intrnames), _C_LABEL(eintrnames)
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.global _C_LABEL(intrcnt), _C_LABEL(eintrcnt)
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_C_LABEL(intrnames):
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_C_LABEL(eintrnames):
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.global _C_LABEL(intrcnt), _C_LABEL(sintrcnt), _C_LABEL(eintrcnt)
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_C_LABEL(intrcnt):
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_C_LABEL(eintrcnt):
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@ -1,4 +1,4 @@
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# $NetBSD: files.pxa2x0,v 1.2 2002/12/20 01:10:11 bsh Exp $
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# $NetBSD: files.pxa2x0,v 1.3 2003/01/03 01:13:58 thorpej Exp $
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#
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# Configuration info for Intel PXA2[51]0 CPU support
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#
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@ -10,7 +10,7 @@ device pxaip { [addr=-1], [size=0], [intr=-1], [gpio=-1], [index=-1]} : bus_spac
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attach pxaip at mainbus
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file arch/arm/xscale/pxa2x0.c
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file arch/arm/xscale/pxa2x0_intr.c
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file arch/arm/xscale/pxa2x0_irq.S
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file arch/arm/arm32/irq_dispatch.S
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file arch/arm/xscale/pxa2x0_space.c
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#file arch/arm/xscale/pxa2x0_freqchg.S
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file arch/arm/xscale/pxa2x0_dma.c
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@ -1,4 +1,4 @@
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/* $NetBSD: pxa2x0_intr.c,v 1.1 2002/10/19 19:31:39 bsh Exp $ */
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/* $NetBSD: pxa2x0_intr.c,v 1.2 2003/01/03 01:13:58 thorpej Exp $ */
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/*
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* Copyright (c) 2002 Genetec Corporation. All rights reserved.
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@ -79,8 +79,6 @@ __volatile int intr_mask;
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int pxa2x0_imask[NIPL];
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static int extirq_level[ICU_LEN];
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int current_intr_depth;
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static __inline void
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__raise(int ipl)
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{
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@ -110,7 +108,6 @@ pxa2x0_irq_handler(struct clockframe *frame)
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int irqno;
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int saved_spl_level;
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++current_intr_depth;
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saved_spl_level = current_spl_level;
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/* get pending IRQs */
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@ -147,8 +144,6 @@ pxa2x0_irq_handler(struct clockframe *frame)
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if( softint_pending & intr_mask )
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pxa2x0_do_pending();
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--current_intr_depth;
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}
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static int
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@ -1,4 +1,4 @@
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/* $NetBSD: pxa2x0_intr.h,v 1.1 2002/10/19 19:31:39 bsh Exp $ */
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/* $NetBSD: pxa2x0_intr.h,v 1.2 2003/01/03 01:13:59 thorpej Exp $ */
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/* Derived from i80321_intr.h */
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@ -40,6 +40,10 @@
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#ifndef _PXA2X0_INTR_H_
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#define _PXA2X0_INTR_H_
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#define ARM_IRQ_HANDLER _C_LABEL(pxa2x0_irq_handler)
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#ifndef _LOCORE
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#include <arm/cpu.h>
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#include <arm/armreg.h>
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#include <arm/cpufunc.h>
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@ -158,4 +162,6 @@ void _setsoftintr(int);
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#endif /* !EVBARM_SPL_NOINTR */
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#endif /* ! _LOCORE */
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#endif _PXA2X0_INTR_H_
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@ -1,116 +0,0 @@
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/* $NetBSD: pxa2x0_irq.S,v 1.1 2002/10/19 19:31:40 bsh Exp $ */
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/*
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* This code is derived from i80200_irq.S by Jason R. Thorpe.
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*/
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/*
|
||||
* Copyright (c) 2002 Wasabi Systems, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Written by Jason R. Thorpe for Wasabi Systems, Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. All advertising materials mentioning features or use of this software
|
||||
* must display the following acknowledgement:
|
||||
* This product includes software developed for the NetBSD Project by
|
||||
* Wasabi Systems, Inc.
|
||||
* 4. The name of Wasabi Systems, Inc. may not be used to endorse
|
||||
* or promote products derived from this software without specific prior
|
||||
* written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
||||
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
|
||||
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "assym.h"
|
||||
|
||||
#include <machine/asm.h>
|
||||
#include <machine/cpu.h>
|
||||
#include <machine/frame.h>
|
||||
|
||||
/*
|
||||
* irq_entry:
|
||||
* Main entry point for the IRQ vector.
|
||||
*/
|
||||
|
||||
.text
|
||||
.align 0
|
||||
Lastpending:
|
||||
.word _C_LABEL(astpending)
|
||||
|
||||
ASENTRY_NP(irq_entry)
|
||||
sub lr, lr, #0x00000004 /* Adjust the lr */
|
||||
|
||||
PUSHFRAMEINSVC /* Push an interrupt frame */
|
||||
|
||||
mov r0, sp
|
||||
bl _C_LABEL(pxa2x0_irq_handler)
|
||||
1:
|
||||
|
||||
/*
|
||||
* If we're returning to user mode, check for pending ASTs.
|
||||
*/
|
||||
ldr r0, [sp] /* Get the SPSR from stack */
|
||||
and r0, r0, #(PSR_MODE) /* Test for USR32 mode before the IRQ */
|
||||
teq r0, #(PSR_USR32_MODE)
|
||||
bne Lirqout /* Nope, get out now */
|
||||
|
||||
Lastloop:
|
||||
ldr r0, Lastpending /* Do we have an AST pending? */
|
||||
ldr r1, [r0]
|
||||
teq r1, #0x00000000
|
||||
beq Lirqout /* Nope, get out now */
|
||||
|
||||
mov r1, #0x00000000
|
||||
str r1, [r0] /* Clear astpending */
|
||||
|
||||
mrs r4, cpsr_all /* save CPSR */
|
||||
bic r0, r4, #(I32_bit) /* Enable IRQs */
|
||||
msr cpsr_all, r0
|
||||
|
||||
mov r0, sp
|
||||
bl _C_LABEL(ast) /* ast(frame) */
|
||||
|
||||
msr cpsr_all, r4 /* Disable IRQs */
|
||||
b Lastloop /* Check for more ASTs */
|
||||
|
||||
Lirqout:
|
||||
PULLFRAMEFROMSVCANDEXIT
|
||||
movs pc, lr /* Exit */
|
||||
|
||||
.bss
|
||||
.align 0
|
||||
|
||||
.global _C_LABEL(astpending)
|
||||
_C_LABEL(astpending):
|
||||
.word 0
|
||||
|
||||
/*
|
||||
* XXX Provide intrnames/intrcnt for legacy code, but
|
||||
* don't actually use them.
|
||||
*/
|
||||
|
||||
.global _C_LABEL(intrnames), _C_LABEL(eintrnames)
|
||||
.global _C_LABEL(intrcnt), _C_LABEL(eintrcnt)
|
||||
_C_LABEL(intrnames):
|
||||
_C_LABEL(eintrnames):
|
||||
|
||||
.global _C_LABEL(intrcnt), _C_LABEL(sintrcnt), _C_LABEL(eintrcnt)
|
||||
_C_LABEL(intrcnt):
|
||||
_C_LABEL(eintrcnt):
|
||||
|
|
@ -1,4 +1,4 @@
|
|||
# $NetBSD: std.cats,v 1.2 2001/11/20 12:56:23 lukem Exp $
|
||||
# $NetBSD: std.cats,v 1.3 2003/01/03 00:56:01 thorpej Exp $
|
||||
#
|
||||
# standard NetBSD/cats options
|
||||
|
||||
|
|
@ -10,3 +10,5 @@ options EXEC_ELF32
|
|||
|
||||
# To support easy transit to ../arch/arm/arm32
|
||||
options ARM32
|
||||
|
||||
options ARM_INTR_IMPL="<arm/footbridge/footbridge_intr.h>"
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
# $NetBSD: std.ixm1200,v 1.3 2003/01/02 23:38:02 thorpej Exp $
|
||||
# $NetBSD: std.ixm1200,v 1.4 2003/01/03 01:08:04 thorpej Exp $
|
||||
#
|
||||
# standard NetBSD/evbarm for IXM1200 options
|
||||
|
||||
|
|
@ -17,7 +17,7 @@ options ARM32
|
|||
makeoptions LOADADDRESS="0xC0200000"
|
||||
makeoptions BOARDTYPE="ixm1200"
|
||||
|
||||
options ARM_INTR_IMPL="<arch/evbarm/ixm1200/ixm1200_intr.h>"
|
||||
options ARM_INTR_IMPL="<arch/arm/ixp12x0/ixp12x0_intr.h>"
|
||||
|
||||
# We need to configure the PCI bus.
|
||||
options PCI_NETBSD_CONFIGURE
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
# $NetBSD: std.netwinder,v 1.8 2001/12/09 05:00:47 atatat Exp $
|
||||
# $NetBSD: std.netwinder,v 1.9 2003/01/03 00:56:02 thorpej Exp $
|
||||
#
|
||||
# standard NetBSD/netwinder options
|
||||
|
||||
|
|
@ -11,5 +11,7 @@ options EXEC_ELF32
|
|||
# To support easy transit to ../arch/arm/arm32
|
||||
options ARM32
|
||||
|
||||
options ARM_INTR_IMPL="<arm/footbridge/footbridge_intr.h>"
|
||||
|
||||
makeoptions LOADADDRESS="0xF000C000"
|
||||
makeoptions ENTRYPOINT="nwstart"
|
||||
|
|
|
|||
Loading…
Reference in New Issue