P_*/L_* naming convention, and rename the in-kernel flags to avoid
conflict. (P_ -> PK_, L_ -> LW_ ). Add back the (now unused) LSDEAD
constant.
Restores source compatibility with pre-newlock2 tools like ps or top.
Reviewed by Andrew Doran.
kernel VM range is supposed to be mapped via reserved TLB entries,
so allow such VAs through.
Fixes kgdb failure observed by Jean-Francois Boudreault on port-powerpc
(thanks for testing, too).
ports have different IPL hierarchies. On macppc, IPL_VM is below IPL_AUDIO
and IPL_SERIAL so the queues got corrupted due to priority inversion.
Also fix a race condition in softintr_schedule() when testing "si_refs > 1",
it can lead to queue corruption and subsequent panic (below). As a side
effect, using PSL_EE directly is faster than going via spl*()/splx().
This is supposed to fix (XXX I don't have the hw):
Panic: kernel diagnostic assert "si->si_refs > 0" failed: file
"[...]arch/powerpc/powerpc/softintr.c" line 116
reported for example in:
http://mail-index.netbsd.org/port-macppc/2007/01/25/0001.html
Discussed with briggs@ and macallan@.
by Slava Semushin <slava.semushin@gmail.com>.
To verify that no nasty side effects of duplicate includes (or their
removal) have an effect here, I've compiled an i386/ALL kernel with
and without the patch, and the only difference in the resulting .o
files was in shifted line numbers in some assert() calls.
The comparison of the .o files was based on the output of "objdump -D".
Thanks to martin@ for the input on testing.
requests and centralizing them all. The result is that some of these
are not used on some architectures, but the documentation was updated
to reflect that.
- finish implementing splraiseipl (and makeiplcookie).
http://mail-index.NetBSD.org/tech-kern/2006/07/01/0000.html
- complete workqueue(9) and fix its ipl problem, which is reported
to cause audio skipping.
- fix netbt (at least compilation problems) for some ports.
- fix PR/33218.
to ensure trap code will work (that is 0 upto ${endkernel}) and leave the
rest to pmap_tlbmiss(). Mapping whole physmem into the kernel wired way
too many TLB entries, see
http://mail-index.netbsd.org/port-powerpc/2006/10/27/0000.html
for performance analysis. While there, be a bit more descriptive in
pmap_tlbmiss() comment and use macro instead of numeric constant.
OK by Simon Burge
First, remove process_checkioperm() calls from MD code. Similar checks
using kauth(9) routines (on the process scope, using appropriate action)
are done in the callers.
Add secmodel back-end to handle each subsystem.
make local variable const as well. Avoid writing to the now-const
variable, instead do the masking before in the trapframe register
assignment.
OK'ed by thorpej and nathanw.
dumpdev. this occurs when we try to set the dumpdev to a device
with no driver loaded. this fixes PR#34872.
in sys_swapctl, if bdevsw_lookup() fails, set dumpdev = NODEV
before calling cpu_dumpconf(). (this also fixes PR#34872.)
XXX: cpu_dumpconf() should probably be changed to take a dumpdev
XXX: and return an error in such cases, but that is a much more
XXX: intrusive change.
XXX2: this is only run-tested on sparc64 and compile tested on a
XXX2: couple of platforms.
introduced ppc4xx_tlb_reserve() API.
* ibm405gp UART0 used to be linear mapped. The VA happens to be inside kernel
segment, giving us the possibility of multiple VA matches in the TLB. This
is considered "programming error" by 405 core and results in "undefined
behaviour". We now avoid mapping peripherals in kernel segment.
* Some boards used to map hardwired RAM size. We now use the real size as
passed in by boot firmware.
pthread "related" panics like:
panic: remrunqueue: bit 18 not set
Stopped in pid 479.3 (exsprite) at netbsd:cpu_Debugger+0x10: lwz
r
0, r1, 0x14
db> bt
0x869abe00: at panic+0x1b4
0x869abe50: at remrunqueue+0x80
0x869abe60: at mi_switch+0x114
0x869abea0: at sa_unblock_userret+0x4e8
0x869abee0: at syscall_plain+0x224
0x869abf40: user SC trap #93 by 0x41949810: srr1=0xc030
r1=0x445fff40 cr=0x40000002 xer=0 ctr=0x41aae208 esr=0 pid=0x36
While there, cleanup IPL_ definitions somewhat and fix interrupt mask
calculation per spl(9).
OK by matt@
From the PR:
The cache is flushed using the bus address where the phys address
is required. Errors would be seen only on ports where address
translation is done between the bus and physical memory.
* ppc4xx_tlb_mapiodev(): resolve pa to va from reserved TLB entries
OK by matt@
XXX we'll keep TLB_NRESERVED defined until we fix explora to use new API
* don't try to decode vendor-specific PVR, print raw value instead.
* panic() if we see cache wasn't probed, we'd crash later anyway.
* rework the way PVR gets translated to core name.
* while there, normalize printf format ("%s: ...", device_xname(self), ...).
OK by matt@
pavel