Commit Graph

1196 Commits

Author SHA1 Message Date
simonb
2bf916e97d Implement a clkread() function for microtime() using a multu/mfhi
sequence using the reciprocal of the delay divisor to perform the
division.
Set the cp0 compare register so that it doesn't trigger interrupts and
reset the cp0 count register in the hardclock interrupt handler.
2002-03-06 07:47:57 +00:00
simonb
feb24029e7 Add the offset of ci_divisor_delay in struct cpu_info. 2002-03-06 07:32:15 +00:00
simonb
78c9211fca Add a field for the reciprocal of the divisor delay for use by microtime. 2002-03-06 07:31:38 +00:00
simonb
3fe666190f Wrap long line and remove a bogus XXX comment. 2002-03-06 03:25:09 +00:00
simonb
2c68c156c5 Only include <sys/exec_ecoff.h> if EXEC_ECOFF is defined.
Note that ELF is mandatory.
2002-03-06 00:22:09 +00:00
simonb
3ab34324e9 Remove a few unneeded include files. 2002-03-06 00:05:06 +00:00
simonb
1b5ddfe411 Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU
and support routines for the Broadcom CFE (Common Firmware Environment).

This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
2002-03-05 23:46:40 +00:00
simonb
f1dbc97679 Not used anymore. 2002-03-05 16:08:55 +00:00
simonb
811ee92532 Add support for MIPS32 and MIPS64 architectures:
- Build mips3/5900/32/64 support subroutines.
 - Move arch/mips/mips/fp.S to central location.
 - Move NOFPU to opt_cputype.h.
2002-03-05 16:08:00 +00:00
simonb
f340c57568 Values related to the MIPS32/MIPS64 Privileged Resource Architecture
(from Broadcom Corp).
2002-03-05 16:07:10 +00:00
simonb
9ac7c86a0f Adjust for 5900 include file changes. 2002-03-05 16:06:04 +00:00
simonb
3f2f4c9bf6 r5900_vector_init() is in mips_machdep.c now. 2002-03-05 16:05:26 +00:00
simonb
dd756c0ca5 Rename <mips/r5900/cpuregs.h> to <mips/r5900regs.h> and remove some
content no longer needed.
2002-03-05 16:04:57 +00:00
simonb
fcdc111c1a Cosmestic changes (more like the mips3+ code). 2002-03-05 16:03:22 +00:00
simonb
c5d34b4371 Remove the number of TLB entries for different rx39 CPUs - this info
is in the table in mips_machdep.c now.
2002-03-05 16:02:48 +00:00
simonb
c6bcfb2589 Add support for MIPS32 and MIPS64 architectures:
- Move away from using CPUISMIPS3; use MIPS_HAS_R4K_MMU instead.
 - Bump the Sysmap size a little for large-memory machines.
XXX: still need work, especially in pmap_procwr().
2002-03-05 16:01:25 +00:00
simonb
0f9c00fc2e Add support for MIPS32 and MIPS64 architectures:
- Move away from using CPUISMIPS3; use MIPS_HAS_R4K_MMU instead.
 - ANSIfy.
2002-03-05 15:57:20 +00:00
simonb
fa9c08ab16 Remove HPCMIPS_FLUSHCACHE_XXX debug code.
Remove old unused exception frame unwind code.
Change a MIPS3 check to a MIPS3_PLUS check.
ANSIfy.
2002-03-05 15:55:41 +00:00
simonb
278bfc1c02 Add support for MIPS32 and MIPS64 architectures:
- move away from using CPUISMIPS3; use MIPS_HAS_CLOCK instead.
2002-03-05 15:54:33 +00:00
simonb
351c1c16a6 Add support for MIPS32 and MIPS64 architectures:
- Use a table-driven CPU detection algorithm instead of multiple
   case statements.
 - Add MIPS32/64 feature detection using the architected CP0 registers
   (from Broadcom Corp).
 - Call MD mips_machdep_cache_config() function if
   __HAVE_MIPS_MACHDEP_CACHE_CONFIG is defined - used to set up the
   L2 cache on some ports.
2002-03-05 15:53:00 +00:00
simonb
ba8e2e82e4 Add support for MIPS32 and MIPS64 architectures:
- Remove all mmu-related code that may use 32 register on mips32-style
   implementatios and move them to mipsX_subr.S - which is then included
   from mips{3,32,64,5900}_subr.S with various control defines enabled.
 - Remove local cache instruction flags
 - Add badaddr64 (from Broadcom Corp).
2002-03-05 15:50:59 +00:00
simonb
9ed4fd257f Change a MIPS3 check to a MIPS3_PLUS check.
XXX: I'm not 100% sure of the intent of this code - it would seem that
 it needs a run-time check of CPU ISA to be completely correct...
2002-03-05 15:48:31 +00:00
simonb
d62813603c Check userland address and address alignent as two separate checks.
Fix for when mips_reg_t is 64-bits.
ANSIfy.
2002-03-05 15:46:51 +00:00
simonb
fe86ad150e Change MIPS3 checks to MIPS3_PLUS checks (XXX - still bogus!). 2002-03-05 15:44:40 +00:00
simonb
c9a3bd8900 Add support for MIPS32 and MIPS64 architectures:
- Move away from using CPUISMIPS3; use MIPS_HAS_R4K_MMU instead.
 - Add a command to dump cp0 state.
2002-03-05 15:43:25 +00:00
simonb
9b785c48f3 Cache ops for MIPS32/64 cpus. 2002-03-05 15:42:50 +00:00
simonb
0446046fde Add MIPS32/64 cache setup code (from Broadcom Corp). 2002-03-05 15:42:21 +00:00
simonb
cae6e0e516 Prototypes for MIPS32/64 cache ops. 2002-03-05 15:41:48 +00:00
simonb
0ff59237ca Change a MIPS3 check to a MIPS3_PLUS check (XXX - still bogus!). 2002-03-05 15:41:14 +00:00
simonb
01422aae5c Add support for MIPS32 and MIPS64 architectures:
- move away from using CPUISMIPS3; use MIPS_HAS_CLOCK instead.
2002-03-05 15:40:10 +00:00
simonb
1d05db445d Add support for MIPS32 and MIPS64 architectures:
- Move away from using CPUISMIPS3; use MIPS_HAS_R4K_MMU instead.
2002-03-05 15:39:31 +00:00
simonb
934c4ba555 Add support for MIPS32 and MIPS64 architectures:
Remove the unused PSL_USERCLR and BASEPRI macros.
2002-03-05 15:38:33 +00:00
simonb
b255c47737 Add support for MIPS32 and MIPS64 architectures:
Better cache coherency attribute macros (from Broadcom Corp).
2002-03-05 15:37:32 +00:00
simonb
f38d391749 Add support for MIPS32 and MIPS64 architectures:
- Add mips32 and mips64 locore function prototypes.
 - Add mips3_lw_a64() and mips3_sw_a64() for access data at any
   64bit address (from Broadcom Corp).
 - Add Broadcom and Sandcraft CPU company ids.
2002-03-05 15:36:51 +00:00
simonb
2fab526863 Add support for MIPS32 and MIPS64 architectures:
- Add XKPHYS macros (from Broadcom Corp).
 - Add some r5900 register bit definitions.
 - Add extra exception vector addresses for mips32/mips64 and r5900.
 - Make the mips cp0 register definitions available from both asm and C.
 - Add some Alchemy and Sandcraft CPU ids.
 - Add r3000, tx39xx and r4x00 CPU revision ids.
 - Remove defines for the number of TLBs on some CPUs.
2002-03-05 15:35:22 +00:00
simonb
60fe625bd0 Add support for MIPS32 and MIPS64 architectures:
- Clean up (somewhat) mips1 vs mips3+ configuration.
   XXX:  this is still quite messy.
 - Add cpu frequency info to struct cpu_info.
 - ANSIfy.
2002-03-05 15:34:04 +00:00
simonb
ef0fcacb94 ANSIfy. 2002-03-05 15:12:58 +00:00
simonb
8070cbd848 Add 4way 16/32-byte-line cache op primitives. 2002-03-05 14:32:26 +00:00
simonb
e8e49d677b Don't explicitly depend locore_*.S and fp.S on assym.h - this is done
for all .S files in /sys/conf/Makefile.kern.inc.
2002-03-05 14:28:31 +00:00
simonb
7bd5992f7a Fix for when we have 64 bit registers enabled for userland (but still
using the o32 API).
2002-03-05 14:23:50 +00:00
simonb
4a931bedb8 KNF whitespace. 2002-03-05 14:21:32 +00:00
simonb
59f53aab95 The 64-bit safe, ILP32 o32 model is safe with the current stdarg
implementation.
2002-03-05 14:18:12 +00:00
simonb
836b7ec262 Include <machine/cdefs.h> to select 32/64bit APIs. 2002-03-05 14:17:16 +00:00
simonb
b2fb45331b ANSIfy. 2002-03-05 14:08:43 +00:00
simonb
58faa5f0ca Clean up #ifdef checks a little. 2002-03-05 14:08:07 +00:00
simonb
6f0fb25121 Don't need to declare phys_map - it is declared in <uvm/uvm_extern.h>. 2002-03-04 02:43:22 +00:00
simonb
4324f37586 Use "#define<tab>". 2002-02-28 03:17:23 +00:00
christos
e8116a8f5b - Use DEV_ constants, instead of documenting the numbers!
- Delete cdev_decl(mm); where appropriate, and other hand-crufting [hi powerpc!]
2002-02-27 01:20:51 +00:00
simonb
e19a9be04b Note that "addu $x, $y, $0" is a "move" only in 32-bit mode.
XXX: need to revisit this.
2002-02-22 16:18:36 +00:00
simonb
2d8577fb83 Clean up some rampant code duplication wrt ieee number handling:
- Add alignment-safe double and float unions.
 - Use the above for the __infinity and __nan constants on all
   architectures that use the standard ieee754 representation of
   those constants.
 - Add a single copy of various ieee754 math functions (frexp, isinf,
   isnan, ldexp and modf) that had numerous duplicates among the
   arch-specific directories.
 - Use the above functions on all architectures where the generic C
   versions where used.  Architectures that had local assembly
   routines are untouched (for those functions only).
2002-02-19 13:08:12 +00:00