thorpej
331a7f56c1
Remove some debugging code no longer relevant now that we have DMA
...
window chaining.
1998-06-06 23:11:52 +00:00
thorpej
eabad6b572
Implement bus_space_{alloc,free}() for swiz PCI I/O space.
1998-06-06 22:44:46 +00:00
thorpej
7a6d646c9b
Implement bus_space_{alloc,free}() for BWX bus space.
1998-06-06 22:28:16 +00:00
thorpej
30f9be231f
Restructure cpu_reboot() a bit, and add support for powering down
...
on the Sun4m if RB_POWERDOWN is specified.
1998-06-06 21:46:51 +00:00
thorpej
1c6a275e9c
Only attempt the powerdown if the power register was mapped.
1998-06-06 21:40:20 +00:00
thorpej
402c48737f
needs-flag'ize the power device.
1998-06-06 21:30:34 +00:00
thorpej
9553573381
If we have APM, only power down if RB_POWERDOWN was specified (fall into
...
RB_HALT case if it fails).
1998-06-06 21:27:31 +00:00
thorpej
fe17c44d6c
Add support for software powerdown of the Digital Personal Workstation.
1998-06-06 20:53:41 +00:00
thorpej
04ba8480ae
Use REGVAL64() to frob the Pyxis interrupt mask register.
1998-06-06 20:42:36 +00:00
thorpej
098dd211c7
Define a REGVAL64() for some Pyxis registers.
1998-06-06 20:40:14 +00:00
thorpej
49aea111fb
If the platform specified a powerdown hook, and howto has RB_POWERDOWN,
...
call the hook. If the hook fails, print a warning, and just halt (RB_HALT
is implied by RB_POWERDOWN).
1998-06-06 20:39:04 +00:00
thorpej
1733ad8dc5
Clean up a little, and add a `powerdown' hook in the platform structure.
1998-06-06 20:18:50 +00:00
thorpej
d08070a693
Add a comment describing the locking needs of the alpha_sgmap.
1998-06-06 20:12:28 +00:00
augustss
db50fa53b8
Add Aria driver.
1998-06-06 10:14:21 +00:00
mrg
e666cd4b3b
install floppy kernel
1998-06-06 05:36:53 +00:00
mrg
ff6c535817
sync with other md_root.c files.
1998-06-06 05:12:54 +00:00
mrg
4bc09321a9
add md to the "sparc_nam2nlk" and "chr2blk" arrays. the former fixes
...
panics seen on a floppy boot in setroot() as it could not properly
determine the root device.
1998-06-06 05:03:23 +00:00
thorpej
85d08836f1
- Don't call *_dma_init() twice; there's no need to. Just do it in *attach().
...
- Display Pyxis revision properly.
1998-06-06 01:33:44 +00:00
thorpej
c0fa3c6ac4
Don't call *_dma_init() twice; there's no need to. Just do it in *attach().
1998-06-06 01:33:23 +00:00
thorpej
59d76407b4
Display information about which sgmap we're attempting to initialize
...
if we die in alpha_sgmap_init().
1998-06-06 01:31:46 +00:00
ragge
08079a8f21
Don't compile in any rasterconsole code.
1998-06-05 22:17:02 +00:00
ragge
88d55c928c
Add virtual console support.
1998-06-05 22:02:56 +00:00
thorpej
9331237596
Oops, turn off some debugging printfs.
1998-06-05 21:47:14 +00:00
thorpej
bf8523f4e4
- Egads! There are Pyxis "Pass 1" chips that do not have the DMA bug!
...
Use the check recommended by the Digital Workstation engineers; look
for Miata 1 systems (i.e. with Intel SIO). From Andrew Gallatin.
- Update copyright (Pyxis and BWX).
1998-06-05 19:25:19 +00:00
thorpej
f251e3372d
Don't attempt to map the PCI IDE interrupt at bus 0 device 11 on the
...
AlphaPC 164 and AlphaPC 164LX - these are wired to compatibility mode.
1998-06-05 19:15:41 +00:00
thorpej
1aa688234e
Miata 1 has an Intel SIO at bus 0 device 7 and a CMD PCI IDE at bus 0
...
device 4. Miata 1.5 and Miata 2 have a Cypress at device 7 and PCI IDE
at functions 1 and 2 of the Cypress (like the PC164SX). These on-board
PCI IDE controllers are wired to compatibility mode, so don't bother
trying to map the interrupt.
1998-06-05 19:04:51 +00:00
thorpej
a1c151d56b
Add system variation for Miata 1.5.
1998-06-05 18:18:37 +00:00
thorpej
c072110af0
Actually, I did use a few of them on this file (I wasn't clear enough
...
in my mail to Ross, I guess...)
1998-06-05 17:42:53 +00:00
thorpej
bb362059ac
On Pass 1 Pyxis, disable PCI Read Prefetching, and warn the user about
...
the DMA bug that exists on this Pyxis revision.
1998-06-05 17:24:11 +00:00
thorpej
29977868a7
What was called CNFG in ALCOR and ALCOR2 is actually called PYXIS_CTRL1
...
in Pyxis. Add a comment to this fact.
1998-06-05 17:22:34 +00:00
thorpej
73e5032ac9
Define the Pyxis-specific bits in the CIA_CSR_REV register (ID mask, and
...
the ID for the 21174).
1998-06-05 17:16:31 +00:00
thorpej
2701ea3ef3
Add DEC_550 (Miata).
1998-06-05 17:03:07 +00:00
ross
5790ee09ee
Revert...Jason didn't use Andrew's diffs.
1998-06-05 15:28:40 +00:00
mrg
428a0d387a
remove old (now broken) memory disks hooks code.
1998-06-05 15:00:10 +00:00
mrg
135e6dc7e0
make this work with new md root stuff.
1998-06-05 14:57:55 +00:00
tsubai
26eb9abb32
Add support for NWB-231A 4-port RS-232C card.
1998-06-05 14:19:22 +00:00
tsubai
780f7fcf6f
Remove excessive cache flush.
1998-06-05 12:34:06 +00:00
tsubai
8f262b2d67
Add (missing) "filedesc"
1998-06-05 12:24:44 +00:00
tsubai
6bf20f4c29
Add support for UVM and MACHINE_NEW_NONCONTIG.
1998-06-05 12:22:43 +00:00
sakamoto
9125a5f198
Merge in MACHINE_NEW_NONCONTIG support and some fix from Tsubai-San.
...
UVM support.
1998-06-05 11:27:09 +00:00
ross
8f455480ef
Tweak the copyrights a little bit. pci_550.h gets a TNF copyright, not
...
CMU, and pci_550.c keeps TNF but gets "Andrew Gallatin and Jason R. Thorpe".
1998-06-05 03:34:27 +00:00
thorpej
cf914cac00
oops, read CNFG on all Pyxis revs.
1998-06-05 02:15:38 +00:00
thorpej
cbaedc8675
Support for the Digital Personal Workstation [456]xx, a.k.a. Miata (systype
...
DEC_550). Mostly cloned from the EB164 systype, with some modifications
from myself, and a few more from Andrew Gellatin.
1998-06-05 02:13:41 +00:00
thorpej
3cfb38c5d1
Define the Pyxis interrupt request register.
1998-06-05 00:53:02 +00:00
thorpej
3249813e11
For whatever reason, the firmware seems to enable PCI loopback mode if it
...
also enables BWX. Make sure it's enabled if we have an old, buggy firmware
rev.
1998-06-04 22:58:33 +00:00
thorpej
d4d49905dd
Add support for using BWX for PCI config space and PCI i/o and mem space
...
on the ALCOR2 and Pyxis. BWX is enabled iff:
- It hasn't been disabled by the user (patch `cia_use_bwx' or build cia.o
with the option "CIA_USE_BWX=0"),
- it's enabled in CIA_CSR_CNFG,
- we are running on an EV5-family processor,
- BWX is in the processor's capabilities mask.
1998-06-04 21:34:45 +00:00
ragge
57ce421691
Clean upp system detect code. Enable primary cache on VS3100.
1998-06-04 19:42:14 +00:00
thorpej
616125f8d1
Deal with a hardware bug in Pass 1 and Pass 2 Pyxis chips. Basically,
...
the scatter/gather TLB cannot be invalidated on these chips. So, to
work around this, we configure the otherwise unsed DMA Window 2 as a
2M SGMAP window at 128M, point all of its page table entries at the
DMA spill page, and, when the TLB is to be invalidated, put the PCI bus
into loopback mode, and create a target hit on Window 2 every 64k for
the number of TLB entries (plus a few ... it seems to not work unless
we read a few extra times), forcing out old TLB entries to make room for
the new, dummy target hits.
1998-06-04 18:11:23 +00:00
mark
c6d1832868
Include all the correct header files to get the prototypes of all the
...
soft net interrupt functions.
Handle NETISR_NATM soft interrupts.
1998-06-04 17:45:50 +00:00
mark
61298c0cbf
Type postmortem_active as an int. (Pointed out by Patrick Welche).
1998-06-04 17:44:18 +00:00