the IRQ has been cleared on the drive.
- use pa->pa_class instead of re-reading PCI_CLASS_REG when possible
- Add support for Highpoint HPT366 and HPT370 (370 untested), based
on patches from Roger Brooks <R.S.Brooks@liverpool.ac.uk> posted on
current-users Mach, 15. Given how Highpoint docs have been wrong for the
366, the 370 is likely to not work.
Thanks to Chris Cappuccio <chris@dqc.org> for sending me the Highpoint
docs, and to Total Archive (http://www.totalarchive.com/) for sending
me hardware.
if an IRQ was not detected, unless the force flag was given. Use this to
detect if the IRQ was for us (closer to shared IRQ for controllers which
don't have their own IRQ handler in pciide.c) and to poll for DMA xfer.
Also makes the timeout recovery code simpler.
- ATAPI cleanup: don't call controller-specific functions from atapiconf.c
(wdc_*), so that it's possible to attach an atapibus to something else
than a wdc/pciide (Hi Lennart :).
Overload struct scsi_adapter with struct atapi_adapter, defined
as struct scsi_adapter + atapi-specific callbacks. scsipi_link still points
to an scsi_adapter, atapi code casts it to atapi_adapter if needed.
Move atapi_softc to atapiconf.h so that it can be used by the underlying
controller code (e.g. atapi_wdc.c).
Add an atapi-specific callback *atapi_probedev(), which probe a drive
in a controller-specific way, allocate the sc_link and fills in the
ataparams if needed. It then calls atapi_probedev() (from atapiconf.c)
to do the generic initialisations and attach the device.
- While I'm there merge and centralise the state definitions in atavar.h.
It should now be possible to use a common ata/atapi routine to set the
drive's modes (will do later).
"Don't enable UDMA modes for revisions of SiS 5513 < 0xd0
The only revisions I know which don't actually support UDMA are 0x09 and below..
But the only revision I know which does support UDMA is 0xd0 (and presumably
above that)"
chip-dependant code this required the following changes:
- Instead of attaching the device in a generic way with some chip-dependant
routines, use a chip-dependant attach routine with some common code
factored out. The code is marginally bigger, but this allows the CMD64x
flag hack to go away.
- For chips that report per-channel 'irq triggered', test this before calling
wdcintr() for the native-pci irq case (compat intr can't be shared),
as wdcintr() has no good way to know if a irq was for it or not, and
ends up with irq loss. XXX for chips that don't have this feature irq sharing
will not work properly !
- add my copyrigth notice (could have been done some time ago I think :)
There are still some issues to be solved with the Promise controller and
ATAPI devices.
Many thanks to Paul Newhouse for shipping me 2 Ultra/33 boards for doing this
work.
"If a channel has no drives, do *not* unmap its I/O regions.
It's not really safe to use them for anything else, and in legacy mode it
will just cause us to probe the channel again as an ISA device."
- keep the modes supported by the drive in struct ata_drive_datas (will be
later used for downgrading the DMA/PIO mode on error)
- use config flags to force/disable PIO/DMA/UDMA modes
- For the CMD PCI0643/6 setup DMA mode to DMA Read multiple.
bouyer