Commit Graph

23 Commits

Author SHA1 Message Date
nisimura df657b5158 Count and record memory error interrupts with evcnt(9). 2001-08-27 02:00:16 +00:00
nisimura 9fac675c1e Forgot to commit changes of intrcnt[] array and its indices. 2001-08-22 08:23:09 +00:00
nisimura d3320a155b NetBSD/pmax now has GENERIC_SOFT_INTERRUPTS. 2001-08-22 06:59:38 +00:00
thorpej bf2dcec4f5 Remove the use of splimp() from the NetBSD kernel. splnet()
and only splnet() is allowed for the protection of data structures
used by network devices.
2001-04-13 23:29:55 +00:00
thorpej 316dcc474b splvec.splimp -> splvec.splvm 2001-04-12 19:21:20 +00:00
thorpej d85a75f583 Make sure everybody has an splvm() and equate it with splimp() (splimp()
is the historical name for this interrupt level, and the historical name
is going to go away in the near future).
2001-01-14 02:00:37 +00:00
thorpej 58e7a6954b Add spllock(). See spl(9) for details. 2000-08-22 19:46:26 +00:00
thorpej 23a7f255d4 Make sure we provide splsched() as described in spl(9). 2000-08-21 02:06:31 +00:00
nisimura 3dd5742b63 Change to have cpu_intr() peculiar to DECstations; have ssir global
variable and cpu_intr() body in machdep.c.  Reorder and rename
model specific interrupt handler arguments.  Fixup machine/intr.h and
machine/cpu.h appropriately.
2000-04-11 02:43:51 +00:00
soda 1c5551f260 splsoftnet() should block softclock() too. 2000-04-03 11:44:19 +00:00
nisimura 4c043eb094 Arrange 'vmstat -i' to show 'optslotN'; for interrupt counts of TC slot N
as well as DECsystem 5100 optional serial card slot N.
2000-03-10 01:31:22 +00:00
nisimura 582e9de235 - Have SYS_DEV_xxx device cookie symbols to select and install proper
interrupt handlers into intrtab[] array, rather than the idea of devices
  in 'psuedo' TURBOchannel slots.
- Nuke symbols for psuedo TC slots.
- Abandon never/unlikely used intr_disestablish()s.
2000-02-29 04:41:47 +00:00
simonb bdf420bdbf Redo interrupt establishment, based in part on work on the
[nisimura-pmax-wscons] branch and suggestions from Toru Nisimura:
 - Remove bogus tc_slot_info[] name for interrupt handling array
   and replace with simplified struct intrhand  intrtab[] array.
 - Add intr_establish() and intr_disestablish() function pointers
   to struct platform and initialise this in each model-specific
   initialisation, and remove global tc_enable_interrupt function
   pointer.
 - Remove model-specific function declarations from ibus/ibusvar.h.
This is functionally identical to the current scheme, and doesn't
yet try to commonise interrupt establishment by bus type as the
[nisimura-pmax-wscons] branch does.

Also, move cpuspeed variable from autoconf.c to machdep.c
2000-01-14 13:45:21 +00:00
ad 838b5e08c9 - Fix RCS Ids.
- Spacing.
- Protect from multiple inclusion in a consistant way (except on headers
  that do nothing except function as mips header wrappers).
2000-01-09 15:34:41 +00:00
simonb ee075b7de7 Function prototype cleanup. 2000-01-08 01:02:35 +00:00
thorpej eb20bbc780 Change the semantics of splsoftclock() to be like other spl*() functions,
that is priority is rasied.  Add a new spllowersoftclock() to provide the
atomic drop-to-softclock semantics that the old splsoftclock() provided,
and update calls accordingly.

This fixes a problem with using the "rnd" pseudo-device from within
interrupt context to extract random data (e.g. from within the softnet
interrupt) where doing so would incorrectly unblock interrupts (causing
all sorts of lossage).

XXX 4 platforms do not have priority-raising capability: newsmips, sparc,
XXX sparc64, and VAX.  This platforms still have this bug until their
XXX spl*() functions are fixed.
1999-08-05 18:08:08 +00:00
nisimura 8286166c86 - Call _splnone() explicitely after auto config. was well done to make
sure SOFT_INTs cleared before interrupt processing is started.
1999-05-31 07:42:56 +00:00
nisimura 014ba724c0 - Rework spl(9) implementation. Use _spl*() processor mask manipulating
routines now reside in locore.S.  No functional difference is expected.
- Replace abused splx() abuse with _splset() to change MIPS processor
interrupt mask bit.  'mips/trap.c' side will be fixed soon.
1999-05-25 04:17:57 +00:00
nisimura e37ce1c5b6 Make spl(9) rountines target port dependent. delay() is also port
dependent anticipating a target with high resolution timer available
for on-the-fly re-programming.  Enum decstation_t was removed from MI
trap.c.
1998-08-25 01:55:38 +00:00
jonathan fff42c01c8 Define IPL_ constants for pmax. 1998-03-30 09:07:08 +00:00
jonathan 6975dc93a9 Split sys/arch/pmaxpmax/{machdep.c,trap.c} as suggested by Jason Thorpe:
* add "Platform" support inpmax/pmax/sysconf.c and pmax/include/sysconf.h
   (based on Alpha cpuconf.[ch], with a namechange to avoid clashes with
   support for  models of MIPS cpus. They  differ more than Alphas).

 * For each supported model of DECstation, create a separate file
   with the support for that model.  Use model codenames, since
   support is really baseboard-specific and CPU daugherboards can change.
   Move code from machdep.c and pmax_trap.c,
   Add sysconf (nee "cpuconf") support.

 * Rename model-specific functions to match sysconf names.

 * Clean up autoconf.c.  Use platform callbacks.

 * Retire pmax_trap.c.

Leaves  I/O bus configuration and console configuration untouched.
1998-03-25 03:57:53 +00:00
perry 015e898c02 RCSID Police. 1998-01-05 07:02:46 +00:00
jonathan 64a7794048 <machine/intr.h> is required. Supply an empty one.
VS: ----------------------------------------------------------------------
1997-10-26 10:41:32 +00:00