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splsoftnet() should block softclock() too.

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This commit is contained in:
soda 2000-04-03 11:44:19 +00:00
parent c1acffff5c
commit 1c5551f260
5 changed files with 65 additions and 62 deletions
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38
sys/arch/arc/arc/machdep.c
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@ -1,4 +1,4 @@
/* $NetBSD: machdep.c,v 1.32 2000/03/25 10:14:13 nisimura Exp $ */
/* $NetBSD: machdep.c,v 1.33 2000/04/03 11:44:19 soda Exp $ */
/* $OpenBSD: machdep.c,v 1.36 1999/05/22 21:22:19 weingart Exp $ */
/*
@ -193,12 +193,12 @@ static int atoi __P((const char *, int));
int safepri = MIPS3_PSL_LOWIPL;
struct splvec splvec = { /* XXX will go XXX */
MIPS_SPLHIGH, /* splbio */
MIPS_SPLHIGH, /* splnet */
MIPS_SPLHIGH, /* spltty */
MIPS_SPLHIGH, /* splimp */
MIPS_SPLHIGH, /* splclock */
MIPS_SPLHIGH, /* splstatclock */
MIPS_INT_MASK_SPLHIGH, /* splbio */
MIPS_INT_MASK_SPLHIGH, /* splnet */
MIPS_INT_MASK_SPLHIGH, /* spltty */
MIPS_INT_MASK_SPLHIGH, /* splimp */
MIPS_INT_MASK_SPLHIGH, /* splclock */
MIPS_INT_MASK_SPLHIGH, /* splstatclock */
};
extern struct user *proc0paddr;
@ -266,12 +266,12 @@ mach_init(argc, argv, envv)
/*
* Set up interrupt handling and I/O addresses.
*/
splvec.splnet = MIPS_INTMASK_0_to_3;
splvec.splbio = MIPS_INTMASK_0_to_3;
splvec.splimp = MIPS_INTMASK_0_to_3;
splvec.spltty = MIPS_INTMASK_0_to_3;
splvec.splclock = MIPS_INTMASK_0_to_5;
splvec.splstatclock = MIPS_INTMASK_0_to_5;
splvec.splnet = MIPS_INT_MASK_SPL3;
splvec.splbio = MIPS_INT_MASK_SPL3;
splvec.splimp = MIPS_INT_MASK_SPL3;
splvec.spltty = MIPS_INT_MASK_SPL3;
splvec.splclock = MIPS_INT_MASK_SPL5;
splvec.splstatclock = MIPS_INT_MASK_SPL5;
break;
case NEC_RD94:
@ -286,12 +286,12 @@ mach_init(argc, argv, envv)
/*
* Set up interrupt handling and I/O addresses.
*/
splvec.splnet = MIPS_INTMASK_0_to_2;
splvec.splbio = MIPS_INTMASK_0_to_2;
splvec.splimp = MIPS_INTMASK_0_to_2;
splvec.spltty = MIPS_INTMASK_0_to_2;
splvec.splclock = MIPS_INTMASK_0_to_5;
splvec.splstatclock = MIPS_INTMASK_0_to_5;
splvec.splnet = MIPS_INT_MASK_SPL2;
splvec.splbio = MIPS_INT_MASK_SPL2;
splvec.splimp = MIPS_INT_MASK_SPL2;
splvec.spltty = MIPS_INT_MASK_SPL2;
splvec.splclock = MIPS_INT_MASK_SPL5;
splvec.splstatclock = MIPS_INT_MASK_SPL5;
break;
case DESKSTATION_RPC44:

77
sys/arch/arc/include/intr.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: intr.h,v 1.2 2000/01/23 21:01:56 soda Exp $ */
/* $NetBSD: intr.h,v 1.3 2000/04/03 11:44:20 soda Exp $ */
/*
* Copyright (c) 1998 Jonathan Stone. All rights reserved.
@ -33,32 +33,32 @@
#ifndef _ARC_INTR_H_
#define _ARC_INTR_H_
#define IPL_NONE 0 /* disable only this interrupt */
#define IPL_BIO 1 /* disable block I/O interrupts */
#define IPL_NET 2 /* disable network interrupts */
#define IPL_TTY 3 /* disable terminal interrupts */
#define IPL_IMP 4 /* memory allocation */
#define IPL_CLOCK 5 /* disable clock interrupts */
#define IPL_STATCLOCK 6 /* disable profiling interrupts */
#define IPL_NONE 0 /* disable only this interrupt */
#define IPL_BIO 1 /* disable block I/O interrupts */
#define IPL_NET 2 /* disable network interrupts */
#define IPL_TTY 3 /* disable terminal interrupts */
#define IPL_IMP 4 /* memory allocation */
#define IPL_CLOCK 5 /* disable clock interrupts */
#define IPL_STATCLOCK 6 /* disable profiling interrupts */
#if 0 /* XXX */
#define IPL_SERIAL 7 /* disable serial hardware interrupts */
#define IPL_SERIAL 7 /* disable serial hardware interrupts */
#endif
#define IPL_HIGH 8 /* disable all interrupts */
#define NIPL 9
#define IPL_HIGH 8 /* disable all interrupts */
#define NIPL 9
/* Interrupt sharing types. */
#define IST_NONE 0 /* none */
#define IST_PULSE 1 /* pulsed */
#define IST_EDGE 2 /* edge-triggered */
#define IST_LEVEL 3 /* level-triggered */
#define IST_NONE 0 /* none */
#define IST_PULSE 1 /* pulsed */
#define IST_EDGE 2 /* edge-triggered */
#define IST_LEVEL 3 /* level-triggered */
/* Soft interrupt masks. */
/* XXX - revisit here */
#define SIR_CLOCK 31
#define SIR_NET 30
#define SIR_CLOCKMASK ((1 << SIR_CLOCK))
#define SIR_NETMASK ((1 << SIR_NET) | SIR_CLOCKMASK)
#define SIR_ALLMASK (SIR_CLOCKMASK | SIR_NETMASK)
#define SIR_CLOCK 31
#define SIR_NET 30
#define SIR_CLOCKMASK ((1 << SIR_CLOCK))
#define SIR_NETMASK ((1 << SIR_NET) | SIR_CLOCKMASK)
#define SIR_ALLMASK (SIR_CLOCKMASK | SIR_NETMASK)
#ifdef _KERNEL
#ifndef _LOCORE
@ -76,9 +76,21 @@ extern void _clrsoftintr __P((int));
#define setsoftclock() _setsoftintr(MIPS_SOFT_INT_MASK_0)
#define setsoftnet() _setsoftintr(MIPS_SOFT_INT_MASK_1)
#define clearsoftclock() _clrsoftintr(MIPS_SOFT_INT_MASK_0)
#define clearsoftnet() _clrsoftintr(MIPS_SOFT_INT_MASK_1)
#define clearsoftnet() _clrsoftintr(MIPS_SOFT_INT_MASK_1)
/*
* nesting interrupt masks.
*/
#define MIPS_INT_MASK_SPL_SOFT0 MIPS_SOFT_INT_MASK_0
#define MIPS_INT_MASK_SPL_SOFT1 (MIPS_SOFT_INT_MASK_1|MIPS_INT_MASK_SPL_SOFT0)
#define MIPS_INT_MASK_SPL0 (MIPS_INT_MASK_0|MIPS_INT_MASK_SPL_SOFT1)
#define MIPS_INT_MASK_SPL1 (MIPS_INT_MASK_1|MIPS_INT_MASK_SPL0)
#define MIPS_INT_MASK_SPL2 (MIPS_INT_MASK_2|MIPS_INT_MASK_SPL1)
#define MIPS_INT_MASK_SPL3 (MIPS_INT_MASK_3|MIPS_INT_MASK_SPL2)
#define MIPS_INT_MASK_SPL4 (MIPS_INT_MASK_4|MIPS_INT_MASK_SPL3)
#define MIPS_INT_MASK_SPL5 (MIPS_INT_MASK_5|MIPS_INT_MASK_SPL4)
#define MIPS_INT_MASK_SPLHIGH MIPS_INT_MASK_SPL5
#define splhigh() _splraise(MIPS_INT_MASK)
#define spl0() (void)_spllower(0)
#define splx(s) (void)_splset(s)
#define splbio() (_splraise(splvec.splbio))
@ -88,11 +100,13 @@ extern void _clrsoftintr __P((int));
#define splpmap() (_splraise(splvec.splimp))
#define splclock() (_splraise(splvec.splclock))
#define splstatclock() (_splraise(splvec.splstatclock))
#define spllowersoftclock() _spllower(MIPS_SOFT_INT_MASK_0)
#define splsoftclock() _splraise(MIPS_SOFT_INT_MASK_0)
#define splsoftnet() _splraise(MIPS_SOFT_INT_MASK_1)
#define splhigh() _splraise(MIPS_INT_MASK_SPLHIGH)
#define spllpt() spltty() /* lpt driver */
#define splsoftclock() _splraise(MIPS_INT_MASK_SPL_SOFT0)
#define splsoftnet() _splraise(MIPS_INT_MASK_SPL_SOFT1)
#define spllowersoftclock() _spllower(MIPS_INT_MASK_SPL_SOFT0)
#define spllpt() spltty() /* lpt driver */
struct splvec {
int splbio;
@ -104,17 +118,6 @@ struct splvec {
};
extern struct splvec splvec;
/* Conventionals ... */
#define MIPS_SPLHIGH (MIPS_INT_MASK)
#define MIPS_SOFT_INT_MASK (MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1)
#define MIPS_INTMASK_0 (MIPS_INT_MASK_0|MIPS_SOFT_INT_MASK)
#define MIPS_INTMASK_0_to_1 (MIPS_INT_MASK_1|MIPS_INTMASK_0)
#define MIPS_INTMASK_0_to_2 (MIPS_INT_MASK_2|MIPS_INTMASK_0_to_1)
#define MIPS_INTMASK_0_to_3 (MIPS_INT_MASK_3|MIPS_INTMASK_0_to_2)
#define MIPS_INTMASK_0_to_4 (MIPS_INT_MASK_4|MIPS_INTMASK_0_to_3)
#define MIPS_INTMASK_0_to_5 (MIPS_INT_MASK_5|MIPS_INTMASK_0_to_4)
/*
* Index into intrcnt[], which is defined in locore
*/

4
sys/arch/cobalt/include/intr.h
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@ -1,4 +1,4 @@
/* $NetBSD: intr.h,v 1.3 2000/03/31 14:51:52 soren Exp $ */
/* $NetBSD: intr.h,v 1.4 2000/04/03 11:44:21 soda Exp $ */
#include <mips/cpuregs.h>
#include <mips/intr.h>
@ -50,7 +50,7 @@ extern void _clrsoftintr(int);
#define splimp() splclock()
#define splstatclock() splclock()
#define splsoftclock() _splraise(MIPS_SOFT_INT_MASK_0)
#define splsoftnet() _splraise(MIPS_SOFT_INT_MASK_1)
#define splsoftnet() _splraise(MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1)
#define spllowersoftclock() _spllower(MIPS_SOFT_INT_MASK_0)
extern unsigned int intrcnt[];

4
sys/arch/hpcmips/include/intr.h
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@ -1,4 +1,4 @@
/* $NetBSD: intr.h,v 1.3 2000/04/03 03:37:25 sato Exp $ */
/* $NetBSD: intr.h,v 1.4 2000/04/03 11:44:21 soda Exp $ */
/*
* Copyright (c) 1998 Jonathan Stone. All rights reserved.
@ -82,7 +82,7 @@ void _clrsoftintr __P((int));
#define splstatclock() (_splraise(splvec.splstatclock))
#define spllowersoftclock() _spllower(MIPS_SOFT_INT_MASK_0)
#define splsoftclock() _splraise(MIPS_SOFT_INT_MASK_0)
#define splsoftnet() _splraise(MIPS_SOFT_INT_MASK_1)
#define splsoftnet() _splraise(MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1)
struct splvec {
int splbio;

4
sys/arch/pmax/include/intr.h
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@ -1,4 +1,4 @@
/* $NetBSD: intr.h,v 1.13 2000/03/10 01:31:22 nisimura Exp $ */
/* $NetBSD: intr.h,v 1.14 2000/04/03 11:44:22 soda Exp $ */
/*
* Copyright (c) 1998 Jonathan Stone. All rights reserved.
@ -74,7 +74,7 @@ void _clrsoftintr __P((int));
#define splstatclock() (_splraise(splvec.splstatclock))
#define spllowersoftclock() _spllower(MIPS_SOFT_INT_MASK_0)
#define splsoftclock() _splraise(MIPS_SOFT_INT_MASK_0)
#define splsoftnet() _splraise(MIPS_SOFT_INT_MASK_1)
#define splsoftnet() _splraise(MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1)
struct splvec {
int splbio;