Pointed out by Havard Eidnes.
XXX: should these decls be in <mips/intr.h> or <mips/locore.h>?
While here, remove "extern" keyword from function declarations.
which have virtual address indexed cache and whose pmaps don't always
allow normal shared mappings even for read only pages.
In future, these pmaps should be rewritten to handle such read only
shared mappings properly like ARM pmap, but currently we just disable
sosend_loan() to avoid unnecessary uncached mappings and cache flushes
on MIPS3 CPUs, or map/unmap thrashing on SH4.
Discussed with thorpej a while ago.
from cpu_configure(9) to cpu_initclocks(9) on mips ports which use
mips3_clockintr.c:mips3_clockintr() (i.e. CPU INT5 clock) to avoid
hardclock(9) before softclock interrupt is initialized in initclocks().
This should be harmless because initclocks() is a part of configure()
in these days and there is no MI function which expects hardware
interrupts between cpu_configure(9) and cpu_initclocks(9).
Disccussed on tech-kern and port-mips.
my archive of commit mail):
Take DST into account when computing bi.timezone offset, so that
NetBSD gets correct time when booted in the summer.
Fix framebuffer address for Jornada 7xx machines, so that you can boot
with layouts other than "Japanese" (which happened to have the
framebuffer address in its entry).
Fix a bug where ksyms were not loaded correctly, which also caused the
kernel to not recognize detached miniroot.
Kludge required memory size calculations to compensate for partially
filled tagged pages, or kernel with certain segment sizes wouldn't
load.
[hpcarm have picked up some of these fixes in hpcboot v14 that was
compiled/committed in the meanwhile, for hpcarm only].
this device in userland (e.g. qemu-dm when running a HVM guest), we'll reuse
the existing vnode and we'll panic in VOP_UNLOCK(). We don't have this issue
most of the time because when xbdback is the only user, we get a specfs
vnode for which locking operation are NOPs.
Thanks to Antti Kantee for spotting the missing vn_lock() in sources and
giving details about vnode locking.
event should be raised every 10ms if we're runnable. Unfortunately,
there seems to be an intermittent bug in the hypervisor such that,
for about 1<<32 ns (~4.3s) after it manifests, every running domain
continues to run but not get its timer events and new timestamps (nor
is it preempted in favor of other domains on that CPU). This can cause
strange behavior from our timekeeping; for example, hardclock() is never
called during this interval.
So here's a workaround: if timestamp is allegedly up to date but is more
than 40ms old (this is semi-arbitrary), the domain sets its timer to a
time in the past, which causes it to become immediately pending, and also
results in the publication of a new timestamp.
I'm leaving those platforms with few users and those whose machines are
not very powerful untouched per uwe@'s suggestion. The port masters or
the real users of those ports are better suited to make the decision of
enabling it.
- split mkclock attachment from sparc64/clock.c into dev/mkclock.c
(now clock.s only contains clock interrupt and timecounter stuff)
- rename match/attach functions of rtc at ebus to match the device name
- update some comments around clock devices in GENERIC
No objection on port-sparc64 for a month.
"The Certance CP3100 product family provides high-end disk-to-disk-to-tape
(D2D2T) functionality for small-to-medium businesses."
To software, the unit is very similar to the IQ80321 and IQ31244 eval
boards from Intel. As such, we share almost all of their code.
Onboard hardware:
- IOP321 XScale CPU. Core clock is 600MHz.
- 256MB SDRAM (not sure if that's true for all)
- Four-port Intel i31244 SATA controller. One port is connected to the
internal disk. The remaining three are available on the back-panel.
- Dual GigE ports on the back panel, using an Intel i82546EB controller.
- Two Symbios Logic 53c1010 SCSI controllers, one in host mode the other
in target mode. Both SCSI busses are available on the back panel.
Note that NetBSD does not support SCSI target mode.
- 8MB of NOR Flash, containing a fairly vanilla Redboot together with
a minimal compressed Linux image.
- Some front-panel LEDS (not supported).
- Serial console.
Contributed by Wasabi Systems, Inc.
devices hooked up to the HPI pin.
HPIs cannot be masked at the interrupt controller; they can only be masked
by disabling IRQs in the XScale core. To deal with this, we tweak the
interrupt frame so that IRQs are disabled when the interrupt dispatcher
returns due to a masked HPI interrupt. IRQs will be re-enabled by a
subsequent splx(9).
Fortunately the only instance where HPI is used is for the console UART
on a couple of boards, so this hack does not adversely affect performance.
Contributed by Wasabi Systems.
required to initialize ksyms_hdr. Otherwise LKMs do not work when using
ksyms_init_explicit instead of ksyms_init, as is the case of booting an
i386 kernel using Multiboot.
those not tied up in active mbufs, rather than half of the total number.
(Or, to more literally translate the C, when there are at least as
many buffers waiting to be reused as outstanding rx requests.)
This prevents us from dropping off the network for a while when more
than 128 of the 256 buffers are in use by mbufs, which might not be
freed for an arbitrarily long time; the remaining buffers would stack up
on the free list but not be reclaimed until enough mbufs were eventually
freed, leaving the interface unable to receive packets until then.
Checking all zsc units in zshard() is efficient only on ports
which share one interrupt among all zsc units, like sparc or sun3.
On such ports, zshard() is established as a handler only once.
XXX1: more other MD zs drivers should be fixed similarly.
XXX2: zsc on macppc has independent interrupts for channel A and B,
but MI z8530sc can't handle such configuration.
INSTALL.MP, INSTALL_LAPTOP, and DISKLESS kernels so that they are
smaller and faster by removing support for actual i386 CPUs (which
lack write protection in supervisor mode, which requires a costly
workaround) and math coprocessor emulation. Coprocessor emulation
is retained in the LAPTOP kernels, but not in the others. Where
it is known that a configuration cannot be run with particular CPUs
(i486 in *MP kernels) remove that support as well. Compile all
kernels with appropriate architecture and tuning flags (reduces
size, makes things faster). Those requiring support for machines
with i386 CPU or lacking coprocessor can use the *SMALL or *TINY
kernels.
- Remove the PCN_NO_PROM option. Instead, query the am79c970-no-eeprom
property, and read the MAC address from the CSRs if that property is TRUE.
In the ibmnws port:
- Implement device_register().
- In device_register(), set the am79c970-no-eeprom property for the
built-in Ethernet.
the vanilla ones. They are supposed to be identical to
{GENERIC,INSTALL}, apart from the different ncr5380 driver.
Instead of re-sync'ing, use a new feature of configure and just disable
the ncrscsi driver.
(Approved by Allen Briggs)
stack.
Fixes the "booting from disk memory corruption bug" which was a result
of pmap_extract silently failing against a scsipi_xfer data area allocat-
ed on kernel stack in _bus_dmamap_load_buffer
I didn't know what header to put the prototype in, so it's both in
i386/mem.c and amd64/mem.c; probably can be moved later.
Tested on amd64, assumed working on i386. :)
yamt@ okay
using a completely bogus heuristic to guess at one. This might cause FIFO
underruns in particularly exciting video modes, but it also makes more
boring ones work correctly.
module (in the same file even), so we know the offset at link time and
don't need a reloc. This kills the last text relocation in the sh3
libc.so.
While here, tweak the code slightly to put delay slots into use.
MACHINE. Thus, move it out of <arm/bootconfig.h> and put it into
<machine/bootconfig.h> on those MACHINEs (cats, hpcarm, and shark) where
it's used outside the file in which it's defined.
so it's more accessible and less of a hassle to put to use. Also enable
fileassoc(9) by default as a result, which for itself may open the door for
a lot of cool stuff. (stay tuned. :)
I recommend port masters of other archs to consider doing the same.
Personally I don't know which ports are considered more of a legacy than
in-production, so I'm leaving it for someone else for now...
No objections on tech-kern.
reserve some more space for the BSS section than the binary says. This
trick was used to leave room after the kernel's image to copy the symbol
table following the format required by ksyms_init. (It was also used to
workaround a bug in the physical address fields of the binary, but this has
been long fixed.) Yes, the MULTIBOOT_SYMTAB_SPACE option goes away; yay!
Instead, copy the required data after the kernel in a way that avoids having
to reserve space and use the new ksyms_init_explicit function to avoid the
need to construct a minimal ELF image.
Fixes ksyms when using an "unpatched" GRUB (one that does not contain the
fix to honour the "a.out kludge" for ELF images, even when present) -- i.e.
ddb and lkms. As a side effect, the new code is much clearer to read and
digest.
Closes PR port-i386/32865.
- fix several comments to reality
- clean up the #ifdef NO_VCACHE code slightly
- use call instead of set/jmpl
- remove a couple of unnecessary stores to curlwp
do not add the offset to the result - the calculated PA is the right
value - not the start of the page as in the other cases.
This fixes DMA to kernel stack, and avoids "fabricating a geometry"
warnings.
make local variable const as well. Avoid writing to the now-const
variable, instead do the masking before in the trapframe register
assignment.
OK'ed by thorpej and nathanw.
better use it for something else later. I'm also thinking of g/c'ing
the temp buffer and emit disassembly with db_printf direcly, and
get_ascii gets in the way.
in cpu_attach(), overwritten by multiple cpus, and only one member of the
12 or more were ever used again.) add an ecache_min_line_size to replace
this functionality.
clean up some non-SMP friendly code from cpu_attach():
- only reset the fpu state on the boot cpu
- don't bother printing "FPU version 0" always
- don't call getver() and ignore the result
- print the UPA id on the first cpu0: line
only print mp_tramp address #ifdef DEBUG.
reset the fpu state in cpu_hatch(), like cpu_attach() does for the boot cpu.
cpu_attach() is now free of SMP-unfriendly code.
newer server chipsets) to wm(4), from the FreeBSD em(4) driver.
While there, add a few other Intel Ethernet controller that should work as
is.
Properly update the RX error and TX collision counters.
Add ikphy(4), a driver for the Intel i82563 Kumeran 10/100/1000 Ethernet PHYs
dumpdev. this occurs when we try to set the dumpdev to a device
with no driver loaded. this fixes PR#34872.
in sys_swapctl, if bdevsw_lookup() fails, set dumpdev = NODEV
before calling cpu_dumpconf(). (this also fixes PR#34872.)
XXX: cpu_dumpconf() should probably be changed to take a dumpdev
XXX: and return an error in such cases, but that is a much more
XXX: intrusive change.
XXX2: this is only run-tested on sparc64 and compile tested on a
XXX2: couple of platforms.
Specifically, the SPI flash now operates as a nearly fully functional block
device (other than lacking disklabel support). It does some basic translation
stuff, so that if you attempt to write a block, the underlying flash sectors
(usually 64k in size) will be read, erased and rewritten.
To minize thrashing, the spiflash strategy routine attempts to gather writes
to the same sector together, so that in the typical case you will not have to
repeatedly erase/rewrite the sector. It also attempts to check and verify
whether an erase cycle is truly needed. There are still access patterns that
will cause multiple erases to occur, and so I heartily discourage the use
of these flash devices for storing anything other than small configuration
data, or write-once images. If you want to do more than that, then someone
should try to write a real flash translation layer.
The drivers attempt to provide some level of asynchronous operation, so that
while you are erasing or writing to the flash, other things can reasonably
take place.
Note that spiflash does not do bad block remapping. It also doesn't detect
when a device is in read-only mode, or if some sectors are read-only. It
only supports uniform sectored NOR flash. It lacks any code to deal with
disklabels, and does not offer any disk related ioctls.
These limitations aside, it would not be terribly hard, I think, to break
out the code I've done to create a generic "norflash" driver, backed by
a "common" spiflash module. Then other flash drivers (e.g. athflash, etc.)
could benefit from the ability to use this as a block device. I've tried
to architect it to support that, if someone else wants to do the work.
(Hi Jared!)
The primary reason that I've not added code to deal with disklabels is that
I had a difficult time figuring out which framework (disklabels or wedges)
to use, and which bits of code were necessary to implement. In the case of
the flash devices I'm working with, a parser to deal with redboot FIS images
(partitions) would need to be added. I was prepared to do this, but gave
up owing to the complete and total lack of any API or design documentation
pertaining to the requirements for disk drivers and disklabel management or
wedges. I would strongly encourage someone who knows something about
wedges or disklabels to write a simple document (or even a dummy driver)
showing which interfaces should be provided in new mass storage drivers.
This work was funded by the Champaign-Urbana Community Wireless Network
Project.
in cpu_initclocks(9), and then remove "if (cold)" check in decr_intr().
Fixes long delay during config_process_deferred() for interrupt_config_queue,
OK'ed by macallan.
Instead of polluting libkern.h with ifdefs introduce our own private
copy. Since AFAICT we only need it for libsa/ufs.c which only
includes it for the strlen() prototype, trim it to provide just that
for now.
We cannot just #include <string.h> (the WinCE one) here, as that pulls
in a lot of unrelated stuff, e.g. defines for limits that collide with
machine/limits.h
stack, cpu_info structure, panicstack, idle uarea and normal kernel
stack in here. the idle uarea and kernel stack are in the 2nd 64KB
page. the interrupt stack and cpu_info structure are as the same
place in the 1st 64KB page, and the panicstack grows down from the
top of this page. update comments in param.h to suit (XXX: a lot
of these constants should move to a header file that will not pollute
the name space so much.) map these pages identically between
cpu_initialise() and cpu_mp_startup(), and deal with the two 64KB
pages in pmap_extract(). keep an unmapped 64KB page between them.
don't initialise the unused "ci_eintstack" member of the cpu_info
structure
use constants to initialise many addresses in the cpu_info structure,
consolidating these assignments from cpu0 and cpu>0
delete u0/estack0/panicstack from locore.s
clean up some wrong comments in locore.s
fix a 32bit-only bug in cpu_mp_startup().
delete 'u0' entirely.
this fixes recent random lossage seen on port-sparc64: processes
stuck in RUN state, data faults, and hangs.
so that our kernels works with newer xen-3 hypervisors; and correct the value
of VIRT_BASE for dom0.
Now that we can embed the values of KERNBASE and KERNTEXTOFF in the binary
for Xen, make the domU memory layout the same as dom0 for Xen3 (making
it the other way round doens't work; probably because of alignement
constraints in the hypervisor). The old domU layout is used if options
XEN_COMPAT_030001 is present in the kernel config file. Enable this the
domU kernel config files for now, in case someone wants to run a NetBSD
domU on an older Xen3 installation.
introduced ppc4xx_tlb_reserve() API.
* ibm405gp UART0 used to be linear mapped. The VA happens to be inside kernel
segment, giving us the possibility of multiple VA matches in the TLB. This
is considered "programming error" by 405 core and results in "undefined
behaviour". We now avoid mapping peripherals in kernel segment.
* Some boards used to map hardwired RAM size. We now use the real size as
passed in by boot firmware.
introduced ppc4xx_tlb_reserve() API.
* ibm405gp UART0 used to be linear mapped. The VA happens to be inside kernel
segment, giving us the possibility of multiple VA matches in the TLB. This
is considered "programming error" by 405 core and results in "undefined
behaviour". We now avoid mapping peripherals in kernel segment.
* Some boards used to map hardwired RAM size. We now use the real size as
passed in by boot firmware.
* TLB_NRESERVED is (finally) gone.
introduced ppc4xx_tlb_reserve() API.
* ibm405gp UART0 used to be linear mapped. The VA happens to be inside kernel
segment, giving us the possibility of multiple VA matches in the TLB. This
is considered "programming error" by 405 core and results in "undefined
behaviour". We now avoid mapping peripherals in kernel segment.
* Some boards used to map hardwired RAM size. We now use the real size as
passed in by boot firmware.
* don't call consinit() in obs2{00,66}_machdep.c because consinit() is already
called in ibm4xx_init() (but I'm not sure which place is good)
it from the xenstore path. /dev will have whatever is in the guest's config
file disk entry, and this may not be a number (in the case of HVM guests
it's a string starting with 'ioemu').
dsl