- Don't make a reference of curproc when it has NULL value. It causes
double fault upon a fatal panic ocation.
- Macro FETCH_INSTRUCTION() took a value of address 0.
-
UVM relies on pmap modules keeping track of modified/referenced bits
after a page has been removed from all mappings. So *dont* clear
PV_REFERENCED or PV_MODIFIED flags in pmap_remove().
either OP_JR function code or *OP_JALR* function code (not OP_JAL opcode).
insn_unconditional_flow_transfer() was to read an unintialized variable.
Those MD DDB routines seems not useful work so far.
- returned EOPNOTSUPP rather than -1.
- no check for negative offset.
many of these fix potential security problems in these drivers.
XXX XXX XXX
the d_mmap cdev routine should be changed to have a prototype like:
paddr_t (*d_mmap) __P((dev_t, off_t, int));
by someone!
Track page modification status in the PV entry like the alpha, and let
pmap_is_modified() return current status back to the VM system. UVM now
works reliably.
Garbage collect the old pmap_attribute[] stuff.
- cpu_set_kpc() now takes void *arg third argument, passed to the
entry point.
- cpu_fork() allows parent to be non-curproc iff parent is proc0.
When forking non-curproc, assume its state has already been saved.
- Adjust various pieces of machine-dependent code to account of all of this.
* commit isapnpvar.h changes required for ARC to support plain isa.
* fixup mistake over mips/include/cpuregs.h.
* mips/mips_machdep.c:
set L2 cache-size for arc, cleanup use of L2cache present
vs L2 cache-size variables. check for no L2 cache on kernels
configured to require one. misc cleanups.
* mips/mpis/trap.c: more locore stack-traceback label cleanup.
XXX Locore callbacks for mips3, mips4, r4600 cacheflush need more work.
Adds (most) support for ARC platform to port-independent mips code.
Some changes (e.g., clean up of overlapping CPU/FPU ids) inspired by
comparison to the OpenBSD 2.1 codebase of Soda's ARC port.
Open issues:
* Still no support for r4600 or mipsIV CPUs with two-way L1 cache.
Code derived from Per Fogelstrom's OpenBSD source doesn't work
on mips3 pmaxes with L2 cache.
* Still some port-specific #ifdefs, for interrupt enable and
pmax L2 cache-size. Needs more thought, but overlaps with
work-in-progress by Tohru and Tsubai on spl()s and related stuff.
u-area in machine-dependent code. Instead, call exit2() to schedule
the reaper to free them for us, once it is safe to do so (i.e. we are
no longer running on the dead proc's vmspace and stack).
- bump cpu_model[] length as the longest name occupies over 30 characters.
- place machine_arch[] beside machine[] for clearity.
- nuke useless #include directives.
- small scale cleanup in vm_machdep.c
nisimura