- Complete vm_offset_t purge for mips processor.
- bzero() -> memset() and bcopy() -> memcpy(). - Garbage collection in trap.c and db_interface.c.
This commit is contained in:
parent
25c5fbcb63
commit
858e67e157
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@ -1,4 +1,4 @@
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/* $NetBSD: db_machdep.h,v 1.4 1997/11/18 21:13:17 mhitch Exp $ */
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/* $NetBSD: db_machdep.h,v 1.5 1999/01/06 04:11:28 nisimura Exp $ */
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/*
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* Copyright (c) 1997 Jonathan Stone (hereinafter referred to as the author)
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@ -41,7 +41,7 @@
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#include <mips/proc.h> /* register state */
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typedef vm_offset_t db_addr_t; /* address - unsigned */
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typedef vaddr_t db_addr_t; /* address - unsigned */
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typedef long db_expr_t; /* expression - signed */
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typedef struct frame db_regs_t;
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@ -78,8 +78,8 @@ db_addr_t db_disasm_insn __P((int insn, db_addr_t loc, boolean_t altfmt));
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/*
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* Entrypoints to DDB for kernel, keyboard drivers, init hook
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*/
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void kdb_kbd_trap __P((db_regs_t *));
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int kdb_trap __P((int type, db_regs_t *));
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void kdb_kbd_trap __P((int *));
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int kdb_trap __P((int type, int *));
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void db_machine_init __P((void));
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@ -1,4 +1,4 @@
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/* $NetBSD: locore.h,v 1.14 1998/09/11 16:46:31 jonathan Exp $ */
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/* $NetBSD: locore.h,v 1.15 1999/01/06 04:11:27 nisimura Exp $ */
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/*
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* Copyright 1996 The Board of Trustees of The Leland Stanford
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@ -64,13 +64,13 @@ extern u_int32_t mips_read_statusreg __P((void));
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extern void mips1_ConfigCache __P((void));
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extern void mips1_FlushCache __P((void));
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extern void mips1_FlushDCache __P((vm_offset_t addr, vm_offset_t len));
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extern void mips1_FlushICache __P((vm_offset_t addr, vm_offset_t len));
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extern void mips1_FlushDCache __P((vaddr_t addr, vaddr_t len));
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extern void mips1_FlushICache __P((vaddr_t addr, vaddr_t len));
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extern void mips1_ForceCacheUpdate __P((void));
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extern void mips1_SetPID __P((int pid));
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extern void mips1_TLBFlush __P((int numtlb));
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extern void mips1_TLBFlushAddr __P( /* XXX Really pte highpart ? */
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(vm_offset_t addr));
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(vaddr_t addr));
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extern int mips1_TLBUpdate __P((u_int, /*pt_entry_t*/ u_int));
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extern void mips1_TLBWriteIndexed __P((u_int index, u_int high,
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u_int low));
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@ -81,14 +81,14 @@ extern void mips1_cpu_switch_resume __P((void));
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extern void mips3_ConfigCache __P((void));
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extern void mips3_FlushCache __P((void));
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extern void mips3_FlushDCache __P((vm_offset_t addr, vm_offset_t len));
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extern void mips3_FlushICache __P((vm_offset_t addr, vm_offset_t len));
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extern void mips3_FlushDCache __P((vaddr_t addr, vaddr_t len));
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extern void mips3_FlushICache __P((vaddr_t addr, vaddr_t len));
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extern void mips3_ForceCacheUpdate __P((void));
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extern void mips3_HitFlushDCache __P((vm_offset_t, int));
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extern void mips3_HitFlushDCache __P((vaddr_t, int));
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extern void mips3_SetPID __P((int pid));
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extern void mips3_TLBFlush __P((int numtlb));
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extern void mips3_TLBFlushAddr __P( /* XXX Really pte highpart ? */
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(vm_offset_t addr));
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(vaddr_t addr));
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extern int mips3_TLBUpdate __P((u_int, /*pt_entry_t*/ u_int));
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struct tlb;
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extern void mips3_TLBRead __P((int, struct tlb *));
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@ -116,12 +116,12 @@ extern void mips3_write_compare __P((u_int32_t));
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typedef struct {
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void (*configCache) __P((void));
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void (*flushCache) __P((void));
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void (*flushDCache) __P((vm_offset_t addr, vm_offset_t len));
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void (*flushICache) __P((vm_offset_t addr, vm_offset_t len));
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void (*flushDCache) __P((vaddr_t addr, vaddr_t len));
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void (*flushICache) __P((vaddr_t addr, vaddr_t len));
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void (*forceCacheUpdate) __P((void));
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void (*setTLBpid) __P((int pid));
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void (*tlbFlush) __P((int numtlb));
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void (*tlbFlushAddr) __P((vm_offset_t)); /* XXX Really pte highpart ? */
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void (*tlbFlushAddr) __P((vaddr_t)); /* XXX Really pte highpart ? */
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int (*tlbUpdate) __P((u_int highreg, u_int lowreg));
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void (*wbflush) __P((void));
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void (*proc_trampoline) __P((void));
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@ -229,7 +229,6 @@ extern u_int mips_L1ICacheLSize;
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extern int mips_L2CachePresent;
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extern u_int mips_L2CacheLSize;
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extern u_int mips_CacheAliasMask;
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extern struct intr_tab intr_tab[];
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#ifdef MIPS3
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extern int mips3_L1TwoWayCache;
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@ -1,4 +1,4 @@
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/* $NetBSD: pmap.h,v 1.21 1998/11/29 03:18:32 jonathan Exp $ */
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/* $NetBSD: pmap.h,v 1.22 1999/01/06 04:11:25 nisimura Exp $ */
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/*
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* Copyright (c) 1987 Carnegie-Mellon University
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@ -66,8 +66,8 @@
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* dynamically allocated at boot time.
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*/
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#define mips_trunc_seg(x) ((vm_offset_t)(x) & ~SEGOFSET)
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#define mips_round_seg(x) (((vm_offset_t)(x) + SEGOFSET) & ~SEGOFSET)
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#define mips_trunc_seg(x) ((vaddr_t)(x) & ~SEGOFSET)
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#define mips_round_seg(x) (((vaddr_t)(x) + SEGOFSET) & ~SEGOFSET)
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#define pmap_segmap(m, v) ((m)->pm_segtab->seg_tab[((v) >> SEGSHIFT)])
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#define PMAP_SEGTABSIZE 512
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@ -98,7 +98,7 @@ typedef struct pmap {
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typedef struct pv_entry {
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struct pv_entry *pv_next; /* next pv_entry */
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struct pmap *pv_pmap; /* pmap where mapping lies */
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vm_offset_t pv_va; /* virtual address for mapping */
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vaddr_t pv_va; /* virtual address for mapping */
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int pv_flags; /* some flags for the mapping */
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} *pv_entry_t;
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@ -121,8 +121,8 @@ struct pmap kernel_pmap_store;
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*/
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void pmap_bootstrap __P((void));
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void pmap_set_modified __P((vm_offset_t));
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void pmap_set_referenced __P((vm_offset_t));
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void pmap_set_modified __P((paddr_t));
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void pmap_set_referenced __P((paddr_t));
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/*
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* pmap_prefer() helps reduce virtual-coherency exceptions in
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*/
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#ifdef MIPS3
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#define PMAP_PREFER(pa, va) pmap_prefer((pa), (va))
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void pmap_prefer __P((vm_offset_t, vm_offset_t *));
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void pmap_prefer __P((vaddr_t, vaddr_t *));
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#endif /* MIPS3 */
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#define PMAP_STEAL_MEMORY /* enable pmap_steal_memory() */
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/*
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* Kernel cache operations for the user-space API
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*/
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int mips_user_cacheflush __P((struct proc *p, vm_offset_t va, int nbytes,
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int mips_user_cacheflush __P((struct proc *p, vaddr_t va, int nbytes,
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int whichcache));
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int mips_user_cachectl __P((struct proc *p, vm_offset_t va, int nbytes,
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int mips_user_cachectl __P((struct proc *p, vaddr_t va, int nbytes,
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int ctl));
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#endif /* _KERNEL */
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/* $NetBSD: pte.h,v 1.5 1997/06/21 04:10:42 mhitch Exp $ */
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/* $NetBSD: pte.h,v 1.6 1999/01/06 04:11:25 nisimura Exp $ */
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/*-
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* Copyright (c) 1997 The NetBSD Foundation, Inc.
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#define mips_pg_nv_bit() (MIPS1_PG_NV) /* same on mips1 and mips3 */
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int pmap_is_page_ro(pmap_t, vm_offset_t, int);
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int pmap_is_page_ro(pmap_t, vaddr_t, int);
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/* MIPS1-only */
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#define PTE_TO_PADDR(pte) MIPS1_PTE_TO_PADDR((pte))
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#define PAGE_IS_RDONLY(pte, va) MIPS1_PAGE_IS_RDONLY((pte), (va))
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#define pfn_to_vad(x) mips1_pfn_to_vad((vm_offset_t)(x))
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#define pfn_to_vad(x) mips1_pfn_to_vad((vaddr_t)(x))
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#define vad_to_pfn(x) mips1_vad_to_pfn((x))
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#endif /* mips1 */
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#define PTE_TO_PADDR(pte) MIPS3_PTE_TO_PADDR((pte))
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#define PAGE_IS_RDONLY(pte, va) MIPS3_PAGE_IS_RDONLY((pte), (va))
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#define pfn_to_vad(x) mips3_pfn_to_vad((vm_offset_t)(x))
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#define pfn_to_vad(x) mips3_pfn_to_vad((vaddr_t)(x))
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#define vad_to_pfn(x) mips3_vad_to_pfn((x))
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#endif /* mips3 */
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static __inline int
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mips_pg_v(unsigned int entry),
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mips_pg_wired(unsigned int entry),
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PAGE_IS_RDONLY(unsigned int pte, vm_offset_t va);
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PAGE_IS_RDONLY(unsigned int pte, vaddr_t va);
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static __inline unsigned int
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mips_pg_wired_bit(void), mips_pg_m_bit(void),
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mips_pg_global_bit(void),
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PTE_TO_PADDR(unsigned int entry);
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static __inline vm_offset_t pfn_to_vad(unsigned int x);
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static __inline int vad_to_pfn(vm_offset_t x);
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static __inline vaddr_t pfn_to_vad(unsigned int x);
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static __inline int vad_to_pfn(vaddr_t x);
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static __inline int
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static __inline int
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PAGE_IS_RDONLY(pte, va)
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unsigned int pte;
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vm_offset_t va;
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vaddr_t va;
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{
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if (CPUISMIPS3)
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return (MIPS3_PAGE_IS_RDONLY(pte, va));
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return (MIPS1_PAGE_IS_RDONLY(pte, va));
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}
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static __inline vm_offset_t
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static __inline vaddr_t
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pfn_to_vad(x)
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unsigned int x;
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{
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static __inline int
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vad_to_pfn(x)
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vm_offset_t x;
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vaddr_t x;
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{
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if (CPUISMIPS3)
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return (mips3_vad_to_pfn(x));
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* Kernel virtual address to page table entry and visa versa.
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*/
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#define kvtopte(va) \
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(Sysmap + (((vm_offset_t)(va) - VM_MIN_KERNEL_ADDRESS) >> PGSHIFT))
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(Sysmap + (((vaddr_t)(va) - VM_MIN_KERNEL_ADDRESS) >> PGSHIFT))
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#define ptetokv(pte) \
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((((pt_entry_t *)(pte) - Sysmap) << PGSHIFT) + VM_MIN_KERNEL_ADDRESS)
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@ -1,4 +1,4 @@
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/* $NetBSD: sysarch.h,v 1.2 1998/02/25 21:27:47 perry Exp $ */
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/* $NetBSD: sysarch.h,v 1.3 1999/01/06 04:11:27 nisimura Exp $ */
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#ifndef _MIPS_SYSARCH_H_
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#define _MIPS_SYSARCH_H_
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struct mips_cacheflush_args {
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vm_offset_t va;
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vaddr_t va;
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int nbytes;
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int whichcache;
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};
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struct mips_cachectl_args {
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vm_offset_t va;
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vaddr_t va;
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int nbytes;
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int ctl;
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};
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@ -1,4 +1,4 @@
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/* $NetBSD: trap.h,v 1.10 1998/10/24 01:36:10 jonathan Exp $ */
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/* $NetBSD: trap.h,v 1.11 1999/01/06 04:11:27 nisimura Exp $ */
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/*
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* Copyright (c) 1988 University of Utah.
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* @(#)trap.h 8.1 (Berkeley) 6/10/93
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*/
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/*
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* special trap-handling support
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*/
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/* Return the resulting PC as if the branch was executed. */
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extern u_int MachEmulateBranch __P((u_int* regs, u_int instPC,
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u_int fpcCSR, int allowNonBranch));
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#ifdef DEBUG
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extern int cpu_singlestep __P((register struct proc *p));
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#endif
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#if defined(DEBUG) || defined(DDB)
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extern int kdbpeek __P((vm_offset_t addr));
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#endif
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/*
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* Trap codes
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* also known in trap.c for name strings
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#define T_USER 0x20 /* user-mode flag or'ed with type */
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#ifdef _KERNEL
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extern int (*mips_hardware_intr) __P((u_int mask, u_int pc, u_int statusReg,
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u_int causeReg));
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#endif /* _KERNEL */
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#ifdef _KERNEL
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extern int (*mips_hardware_intr) __P((u_int mask, u_int pc, u_int statusReg,
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u_int causeReg));
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#endif /* _KERNEL */
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#ifdef DEBUG
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extern int cpu_singlestep __P((struct proc *));
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#endif
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#if defined(DEBUG) || defined(DDB)
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extern int kdbpeek __P((vaddr_t addr));
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#endif
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/* $NetBSD: types.h,v 1.16 1998/08/13 02:10:39 eeh Exp $ */
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/* $NetBSD: types.h,v 1.17 1999/01/06 04:11:26 nisimura Exp $ */
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/*-
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* Copyright (c) 1992, 1993
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/* NB: This should probably be if defined(_KERNEL) */
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#if !defined(_POSIX_C_SOURCE) && !defined(_XOPEN_SOURCE)
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typedef unsigned long vm_offset_t;
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typedef unsigned long vm_size_t;
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typedef vm_offset_t paddr_t;
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typedef vm_size_t psize_t;
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typedef vm_offset_t vaddr_t;
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typedef vm_size_t vsize_t;
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typedef unsigned long paddr_t;
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typedef unsigned long psize_t;
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typedef unsigned long vaddr_t;
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typedef unsigned long vsize_t;
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#endif
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/*
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/* $NetBSD: vmparam.h,v 1.10 1998/02/25 23:26:41 thorpej Exp $ */
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/* $NetBSD: vmparam.h,v 1.11 1999/01/06 04:11:26 nisimura Exp $ */
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/*
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* Copyright (c) 1988 University of Utah.
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*/
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/* user/kernel map constants */
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#define VM_MIN_ADDRESS ((vm_offset_t)0x00000000)
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#define VM_MAXUSER_ADDRESS ((vm_offset_t)0x80000000)
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#define VM_MAX_ADDRESS ((vm_offset_t)0x80000000)
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#define VM_MIN_KERNEL_ADDRESS ((vm_offset_t)0xC0000000)
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#define VM_MAX_KERNEL_ADDRESS ((vm_offset_t)0xFFFFC000)
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#define VM_MIN_ADDRESS ((vaddr_t)0x00000000)
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#define VM_MAXUSER_ADDRESS ((vaddr_t)0x80000000)
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#define VM_MAX_ADDRESS ((vaddr_t)0x80000000)
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#define VM_MIN_KERNEL_ADDRESS ((vaddr_t)0xC0000000)
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#define VM_MAX_KERNEL_ADDRESS ((vaddr_t)0xFFFFC000)
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/* virtual sizes (bytes) for various kernel submaps */
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#define VM_MBUF_SIZE (NMBCLUSTERS*MCLBYTES)
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/* $NetBSD: compat_13_machdep.c,v 1.5 1998/12/03 06:28:46 nisimura Exp $ */
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/* $NetBSD: compat_13_machdep.c,v 1.6 1999/01/06 04:11:31 nisimura Exp $ */
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/*
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* Copyright 1996 The Board of Trustees of The Leland Stanford
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: compat_13_machdep.c,v 1.5 1998/12/03 06:28:46 nisimura Exp $");
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__KERNEL_RCSID(0, "$NetBSD: compat_13_machdep.c,v 1.6 1999/01/06 04:11:31 nisimura Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -63,7 +63,7 @@ compat_13_sys_sigreturn(p, v, retval)
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if ((error = copyin(scp, &ksc, sizeof(ksc))) != 0)
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return (error);
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|
||||
if (ksc.sc_regs[ZERO] != 0xACEDBADE) /* magic number */
|
||||
if ((int)ksc.sc_regs[ZERO] != 0xACEDBADE) /* magic number */
|
||||
return (EINVAL);
|
||||
|
||||
/* Resture the register context. */
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: cpu_exec.c,v 1.18 1998/12/03 06:28:45 nisimura Exp $ */
|
||||
/* $NetBSD: cpu_exec.c,v 1.19 1999/01/06 04:11:28 nisimura Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1992, 1993
|
||||
|
@ -144,9 +144,10 @@ cpu_exec_ecoff_setregs(p, epp, stack)
|
|||
u_long stack;
|
||||
{
|
||||
struct ecoff_exechdr *execp = (struct ecoff_exechdr *)epp->ep_hdr;
|
||||
struct frame *f = (struct frame *)p->p_md.md_regs;
|
||||
|
||||
setregs(p, epp, stack);
|
||||
((struct frame *)p->p_md.md_regs)->f_regs[GP] = execp->a.gp_value;
|
||||
f->f_regs[GP] = (register_t)execp->a.gp_value;
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: db_interface.c,v 1.7 1998/11/25 01:14:48 nisimura Exp $ */
|
||||
/* $NetBSD: db_interface.c,v 1.8 1999/01/06 04:11:30 nisimura Exp $ */
|
||||
|
||||
/*
|
||||
* Mach Operating System
|
||||
|
@ -66,10 +66,9 @@ void db_trapdump_cmd __P((db_expr_t addr, int have_addr, db_expr_t count,
|
|||
void db_tlbdump_cmd __P((db_expr_t addr, int have_addr, db_expr_t count,
|
||||
char *modif));
|
||||
|
||||
extern int kdbpeek __P((vm_offset_t addr));
|
||||
extern void kdbpoke __P((vm_offset_t addr, int newval));
|
||||
extern unsigned MachEmulateBranch __P((unsigned *regsPtr,
|
||||
unsigned instPC, unsigned fpcCSR, int allowNonBranch));
|
||||
extern int kdbpeek __P((vaddr_t));
|
||||
extern void kdbpoke __P((vaddr_t, int));
|
||||
extern vaddr_t MachEmulateBranch __P((struct frame *, vaddr_t, unsigned, int));
|
||||
extern void mips1_dump_tlb __P((int, int, void (*printfn)(const char*, ...)));
|
||||
extern void mips3_dump_tlb __P((int, int, void (*printfn)(const char*, ...)));
|
||||
|
||||
|
@ -81,18 +80,20 @@ extern void mips3_dump_tlb __P((int, int, void (*printfn)(const char*, ...)));
|
|||
* Really belongs wherever kdbpeek() is defined.
|
||||
*/
|
||||
void
|
||||
kdbpoke(vm_offset_t addr, int newval)
|
||||
kdbpoke(addr, newval)
|
||||
vaddr_t addr;
|
||||
int newval;
|
||||
{
|
||||
*(int*) addr = newval;
|
||||
wbflush();
|
||||
if (CPUISMIPS3) {
|
||||
#ifdef MIPS3
|
||||
mips3_HitFlushDCache((vm_offset_t) addr, sizeof(int));
|
||||
mips3_FlushICache((vm_offset_t) addr, sizeof(int));
|
||||
mips3_HitFlushDCache(addr, sizeof(int));
|
||||
mips3_FlushICache(addr, sizeof(int));
|
||||
#endif
|
||||
} else {
|
||||
#ifdef MIPS1
|
||||
mips1_FlushICache((vm_offset_t) addr, sizeof(int));
|
||||
mips1_FlushICache(addr, sizeof(int));
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
@ -102,7 +103,7 @@ kdbpoke(vm_offset_t addr, int newval)
|
|||
*/
|
||||
void
|
||||
kdb_kbd_trap(tf)
|
||||
db_regs_t *tf;
|
||||
int *tf;
|
||||
{
|
||||
if (db_active == 0 && (boothowto & RB_KDB)) {
|
||||
printf("\n\nkernel: keyboard interrupt\n");
|
||||
|
@ -115,8 +116,8 @@ kdb_kbd_trap(tf)
|
|||
*/
|
||||
int
|
||||
kdb_trap(type, tf)
|
||||
int type;
|
||||
register db_regs_t *tf;
|
||||
int type;
|
||||
int *tf;
|
||||
{
|
||||
|
||||
/* fb_unblank(); */
|
||||
|
@ -138,8 +139,8 @@ kdb_trap(type, tf)
|
|||
|
||||
/* Should switch to kdb`s own stack here. */
|
||||
|
||||
/* XXX copy trapframe to ddb_regs */
|
||||
ddb_regs = *tf;
|
||||
/* XXX copy trapframe to ddb_regs */
|
||||
ddb_regs = *(db_regs_t *)tf;
|
||||
|
||||
db_active++;
|
||||
cnpollc(1);
|
||||
|
@ -148,7 +149,7 @@ kdb_trap(type, tf)
|
|||
db_active--;
|
||||
|
||||
/* write ddb_regs back to trapframe */
|
||||
*tf = ddb_regs;
|
||||
*(db_regs_t *)tf = ddb_regs;
|
||||
|
||||
return (1);
|
||||
}
|
||||
|
@ -165,16 +166,16 @@ Debugger()
|
|||
*/
|
||||
void
|
||||
db_read_bytes(addr, size, data)
|
||||
register vm_offset_t addr;
|
||||
register size_t size;
|
||||
register char *data;
|
||||
vaddr_t addr;
|
||||
size_t size;
|
||||
char *data;
|
||||
{
|
||||
while (size >= 4)
|
||||
*((int*)data)++ = kdbpeek(addr), addr += 4, size -= 4;
|
||||
|
||||
if (size) {
|
||||
unsigned tmp;
|
||||
register char *dst = (char*)data;
|
||||
char *dst = (char*)data;
|
||||
|
||||
tmp = kdbpeek(addr);
|
||||
while (size--) {
|
||||
|
@ -197,9 +198,9 @@ db_read_bytes(addr, size, data)
|
|||
*/
|
||||
void
|
||||
db_write_bytes(addr, size, data)
|
||||
register vm_offset_t addr;
|
||||
register size_t size;
|
||||
register char *data;
|
||||
vaddr_t addr;
|
||||
size_t size;
|
||||
char *data;
|
||||
{
|
||||
#ifdef DEBUG_DDB
|
||||
printf("db_write_bytes(%lx, %d, %p, val %x)\n", addr, size, data,
|
||||
|
@ -210,7 +211,7 @@ db_write_bytes(addr, size, data)
|
|||
kdbpoke(addr++, *(int*)data), addr += 4, size -= 4;
|
||||
if (size) {
|
||||
unsigned tmp = kdbpeek(addr), tmp1 = 0;
|
||||
register char *src = (char*)data;
|
||||
char *src = (char*)data;
|
||||
|
||||
tmp >>= (size << 3);
|
||||
tmp <<= (size << 3);
|
||||
|
@ -283,82 +284,48 @@ db_machine_init()
|
|||
db_machine_commands_install(mips_db_command_table);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* MD functions for software single-step.
|
||||
* see db_ for a description.
|
||||
*/
|
||||
|
||||
|
||||
/*
|
||||
* inst_branch()
|
||||
* returns TRUE iff the instruction might branch.
|
||||
*/
|
||||
boolean_t
|
||||
inst_branch(int inst)
|
||||
inst_branch(inst)
|
||||
int inst;
|
||||
{
|
||||
InstFmt i;
|
||||
int delay;
|
||||
|
||||
i.word = inst;
|
||||
delay = 0;
|
||||
|
||||
switch (i.JType.op) {
|
||||
case OP_BCOND:
|
||||
|
||||
case OP_BLEZ:
|
||||
case OP_BLEZL:
|
||||
case OP_BGTZ:
|
||||
case OP_BGTZL:
|
||||
case OP_J:
|
||||
case OP_JAL:
|
||||
case OP_BEQ:
|
||||
case OP_BEQL:
|
||||
case OP_BNE:
|
||||
case OP_BLEZ:
|
||||
case OP_BGTZ:
|
||||
case OP_BEQL:
|
||||
case OP_BNEL:
|
||||
case OP_BLEZL:
|
||||
case OP_BGTZL:
|
||||
delay = 1;
|
||||
break;
|
||||
|
||||
case OP_COP0:
|
||||
case OP_COP1:
|
||||
switch (i.RType.rs) {
|
||||
case OP_BCx:
|
||||
case OP_BCy:
|
||||
delay = 1;
|
||||
}
|
||||
break;
|
||||
|
||||
case OP_COP1:
|
||||
switch (i.RType.rs) {
|
||||
case OP_BCx:
|
||||
case OP_BCy:
|
||||
delay = 1;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
};
|
||||
break;
|
||||
|
||||
case OP_J:
|
||||
case OP_JAL:
|
||||
delay = 1;
|
||||
break;
|
||||
|
||||
}
|
||||
#ifdef DEBUG_DDB
|
||||
printf(" inst_branch(0x%x) returns %d\n",
|
||||
inst, delay);
|
||||
#endif
|
||||
|
||||
return delay;
|
||||
}
|
||||
|
||||
/*
|
||||
*
|
||||
*/
|
||||
boolean_t
|
||||
inst_call(inst)
|
||||
int inst;
|
||||
{
|
||||
boolean_t call;
|
||||
InstFmt i;
|
||||
int call;
|
||||
|
||||
i.word = inst;
|
||||
if (i.JType.op == OP_SPECIAL
|
||||
|
@ -368,71 +335,44 @@ inst_call(inst)
|
|||
call = 1;
|
||||
else
|
||||
call = 0;
|
||||
#ifdef DEBUG_DDB
|
||||
printf(" inst_call(0x%x) returns 0x%d\n", inst, call);
|
||||
#endif
|
||||
return call;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* inst_unconditional_flow_transfer()
|
||||
* return TRUE if the instruction is an unconditional
|
||||
* transter of flow (i.e. unconditional branch)
|
||||
*/
|
||||
boolean_t
|
||||
inst_unconditional_flow_transfer(int inst)
|
||||
inst_unconditional_flow_transfer(inst)
|
||||
int inst;
|
||||
{
|
||||
InstFmt i;
|
||||
int jump;
|
||||
boolean_t jump;
|
||||
|
||||
i.word = inst;
|
||||
jump = (i.JType.op == OP_J);
|
||||
#ifdef DEBUG_DDB
|
||||
printf(" insn_unconditional_flow_transfer(0x%x) returns %d\n",
|
||||
inst, jump);
|
||||
#endif
|
||||
return jump;
|
||||
}
|
||||
|
||||
/*
|
||||
*
|
||||
*/
|
||||
db_addr_t
|
||||
branch_taken(int inst, db_addr_t pc, db_regs_t *regs)
|
||||
branch_taken(inst, pc, regs)
|
||||
int inst;
|
||||
db_addr_t pc;
|
||||
db_regs_t *regs;
|
||||
{
|
||||
vm_offset_t ra;
|
||||
vaddr_t ra;
|
||||
unsigned fpucsr;
|
||||
|
||||
ra = (vm_offset_t)MachEmulateBranch(regs->f_regs, pc,
|
||||
(curproc) ? curproc->p_addr->u_pcb.pcb_fpregs.r_regs[32]: 0, 0);
|
||||
#ifdef DEBUG_DDB
|
||||
printf(" branch_taken(0x%lx) returns 0x%lx\n", pc, ra);
|
||||
#endif
|
||||
return (ra);
|
||||
fpucsr = (curproc) ? curproc->p_addr->u_pcb.pcb_fpregs.r_regs[32] : 0;
|
||||
ra = MachEmulateBranch((struct frame *)regs, pc, fpucsr, 0);
|
||||
return ra;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Returns the address of the first instruction following the
|
||||
* one at "pc", which is either in the taken path of the branch
|
||||
* (bd == TRUE) or not. This is for machines (e.g. mips) with
|
||||
* branch delays.
|
||||
*
|
||||
* XXX (jrs) The above comment makes no sense. Maybe Jason is thinking
|
||||
* of mips3 squashed branches?
|
||||
* In any case, the kernel support can already find the address of the
|
||||
* next instruction. We could just return that and put a single breakpoint
|
||||
* at that address. All the cruft above can go.
|
||||
*/
|
||||
db_addr_t
|
||||
next_instr_address(db_addr_t pc, boolean_t bd)
|
||||
next_instr_address(pc, bd)
|
||||
db_addr_t pc;
|
||||
boolean_t bd;
|
||||
{
|
||||
|
||||
vm_offset_t ra;
|
||||
ra = (vm_offset_t)MachEmulateBranch(ddb_regs.f_regs, pc,
|
||||
(curproc)? curproc->p_addr->u_pcb.pcb_fpregs.r_regs[32]: 0, 1);
|
||||
#ifdef DEBUG_DDB
|
||||
printf(" next_instr_addr(0x%lx, %d) returns 0x%lx\n", pc, bd, ra);
|
||||
#endif
|
||||
return ((db_addr_t) ra);
|
||||
vaddr_t ra;
|
||||
unsigned fpucsr;
|
||||
|
||||
fpucsr = (curproc) ? curproc->p_addr->u_pcb.pcb_fpregs.r_regs[32] : 0;
|
||||
ra = MachEmulateBranch((struct frame *)&ddb_regs, pc, fpucsr, 1);
|
||||
return ra;
|
||||
}
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: db_trace.c,v 1.3 1998/02/02 12:49:15 jonathan Exp $ */
|
||||
/* $NetBSD: db_trace.c,v 1.4 1999/01/06 04:11:31 nisimura Exp $ */
|
||||
|
||||
/*
|
||||
* Mach Operating System
|
||||
|
@ -37,7 +37,7 @@
|
|||
#include <ddb/db_sym.h>
|
||||
|
||||
extern int __start __P((void)); /* lowest kernel code address */
|
||||
extern vm_offset_t getreg_val __P((db_expr_t regno));
|
||||
extern vaddr_t getreg_val __P((db_expr_t regno));
|
||||
|
||||
#define REG_ARG(i) (4+i)
|
||||
#define SAVES_RA(x) isa_spill((x),31)
|
||||
|
@ -73,8 +73,8 @@ extern void stacktrace_subr __P((int a0, int a1, int a2, int a3,
|
|||
/*
|
||||
* Stack trace helper.
|
||||
*/
|
||||
void db_mips_stack_trace __P((int count, vm_offset_t stackp,
|
||||
vm_offset_t the_pc, vm_offset_t the_ra, int flags, vm_offset_t kstackp));
|
||||
void db_mips_stack_trace __P((int count, vaddr_t stackp,
|
||||
vaddr_t the_pc, vaddr_t the_ra, int flags, vaddr_t kstackp));
|
||||
|
||||
|
||||
#define DB_SETF_REGS FCN_NULL
|
||||
|
@ -143,9 +143,9 @@ db_stack_trace_cmd(addr, have_addr, count, modif)
|
|||
void
|
||||
db_mips_stack_trace(count, stackp, the_pc, the_ra, flags, kstackp)
|
||||
int count;
|
||||
vm_offset_t stackp, the_pc, the_ra;
|
||||
vaddr_t stackp, the_pc, the_ra;
|
||||
int flags;
|
||||
vm_offset_t kstackp;
|
||||
vaddr_t kstackp;
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: mem.c,v 1.14 1998/11/19 15:38:23 mrg Exp $ */
|
||||
/* $NetBSD: mem.c,v 1.15 1999/01/06 04:11:29 nisimura Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1988 University of Utah.
|
||||
|
@ -63,8 +63,8 @@
|
|||
#include <uvm/uvm_extern.h>
|
||||
#endif
|
||||
|
||||
extern vm_offset_t avail_end;
|
||||
caddr_t zeropage;
|
||||
extern paddr_t avail_end;
|
||||
void *zeropage;
|
||||
|
||||
/*ARGSUSED*/
|
||||
int
|
||||
|
@ -95,9 +95,9 @@ mmrw(dev, uio, flags)
|
|||
struct uio *uio;
|
||||
int flags;
|
||||
{
|
||||
register vm_offset_t v;
|
||||
register int c;
|
||||
register struct iovec *iov;
|
||||
vaddr_t v;
|
||||
int c;
|
||||
struct iovec *iov;
|
||||
int error = 0;
|
||||
|
||||
while (uio->uio_resid > 0 && error == 0) {
|
||||
|
@ -118,7 +118,7 @@ mmrw(dev, uio, flags)
|
|||
if (v + c > ctob(physmem))
|
||||
return (EFAULT);
|
||||
v += MIPS_KSEG0_START;
|
||||
error = uiomove((caddr_t)v, c, uio);
|
||||
error = uiomove((void *)v, c, uio);
|
||||
continue;
|
||||
|
||||
/* minor device 1 is kernel memory */
|
||||
|
@ -131,14 +131,14 @@ mmrw(dev, uio, flags)
|
|||
mips_round_page(MSGBUFSIZE)) &&
|
||||
(v < MIPS_KSEG2_START ||
|
||||
#if defined(UVM)
|
||||
!uvm_kernacc((caddr_t)v, c,
|
||||
!uvm_kernacc((void *)v, c,
|
||||
uio->uio_rw == UIO_READ ? B_READ : B_WRITE)))
|
||||
#else
|
||||
!kernacc((caddr_t)v, c,
|
||||
!kernacc((void *)v, c,
|
||||
uio->uio_rw == UIO_READ ? B_READ : B_WRITE)))
|
||||
#endif
|
||||
return (EFAULT);
|
||||
error = uiomove((caddr_t)v, c, uio);
|
||||
error = uiomove((void *)v, c, uio);
|
||||
continue;
|
||||
|
||||
/* minor device 2 is EOF/RATHOLE */
|
||||
|
@ -154,9 +154,8 @@ mmrw(dev, uio, flags)
|
|||
break;
|
||||
}
|
||||
if (zeropage == NULL) {
|
||||
zeropage = (caddr_t)
|
||||
malloc(CLBYTES, M_TEMP, M_WAITOK);
|
||||
bzero(zeropage, CLBYTES);
|
||||
zeropage = malloc(CLBYTES, M_TEMP, M_WAITOK);
|
||||
memset(zeropage, 0, CLBYTES);
|
||||
}
|
||||
c = min(iov->iov_len, CLBYTES);
|
||||
error = uiomove(zeropage, c, uio);
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: pmap.c,v 1.46 1998/12/05 09:13:09 jonathan Exp $ */
|
||||
/* $NetBSD: pmap.c,v 1.47 1999/01/06 04:11:29 nisimura Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 1998 The NetBSD Foundation, Inc.
|
||||
|
@ -78,7 +78,7 @@
|
|||
|
||||
#include <sys/cdefs.h>
|
||||
|
||||
__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.46 1998/12/05 09:13:09 jonathan Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.47 1999/01/06 04:11:29 nisimura Exp $");
|
||||
|
||||
/*
|
||||
* Manages physical address maps.
|
||||
|
@ -128,10 +128,9 @@ __KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.46 1998/12/05 09:13:09 jonathan Exp $");
|
|||
#include <uvm/uvm.h>
|
||||
#endif
|
||||
|
||||
#include <mips/cpuregs.h>
|
||||
#include <mips/cpu.h>
|
||||
#include <mips/locore.h>
|
||||
#include <mips/pte.h>
|
||||
#include <machine/cpu.h>
|
||||
|
||||
#ifdef DEBUG
|
||||
struct {
|
||||
|
@ -178,11 +177,11 @@ int pmapdebug = 0;
|
|||
|
||||
struct pmap kernel_pmap_store;
|
||||
|
||||
vm_offset_t avail_start; /* PA of first available physical page */
|
||||
vm_offset_t avail_end; /* PA of last available physical page */
|
||||
vm_size_t mem_size; /* memory size in bytes */
|
||||
vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss)*/
|
||||
vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
|
||||
paddr_t avail_start; /* PA of first available physical page */
|
||||
paddr_t avail_end; /* PA of last available physical page */
|
||||
psize_t mem_size; /* memory size in bytes */
|
||||
vaddr_t virtual_avail; /* VA of first avail page (after kernel bss)*/
|
||||
vaddr_t virtual_end; /* VA of last avail page (end of kernel AS) */
|
||||
|
||||
int mipspagesperpage; /* PAGE_SIZE / NBPG */
|
||||
|
||||
|
@ -217,18 +216,18 @@ boolean_t pmap_initialized = FALSE;
|
|||
})
|
||||
|
||||
/* Forward function declarations */
|
||||
int pmap_remove_pv __P((pmap_t pmap, vm_offset_t va, vm_offset_t pa));
|
||||
int pmap_alloc_tlbpid __P((register struct proc *p));
|
||||
void pmap_zero_page __P((vm_offset_t phys));
|
||||
void pmap_zero_page __P((vm_offset_t));
|
||||
void pmap_enter_pv __P((pmap_t, vm_offset_t, vm_offset_t, u_int *));
|
||||
pt_entry_t *pmap_pte __P((pmap_t, vm_offset_t));
|
||||
int pmap_remove_pv __P((pmap_t pmap, vaddr_t va, paddr_t pa));
|
||||
int pmap_alloc_tlbpid __P((struct proc *p));
|
||||
void pmap_zero_page __P((paddr_t phys));
|
||||
void pmap_zero_page __P((vaddr_t));
|
||||
void pmap_enter_pv __P((pmap_t, vaddr_t, paddr_t, u_int *));
|
||||
pt_entry_t *pmap_pte __P((pmap_t, vaddr_t));
|
||||
|
||||
#ifdef MIPS3
|
||||
void pmap_page_cache __P((vm_offset_t, int));
|
||||
void pmap_page_cache __P((paddr_t, int));
|
||||
void mips_dump_segtab __P((struct proc *));
|
||||
#endif
|
||||
int pmap_is_page_ro __P((pmap_t, vm_offset_t, int));
|
||||
int pmap_is_page_ro __P((pmap_t, vaddr_t, int));
|
||||
|
||||
void pmap_pinit __P((pmap_t));
|
||||
void pmap_release __P((pmap_t));
|
||||
|
@ -241,7 +240,7 @@ void
|
|||
pmap_bootstrap()
|
||||
{
|
||||
#ifdef MIPS3
|
||||
register pt_entry_t *spte;
|
||||
pt_entry_t *spte;
|
||||
#endif
|
||||
extern int physmem;
|
||||
|
||||
|
@ -340,13 +339,14 @@ pmap_bootstrap()
|
|||
* Note that this memory will never be freed, and in essence it is wired
|
||||
* down.
|
||||
*/
|
||||
vm_offset_t
|
||||
vaddr_t
|
||||
pmap_steal_memory(size, vstartp, vendp)
|
||||
vm_size_t size;
|
||||
vm_offset_t *vstartp, *vendp;
|
||||
vsize_t size;
|
||||
vaddr_t *vstartp, *vendp;
|
||||
{
|
||||
int bank, npgs, x;
|
||||
vm_offset_t pa, va;
|
||||
paddr_t pa;
|
||||
vaddr_t va;
|
||||
|
||||
size = round_page(size);
|
||||
npgs = atop(size);
|
||||
|
@ -413,7 +413,7 @@ pmap_steal_memory(size, vstartp, vendp)
|
|||
void
|
||||
pmap_init()
|
||||
{
|
||||
vm_size_t s;
|
||||
vsize_t s;
|
||||
int bank;
|
||||
pv_entry_t pv;
|
||||
|
||||
|
@ -454,9 +454,9 @@ pmap_init()
|
|||
*/
|
||||
pmap_t
|
||||
pmap_create(size)
|
||||
vm_size_t size;
|
||||
vsize_t size;
|
||||
{
|
||||
register pmap_t pmap;
|
||||
pmap_t pmap;
|
||||
|
||||
#ifdef DEBUG
|
||||
if (pmapdebug & (PDB_FOLLOW|PDB_CREATE))
|
||||
|
@ -485,9 +485,9 @@ pmap_create(size)
|
|||
*/
|
||||
void
|
||||
pmap_pinit(pmap)
|
||||
register struct pmap *pmap;
|
||||
struct pmap *pmap;
|
||||
{
|
||||
register int i;
|
||||
int i;
|
||||
int s;
|
||||
extern struct vmspace vmspace0;
|
||||
extern struct user *proc0paddr;
|
||||
|
@ -505,7 +505,7 @@ pmap_pinit(pmap)
|
|||
pmap->pm_segtab->seg_tab[0] = NULL;
|
||||
splx(s);
|
||||
} else {
|
||||
register struct segtab *stp;
|
||||
struct segtab *stp;
|
||||
vm_page_t mem;
|
||||
|
||||
do {
|
||||
|
@ -565,7 +565,7 @@ pmap_pinit(pmap)
|
|||
*/
|
||||
void
|
||||
pmap_destroy(pmap)
|
||||
register pmap_t pmap;
|
||||
pmap_t pmap;
|
||||
{
|
||||
int count;
|
||||
|
||||
|
@ -592,7 +592,7 @@ pmap_destroy(pmap)
|
|||
*/
|
||||
void
|
||||
pmap_release(pmap)
|
||||
register pmap_t pmap;
|
||||
pmap_t pmap;
|
||||
{
|
||||
|
||||
#ifdef DEBUG
|
||||
|
@ -601,11 +601,11 @@ pmap_release(pmap)
|
|||
#endif
|
||||
|
||||
if (pmap->pm_segtab) {
|
||||
register pt_entry_t *pte;
|
||||
register int i;
|
||||
pt_entry_t *pte;
|
||||
int i;
|
||||
int s;
|
||||
#ifdef DIAGNOSTIC
|
||||
register int j;
|
||||
int j;
|
||||
#endif
|
||||
|
||||
for (i = 0; i < PMAP_SEGTABSIZE; i++) {
|
||||
|
@ -631,7 +631,7 @@ pmap_release(pmap)
|
|||
*/
|
||||
if (CPUISMIPS3)
|
||||
mips3_HitFlushDCache(
|
||||
(vm_offset_t)pte, PAGE_SIZE);
|
||||
(vaddr_t)pte, PAGE_SIZE);
|
||||
#endif
|
||||
#if defined(UVM)
|
||||
uvm_pagefree(PHYS_TO_VM_PAGE(MIPS_KSEG0_TO_PHYS(pte)));
|
||||
|
@ -681,7 +681,7 @@ pmap_activate(p)
|
|||
p->p_vmspace->vm_map.pmap->pm_segtab;
|
||||
|
||||
if (p == curproc) {
|
||||
register int tlbpid = pmap_alloc_tlbpid(p);
|
||||
int tlbpid = pmap_alloc_tlbpid(p);
|
||||
MachSetPID(tlbpid);
|
||||
}
|
||||
}
|
||||
|
@ -705,11 +705,11 @@ pmap_deactivate(p)
|
|||
*/
|
||||
void
|
||||
pmap_remove(pmap, sva, eva)
|
||||
register pmap_t pmap;
|
||||
vm_offset_t sva, eva;
|
||||
pmap_t pmap;
|
||||
vaddr_t sva, eva;
|
||||
{
|
||||
register vm_offset_t nssva;
|
||||
register pt_entry_t *pte;
|
||||
vaddr_t nssva;
|
||||
pt_entry_t *pte;
|
||||
unsigned entry;
|
||||
|
||||
#ifdef DEBUG
|
||||
|
@ -721,7 +721,7 @@ pmap_remove(pmap, sva, eva)
|
|||
return;
|
||||
|
||||
if (!pmap->pm_segtab) {
|
||||
register pt_entry_t *pte;
|
||||
pt_entry_t *pte;
|
||||
|
||||
/* remove entries from kernel pmap */
|
||||
#ifdef DIAGNOSTIC
|
||||
|
@ -829,11 +829,11 @@ pmap_remove(pmap, sva, eva)
|
|||
*/
|
||||
void
|
||||
pmap_page_protect(pa, prot)
|
||||
vm_offset_t pa;
|
||||
vaddr_t pa;
|
||||
vm_prot_t prot;
|
||||
{
|
||||
register pv_entry_t pv;
|
||||
register vm_offset_t va;
|
||||
pv_entry_t pv;
|
||||
vaddr_t va;
|
||||
int s;
|
||||
|
||||
#ifdef DEBUG
|
||||
|
@ -868,7 +868,7 @@ pmap_page_protect(pa, prot)
|
|||
if (va >= uvm.pager_sva && va < uvm.pager_eva)
|
||||
continue;
|
||||
#else
|
||||
extern vm_offset_t pager_sva, pager_eva;
|
||||
extern vaddr_t pager_sva, pager_eva;
|
||||
|
||||
va = pv->pv_va;
|
||||
|
||||
|
@ -903,13 +903,13 @@ pmap_page_protect(pa, prot)
|
|||
*/
|
||||
void
|
||||
pmap_protect(pmap, sva, eva, prot)
|
||||
register pmap_t pmap;
|
||||
vm_offset_t sva, eva;
|
||||
pmap_t pmap;
|
||||
vaddr_t sva, eva;
|
||||
vm_prot_t prot;
|
||||
{
|
||||
register vm_offset_t nssva;
|
||||
register pt_entry_t *pte;
|
||||
register unsigned entry;
|
||||
vaddr_t nssva;
|
||||
pt_entry_t *pte;
|
||||
unsigned entry;
|
||||
u_int p;
|
||||
|
||||
#ifdef DEBUG
|
||||
|
@ -998,9 +998,9 @@ pmap_protect(pmap, sva, eva, prot)
|
|||
*/
|
||||
int
|
||||
pmap_is_page_ro(pmap, va, entry)
|
||||
pmap_t pmap;
|
||||
vm_offset_t va;
|
||||
int entry;
|
||||
pmap_t pmap;
|
||||
vaddr_t va;
|
||||
int entry;
|
||||
{
|
||||
return (entry & mips_pg_ro_bit());
|
||||
}
|
||||
|
@ -1012,13 +1012,13 @@ pmap_is_page_ro(pmap, va, entry)
|
|||
* Change all mappings of a page to cached/uncached.
|
||||
*/
|
||||
void
|
||||
pmap_page_cache(pa,mode)
|
||||
vm_offset_t pa;
|
||||
pmap_page_cache(pa, mode)
|
||||
paddr_t pa;
|
||||
{
|
||||
register pv_entry_t pv;
|
||||
register pt_entry_t *pte;
|
||||
register unsigned entry;
|
||||
register unsigned newmode;
|
||||
pv_entry_t pv;
|
||||
pt_entry_t *pte;
|
||||
unsigned entry;
|
||||
unsigned newmode;
|
||||
int s;
|
||||
|
||||
#ifdef DEBUG
|
||||
|
@ -1084,15 +1084,15 @@ pmap_page_cache(pa,mode)
|
|||
*/
|
||||
void
|
||||
pmap_enter(pmap, va, pa, prot, wired)
|
||||
register pmap_t pmap;
|
||||
vm_offset_t va;
|
||||
register vm_offset_t pa;
|
||||
pmap_t pmap;
|
||||
vaddr_t va;
|
||||
paddr_t pa;
|
||||
vm_prot_t prot;
|
||||
boolean_t wired;
|
||||
{
|
||||
register pt_entry_t *pte;
|
||||
pt_entry_t *pte;
|
||||
u_int npte;
|
||||
register int i;
|
||||
int i;
|
||||
vm_page_t mem;
|
||||
|
||||
#ifdef DEBUG
|
||||
|
@ -1317,13 +1317,13 @@ pmap_enter(pmap, va, pa, prot, wired)
|
|||
*/
|
||||
void
|
||||
pmap_change_wiring(pmap, va, wired)
|
||||
register pmap_t pmap;
|
||||
vm_offset_t va;
|
||||
pmap_t pmap;
|
||||
vaddr_t va;
|
||||
boolean_t wired;
|
||||
{
|
||||
register pt_entry_t *pte;
|
||||
pt_entry_t *pte;
|
||||
u_int p;
|
||||
register int i;
|
||||
int i;
|
||||
|
||||
#ifdef DEBUG
|
||||
if (pmapdebug & (PDB_FOLLOW|PDB_WIRING))
|
||||
|
@ -1369,12 +1369,12 @@ pmap_change_wiring(pmap, va, wired)
|
|||
* Extract the physical page address associated
|
||||
* with the given map/virtual_address pair.
|
||||
*/
|
||||
vm_offset_t
|
||||
vaddr_t
|
||||
pmap_extract(pmap, va)
|
||||
register pmap_t pmap;
|
||||
vm_offset_t va;
|
||||
pmap_t pmap;
|
||||
vaddr_t va;
|
||||
{
|
||||
register vm_offset_t pa;
|
||||
vaddr_t pa;
|
||||
|
||||
#ifdef DEBUG
|
||||
if (pmapdebug & PDB_FOLLOW)
|
||||
|
@ -1388,7 +1388,7 @@ pmap_extract(pmap, va)
|
|||
#endif
|
||||
pa = pfn_to_vad(kvtopte(va)->pt_entry);
|
||||
} else {
|
||||
register pt_entry_t *pte;
|
||||
pt_entry_t *pte;
|
||||
|
||||
if (!(pte = pmap_segmap(pmap, va)))
|
||||
pa = 0;
|
||||
|
@ -1418,9 +1418,9 @@ void
|
|||
pmap_copy(dst_pmap, src_pmap, dst_addr, len, src_addr)
|
||||
pmap_t dst_pmap;
|
||||
pmap_t src_pmap;
|
||||
vm_offset_t dst_addr;
|
||||
vm_size_t len;
|
||||
vm_offset_t src_addr;
|
||||
vaddr_t dst_addr;
|
||||
vsize_t len;
|
||||
vaddr_t src_addr;
|
||||
{
|
||||
|
||||
#ifdef DEBUG
|
||||
|
@ -1476,9 +1476,9 @@ pmap_collect(pmap)
|
|||
*/
|
||||
void
|
||||
pmap_zero_page(phys)
|
||||
vm_offset_t phys;
|
||||
paddr_t phys;
|
||||
{
|
||||
register int *p, *end;
|
||||
int *p, *end;
|
||||
|
||||
#ifdef DEBUG
|
||||
if (pmapdebug & PDB_FOLLOW)
|
||||
|
@ -1545,11 +1545,11 @@ pmap_zero_page(phys)
|
|||
*/
|
||||
void
|
||||
pmap_copy_page(src, dst)
|
||||
vm_offset_t src, dst;
|
||||
vaddr_t src, dst;
|
||||
{
|
||||
register int *s, *d, *end;
|
||||
register int tmp0, tmp1, tmp2, tmp3;
|
||||
register int tmp4, tmp5, tmp6, tmp7;
|
||||
int *s, *d, *end;
|
||||
int tmp0, tmp1, tmp2, tmp3;
|
||||
int tmp4, tmp5, tmp6, tmp7;
|
||||
|
||||
#ifdef DEBUG
|
||||
if (pmapdebug & PDB_FOLLOW)
|
||||
|
@ -1656,9 +1656,9 @@ pmap_copy_page(src, dst)
|
|||
*/
|
||||
void
|
||||
pmap_pageable(pmap, sva, eva, pageable)
|
||||
pmap_t pmap;
|
||||
vm_offset_t sva, eva;
|
||||
boolean_t pageable;
|
||||
pmap_t pmap;
|
||||
vaddr_t sva, eva;
|
||||
boolean_t pageable;
|
||||
{
|
||||
|
||||
#ifdef DEBUG
|
||||
|
@ -1675,8 +1675,9 @@ pmap_pageable(pmap, sva, eva, pageable)
|
|||
*/
|
||||
void
|
||||
pmap_clear_reference(pa)
|
||||
vm_offset_t pa;
|
||||
paddr_t pa;
|
||||
{
|
||||
|
||||
#ifdef DEBUG
|
||||
if (pmapdebug & PDB_FOLLOW)
|
||||
printf("pmap_clear_reference(%lx)\n", pa);
|
||||
|
@ -1693,7 +1694,7 @@ pmap_clear_reference(pa)
|
|||
*/
|
||||
boolean_t
|
||||
pmap_is_referenced(pa)
|
||||
vm_offset_t pa;
|
||||
paddr_t pa;
|
||||
{
|
||||
#if defined(UVM)
|
||||
if (PAGE_IS_MANAGED(pa))
|
||||
|
@ -1708,7 +1709,7 @@ pmap_is_referenced(pa)
|
|||
|
||||
void
|
||||
pmap_set_referenced(pa)
|
||||
vm_offset_t pa;
|
||||
paddr_t pa;
|
||||
{
|
||||
if (PAGE_IS_MANAGED(pa))
|
||||
*pa_to_attribute(pa) |= PV_MODIFIED;
|
||||
|
@ -1723,7 +1724,7 @@ pmap_set_referenced(pa)
|
|||
*/
|
||||
void
|
||||
pmap_clear_modify(pa)
|
||||
vm_offset_t pa;
|
||||
paddr_t pa;
|
||||
{
|
||||
|
||||
#ifdef DEBUG
|
||||
|
@ -1742,7 +1743,7 @@ pmap_clear_modify(pa)
|
|||
*/
|
||||
boolean_t
|
||||
pmap_is_modified(pa)
|
||||
vm_offset_t pa;
|
||||
paddr_t pa;
|
||||
{
|
||||
if (PAGE_IS_MANAGED(pa))
|
||||
return (*pa_to_attribute(pa) & PV_MODIFIED);
|
||||
|
@ -1760,7 +1761,7 @@ pmap_is_modified(pa)
|
|||
*/
|
||||
void
|
||||
pmap_set_modified(pa)
|
||||
vm_offset_t pa;
|
||||
paddr_t pa;
|
||||
{
|
||||
if (PAGE_IS_MANAGED(pa))
|
||||
*pa_to_attribute(pa) |= PV_MODIFIED;
|
||||
|
@ -1770,7 +1771,7 @@ pmap_set_modified(pa)
|
|||
#endif
|
||||
}
|
||||
|
||||
vm_offset_t
|
||||
vaddr_t
|
||||
pmap_phys_address(ppn)
|
||||
int ppn;
|
||||
{
|
||||
|
@ -1797,10 +1798,10 @@ pmap_phys_address(ppn)
|
|||
*/
|
||||
int
|
||||
pmap_alloc_tlbpid(p)
|
||||
register struct proc *p;
|
||||
struct proc *p;
|
||||
{
|
||||
register pmap_t pmap;
|
||||
register int id;
|
||||
pmap_t pmap;
|
||||
int id;
|
||||
|
||||
pmap = p->p_vmspace->vm_map.pmap;
|
||||
if (pmap->pm_tlbgen != tlbpid_gen) {
|
||||
|
@ -1839,10 +1840,11 @@ pmap_alloc_tlbpid(p)
|
|||
void
|
||||
pmap_enter_pv(pmap, va, pa, npte)
|
||||
pmap_t pmap;
|
||||
vm_offset_t va, pa;
|
||||
vaddr_t va;
|
||||
paddr_t pa;
|
||||
u_int *npte;
|
||||
{
|
||||
register pv_entry_t pv, npv;
|
||||
pv_entry_t pv, npv;
|
||||
int s;
|
||||
|
||||
pv = pa_to_pvh(pa);
|
||||
|
@ -1966,9 +1968,10 @@ pmap_enter_pv(pmap, va, pa, npte)
|
|||
int
|
||||
pmap_remove_pv(pmap, va, pa)
|
||||
pmap_t pmap;
|
||||
vm_offset_t va, pa;
|
||||
vaddr_t va;
|
||||
paddr_t pa;
|
||||
{
|
||||
register pv_entry_t pv, npv;
|
||||
pv_entry_t pv, npv;
|
||||
int s, last;
|
||||
|
||||
#ifdef DEBUG
|
||||
|
@ -2021,7 +2024,7 @@ pmap_remove_pv(pmap, va, pa)
|
|||
pt_entry_t *
|
||||
pmap_pte(pmap, va)
|
||||
pmap_t pmap;
|
||||
vm_offset_t va;
|
||||
vaddr_t va;
|
||||
{
|
||||
pt_entry_t *pte = NULL;
|
||||
|
||||
|
@ -2039,11 +2042,11 @@ pmap_pte(pmap, va)
|
|||
*/
|
||||
void
|
||||
pmap_prefer(foff, vap)
|
||||
register vm_offset_t foff;
|
||||
register vm_offset_t *vap;
|
||||
vaddr_t foff;
|
||||
vaddr_t *vap;
|
||||
{
|
||||
register vm_offset_t va = *vap;
|
||||
register long d;
|
||||
vaddr_t va = *vap;
|
||||
vsize_t d;
|
||||
|
||||
if (CPUISMIPS3) {
|
||||
d = foff - va;
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: process_machdep.c,v 1.8 1997/10/19 21:02:08 jonathan Exp $ */
|
||||
/* $NetBSD: process_machdep.c,v 1.9 1999/01/06 04:11:29 nisimura Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1994 Adam Glass
|
||||
|
@ -42,7 +42,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
|
||||
__KERNEL_RCSID(0, "$NetBSD: process_machdep.c,v 1.8 1997/10/19 21:02:08 jonathan Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: process_machdep.c,v 1.9 1999/01/06 04:11:29 nisimura Exp $");
|
||||
|
||||
/*
|
||||
* This file may seem a bit stylized, but that so that it's easier to port.
|
||||
|
@ -87,7 +87,7 @@ process_read_regs(p, regs)
|
|||
struct proc *p;
|
||||
struct reg *regs;
|
||||
{
|
||||
bcopy(p->p_md.md_regs, (caddr_t)regs, sizeof(struct reg));
|
||||
memcpy(regs, p->p_md.md_regs, sizeof(struct reg));
|
||||
return (0);
|
||||
}
|
||||
|
||||
|
@ -96,7 +96,7 @@ process_write_regs(p, regs)
|
|||
struct proc *p;
|
||||
struct reg *regs;
|
||||
{
|
||||
bcopy((caddr_t)regs, p->p_md.md_regs, sizeof(struct reg));
|
||||
memcpy(p->p_md.md_regs, regs, sizeof(struct reg));
|
||||
/*
|
||||
* XXX: is it safe to let users set system coprocessor regs?
|
||||
* XXX: Clear to user set bits!!
|
||||
|
@ -107,34 +107,34 @@ process_write_regs(p, regs)
|
|||
|
||||
int
|
||||
process_read_fpregs(p, regs)
|
||||
struct proc *p;
|
||||
struct fpreg *regs;
|
||||
struct proc *p;
|
||||
struct fpreg *regs;
|
||||
{
|
||||
if (p->p_md.md_flags & MDP_FPUSED) {
|
||||
if (p == fpcurproc)
|
||||
savefpregs(p);
|
||||
bcopy(&p->p_addr->u_pcb.pcb_fpregs, regs,
|
||||
sizeof(struct fpreg));
|
||||
memcpy(regs, &p->p_addr->u_pcb.pcb_fpregs,
|
||||
sizeof(struct fpreg));
|
||||
}
|
||||
else
|
||||
bzero((caddr_t)regs, sizeof(struct fpreg));
|
||||
memset(regs, 0, sizeof(struct fpreg));
|
||||
return 0;
|
||||
}
|
||||
|
||||
int
|
||||
process_write_fpregs(p, regs)
|
||||
struct proc *p;
|
||||
struct fpreg *regs;
|
||||
struct proc *p;
|
||||
struct fpreg *regs;
|
||||
{
|
||||
if ((p->p_md.md_flags & MDP_FPUSED) == 0) /* XXX */
|
||||
return EINVAL;
|
||||
|
||||
if (p->p_md.md_flags & MDP_FPUSED) {
|
||||
if (p == fpcurproc)
|
||||
savefpregs(p);
|
||||
savefpregs(p);
|
||||
}
|
||||
|
||||
bcopy(regs, &p->p_addr->u_pcb.pcb_fpregs, sizeof(struct fpreg));
|
||||
memcpy(&p->p_addr->u_pcb.pcb_fpregs, regs, sizeof(struct fpreg));
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -143,7 +143,7 @@ process_sstep(p, sstep)
|
|||
struct proc *p;
|
||||
{
|
||||
/* XXX what are the correct semantics: sstep once, or forevermore? */
|
||||
if(sstep)
|
||||
if (sstep)
|
||||
mips_singlestep(p);
|
||||
return (0);
|
||||
}
|
||||
|
@ -153,6 +153,6 @@ process_set_pc(p, addr)
|
|||
struct proc *p;
|
||||
caddr_t addr;
|
||||
{
|
||||
p->p_md.md_regs[PC] = (int)addr;
|
||||
((struct frame *)p->p_md.md_regs)->f_regs[PC] = (int)addr;
|
||||
return (0);
|
||||
}
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: sys_machdep.c,v 1.13 1998/02/25 21:41:56 perry Exp $ */
|
||||
/* $NetBSD: sys_machdep.c,v 1.14 1999/01/06 04:11:30 nisimura Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1992, 1993
|
||||
|
@ -66,7 +66,7 @@ vtrace(p, v, retval)
|
|||
void *v;
|
||||
register_t *retval;
|
||||
{
|
||||
register struct vtrace_args /* {
|
||||
struct vtrace_args /* {
|
||||
syscallarg(int) request;
|
||||
syscallarg(int) value;
|
||||
} */ *uap = v;
|
||||
|
@ -107,7 +107,7 @@ void
|
|||
vdoualarm(arg)
|
||||
int arg;
|
||||
{
|
||||
register struct proc *p;
|
||||
struct proc *p;
|
||||
|
||||
p = pfind(arg);
|
||||
if (p)
|
||||
|
@ -162,8 +162,8 @@ sys_sysarch(p, v, retval)
|
|||
int
|
||||
mips_user_cacheflush(p, va, nbytes, whichcache)
|
||||
struct proc *p;
|
||||
vm_offset_t va;
|
||||
register int nbytes, whichcache;
|
||||
vaddr_t va;
|
||||
int nbytes, whichcache;
|
||||
{
|
||||
|
||||
/* validate the cache we're going to flush. */
|
||||
|
@ -183,7 +183,7 @@ mips_user_cacheflush(p, va, nbytes, whichcache)
|
|||
|
||||
#else
|
||||
void * uncached_physaddr;
|
||||
register u_int len;
|
||||
u_int len;
|
||||
|
||||
/*
|
||||
* Invalidate each page in the virtual-address range,
|
||||
|
@ -209,8 +209,8 @@ mips_user_cacheflush(p, va, nbytes, whichcache)
|
|||
int
|
||||
mips_user_cachectl(p, va, nbytes, cachectl)
|
||||
struct proc *p;
|
||||
vm_offset_t va;
|
||||
register int nbytes, cachectl;
|
||||
vaddr_t va;
|
||||
int nbytes, cachectl;
|
||||
{
|
||||
/* validate the cache we're going to flush. */
|
||||
switch (cachectl) {
|
||||
|
@ -234,4 +234,3 @@ mips_user_cachectl(p, va, nbytes, cachectl)
|
|||
*/
|
||||
#endif
|
||||
}
|
||||
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: trap.c,v 1.97 1998/12/04 04:35:44 nisimura Exp $ */
|
||||
/* $NetBSD: trap.c,v 1.98 1999/01/06 04:11:29 nisimura Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1988 University of Utah.
|
||||
|
@ -43,7 +43,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
|
||||
__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.97 1998/12/04 04:35:44 nisimura Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.98 1999/01/06 04:11:29 nisimura Exp $");
|
||||
|
||||
#include "opt_cputype.h" /* which mips CPU levels do we support? */
|
||||
#include "opt_inet.h"
|
||||
|
@ -387,7 +387,6 @@ void trapDump __P((char * msg));
|
|||
extern void splx_end __P((void));
|
||||
extern void cpu_switch_end __P((void));
|
||||
extern void idle_end __P((void));
|
||||
extern void bcopy_end __P((void));
|
||||
extern char start[], edata[];
|
||||
|
||||
|
||||
|
@ -398,10 +397,7 @@ void mips_dump_tlb __P((int, int));
|
|||
/*
|
||||
* Other forward declarations.
|
||||
*/
|
||||
unsigned MachEmulateBranch __P((unsigned *regsPtr,
|
||||
unsigned instPC,
|
||||
unsigned fpcCSR,
|
||||
int allowNonBranch));
|
||||
vaddr_t MachEmulateBranch __P((struct frame *, vaddr_t, unsigned, int));
|
||||
|
||||
struct proc *fpcurproc;
|
||||
struct pcb *curpcb;
|
||||
|
@ -522,7 +518,7 @@ syscall(status, cause, opc, frame)
|
|||
|
||||
sticks = p->p_sticks;
|
||||
if (DELAYBRANCH(cause))
|
||||
frame->f_regs[PC] = MachEmulateBranch(frame->f_regs, opc, 0, 0);
|
||||
frame->f_regs[PC] = MachEmulateBranch(frame, opc, 0, 0);
|
||||
else
|
||||
frame->f_regs[PC] = opc + sizeof(int);
|
||||
callp = p->p_emul->e_sysent;
|
||||
|
@ -713,7 +709,7 @@ trap(status, cause, vaddr, opc, frame)
|
|||
if (KERNLAND(vaddr)) {
|
||||
pt_entry_t *pte;
|
||||
unsigned entry;
|
||||
vm_offset_t pa;
|
||||
vaddr_t pa;
|
||||
|
||||
pte = kvtopte(vaddr);
|
||||
entry = pte->pt_entry;
|
||||
|
@ -742,7 +738,7 @@ trap(status, cause, vaddr, opc, frame)
|
|||
{
|
||||
pt_entry_t *pte;
|
||||
unsigned entry;
|
||||
vm_offset_t pa;
|
||||
vaddr_t pa;
|
||||
pmap_t pmap;
|
||||
|
||||
pmap = p->p_vmspace->vm_map.pmap;
|
||||
|
@ -797,14 +793,14 @@ trap(status, cause, vaddr, opc, frame)
|
|||
ftype = VM_PROT_WRITE;
|
||||
pagefault: ;
|
||||
{
|
||||
vm_offset_t va;
|
||||
vaddr_t va;
|
||||
struct vmspace *vm;
|
||||
vm_map_t map;
|
||||
int rv;
|
||||
|
||||
vm = p->p_vmspace;
|
||||
map = &vm->vm_map;
|
||||
va = trunc_page((vm_offset_t)vaddr);
|
||||
va = trunc_page(vaddr);
|
||||
#if defined(UVM)
|
||||
rv = uvm_fault(map, va, 0, ftype);
|
||||
#ifdef VMFAULT_TRACE
|
||||
|
@ -852,10 +848,10 @@ trap(status, cause, vaddr, opc, frame)
|
|||
}
|
||||
kernelfault: ;
|
||||
{
|
||||
vm_offset_t va;
|
||||
vaddr_t va;
|
||||
int rv;
|
||||
|
||||
va = trunc_page((vm_offset_t)vaddr);
|
||||
va = trunc_page(vaddr);
|
||||
#if defined(UVM)
|
||||
rv = uvm_fault(kernel_map, va, 0, ftype);
|
||||
#else
|
||||
|
@ -884,7 +880,7 @@ trap(status, cause, vaddr, opc, frame)
|
|||
|
||||
case T_BREAK:
|
||||
#ifdef DDB
|
||||
kdb_trap(type, &frame);
|
||||
kdb_trap(type, (int *)&frame);
|
||||
return; /* KERN */
|
||||
#else
|
||||
goto dopanic;
|
||||
|
@ -913,9 +909,9 @@ trap(status, cause, vaddr, opc, frame)
|
|||
#ifndef NO_PROCFS_SUBR
|
||||
rv = suiword((caddr_t)va, p->p_md.md_ss_instr);
|
||||
if (rv < 0) {
|
||||
vm_offset_t sa, ea;
|
||||
sa = trunc_page((vm_offset_t)va);
|
||||
ea = round_page((vm_offset_t)va + sizeof(int) - 1);
|
||||
vaddr_t sa, ea;
|
||||
sa = trunc_page(va);
|
||||
ea = round_page(va + sizeof(int) - 1);
|
||||
#if defined(UVM)
|
||||
rv = uvm_map_protect(&p->p_vmspace->vm_map,
|
||||
sa, ea, VM_PROT_DEFAULT, FALSE);
|
||||
|
@ -1152,9 +1148,7 @@ void
|
|||
trapDump(msg)
|
||||
char *msg;
|
||||
{
|
||||
register int i;
|
||||
int s;
|
||||
int cause;
|
||||
int i, cause, s;
|
||||
|
||||
s = splhigh();
|
||||
printf("trapDump(%s)\n", msg);
|
||||
|
@ -1181,58 +1175,32 @@ trapDump(msg)
|
|||
#endif
|
||||
|
||||
/*
|
||||
* forward declaration
|
||||
* Analyse 'next' PC address taking account of branch/jump instructions
|
||||
*/
|
||||
static unsigned GetBranchDest __P((InstFmt *InstPtr));
|
||||
|
||||
|
||||
/*
|
||||
* Compute destination of a branch instruction.
|
||||
* XXX Compute desination of r4000 squashed branches?
|
||||
*/
|
||||
static unsigned
|
||||
GetBranchDest(InstPtr)
|
||||
InstFmt *InstPtr;
|
||||
{
|
||||
return ((unsigned)InstPtr + 4 + ((short)InstPtr->IType.imm << 2));
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Return the resulting PC as if the branch was executed.
|
||||
*/
|
||||
unsigned
|
||||
MachEmulateBranch(regsPtr, instPC, fpcCSR, allowNonBranch)
|
||||
unsigned *regsPtr;
|
||||
unsigned instPC;
|
||||
unsigned fpcCSR;
|
||||
vaddr_t
|
||||
MachEmulateBranch(f, instpc, fpuCSR, allowNonBranch)
|
||||
struct frame *f;
|
||||
vaddr_t instpc;
|
||||
unsigned fpuCSR;
|
||||
int allowNonBranch;
|
||||
{
|
||||
#define BRANCHTARGET(p) (4 + (p) + ((short)((InstFmt *)(p))->IType.imm << 2))
|
||||
InstFmt inst;
|
||||
unsigned retAddr;
|
||||
int condition;
|
||||
vaddr_t nextpc;
|
||||
|
||||
inst.word = (instPC < MIPS_KSEG0_START) ?
|
||||
fuiword((caddr_t)instPC) : *(unsigned*)instPC;
|
||||
if (instpc < MIPS_KSEG0_START)
|
||||
inst.word = fuiword((void *)instpc);
|
||||
else
|
||||
inst.word = *(unsigned *)instpc;
|
||||
|
||||
#if 0
|
||||
printf("regsPtr=%x PC=%x Inst=%x fpcCsr=%x\n", regsPtr, instPC,
|
||||
inst.word, fpcCSR); /* XXX */
|
||||
#endif
|
||||
switch ((int)inst.JType.op) {
|
||||
case OP_SPECIAL:
|
||||
switch ((int)inst.RType.func) {
|
||||
case OP_JR:
|
||||
case OP_JALR:
|
||||
retAddr = regsPtr[inst.RType.rs];
|
||||
break;
|
||||
|
||||
default:
|
||||
if (!allowNonBranch)
|
||||
panic("MachEmulateBranch: Non-branch");
|
||||
retAddr = instPC + 4;
|
||||
break;
|
||||
}
|
||||
if (inst.RType.func == OP_JR || inst.RType.func == OP_JALR)
|
||||
nextpc = f->f_regs[inst.RType.rs];
|
||||
else if (allowNonBranch)
|
||||
nextpc = instpc + 4;
|
||||
else
|
||||
panic("MachEmulateBranch: Non-branch");
|
||||
break;
|
||||
|
||||
case OP_BCOND:
|
||||
|
@ -1241,22 +1209,20 @@ MachEmulateBranch(regsPtr, instPC, fpcCSR, allowNonBranch)
|
|||
case OP_BLTZAL:
|
||||
case OP_BLTZL: /* squashed */
|
||||
case OP_BLTZALL: /* squashed */
|
||||
|
||||
if ((int)(regsPtr[inst.RType.rs]) < 0)
|
||||
retAddr = GetBranchDest((InstFmt *)instPC);
|
||||
if ((int)(f->f_regs[inst.RType.rs]) < 0)
|
||||
nextpc = BRANCHTARGET(instpc);
|
||||
else
|
||||
retAddr = instPC + 8;
|
||||
nextpc = instpc + 8;
|
||||
break;
|
||||
|
||||
case OP_BGEZ:
|
||||
case OP_BGEZAL:
|
||||
case OP_BGEZL: /* squashed */
|
||||
case OP_BGEZALL: /* squashed */
|
||||
|
||||
if ((int)(regsPtr[inst.RType.rs]) >= 0)
|
||||
retAddr = GetBranchDest((InstFmt *)instPC);
|
||||
if ((int)(f->f_regs[inst.RType.rs]) >= 0)
|
||||
nextpc = BRANCHTARGET(instpc);
|
||||
else
|
||||
retAddr = instPC + 8;
|
||||
nextpc = instpc + 8;
|
||||
break;
|
||||
|
||||
default:
|
||||
|
@ -1266,79 +1232,67 @@ MachEmulateBranch(regsPtr, instPC, fpcCSR, allowNonBranch)
|
|||
|
||||
case OP_J:
|
||||
case OP_JAL:
|
||||
retAddr = (inst.JType.target << 2) |
|
||||
((unsigned)instPC & 0xF0000000);
|
||||
nextpc = (inst.JType.target << 2) |
|
||||
((unsigned)instpc & 0xF0000000);
|
||||
break;
|
||||
|
||||
case OP_BEQ:
|
||||
case OP_BEQL: /* squashed */
|
||||
|
||||
if (regsPtr[inst.RType.rs] == regsPtr[inst.RType.rt])
|
||||
retAddr = GetBranchDest((InstFmt *)instPC);
|
||||
case OP_BEQL: /* squashed */
|
||||
if (f->f_regs[inst.RType.rs] == f->f_regs[inst.RType.rt])
|
||||
nextpc = BRANCHTARGET(instpc);
|
||||
else
|
||||
retAddr = instPC + 8;
|
||||
nextpc = instpc + 8;
|
||||
break;
|
||||
|
||||
case OP_BNE:
|
||||
case OP_BNEL: /* squashed */
|
||||
|
||||
if (regsPtr[inst.RType.rs] != regsPtr[inst.RType.rt])
|
||||
retAddr = GetBranchDest((InstFmt *)instPC);
|
||||
case OP_BNEL: /* squashed */
|
||||
if (f->f_regs[inst.RType.rs] != f->f_regs[inst.RType.rt])
|
||||
nextpc = BRANCHTARGET(instpc);
|
||||
else
|
||||
retAddr = instPC + 8;
|
||||
nextpc = instpc + 8;
|
||||
break;
|
||||
|
||||
case OP_BLEZ:
|
||||
case OP_BLEZL: /* squashed */
|
||||
|
||||
if ((int)(regsPtr[inst.RType.rs]) <= 0)
|
||||
retAddr = GetBranchDest((InstFmt *)instPC);
|
||||
case OP_BLEZL: /* squashed */
|
||||
if ((int)(f->f_regs[inst.RType.rs]) <= 0)
|
||||
nextpc = BRANCHTARGET(instpc);
|
||||
else
|
||||
retAddr = instPC + 8;
|
||||
nextpc = instpc + 8;
|
||||
break;
|
||||
|
||||
case OP_BGTZ:
|
||||
case OP_BGTZL: /* squashed */
|
||||
|
||||
if ((int)(regsPtr[inst.RType.rs]) > 0)
|
||||
retAddr = GetBranchDest((InstFmt *)instPC);
|
||||
case OP_BGTZL: /* squashed */
|
||||
if ((int)(f->f_regs[inst.RType.rs]) > 0)
|
||||
nextpc = BRANCHTARGET(instpc);
|
||||
else
|
||||
retAddr = instPC + 8;
|
||||
nextpc = instpc + 8;
|
||||
break;
|
||||
|
||||
case OP_COP1:
|
||||
switch (inst.RType.rs) {
|
||||
case OP_BCx:
|
||||
case OP_BCy:
|
||||
if ((inst.RType.rt & COPz_BC_TF_MASK) == COPz_BC_TRUE)
|
||||
condition = fpcCSR & MIPS_FPU_COND_BIT;
|
||||
else
|
||||
condition = !(fpcCSR & MIPS_FPU_COND_BIT);
|
||||
if (inst.RType.rs == OP_BCx || inst.RType.rs == OP_BCy) {
|
||||
int condition = (fpuCSR & MIPS_FPU_COND_BIT) != 0;
|
||||
if ((inst.RType.rt & COPz_BC_TF_MASK) != COPz_BC_TRUE)
|
||||
condition = !condition;
|
||||
if (condition)
|
||||
retAddr = GetBranchDest((InstFmt *)instPC);
|
||||
nextpc = BRANCHTARGET(instpc);
|
||||
else
|
||||
retAddr = instPC + 8;
|
||||
break;
|
||||
|
||||
default:
|
||||
if (!allowNonBranch)
|
||||
panic("MachEmulateBranch: Bad coproc branch instruction");
|
||||
retAddr = instPC + 4;
|
||||
nextpc = instpc + 8;
|
||||
}
|
||||
else if (allowNonBranch)
|
||||
nextpc = instpc + 4;
|
||||
else
|
||||
panic("MachEmulateBranch: Bad COP1 branch instruction");
|
||||
break;
|
||||
|
||||
default:
|
||||
if (!allowNonBranch)
|
||||
panic("MachEmulateBranch: Non-branch instruction");
|
||||
retAddr = instPC + 4;
|
||||
nextpc = instpc + 4;
|
||||
}
|
||||
#if 0
|
||||
printf("Target addr=%x\n", retAddr); /* XXX */
|
||||
#endif
|
||||
return (retAddr);
|
||||
return nextpc;
|
||||
#undef BRANCHTARGET
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* This routine is called by procxmt() to single step one instruction.
|
||||
* We do this by storing a break instruction after the current instruction,
|
||||
|
@ -1350,7 +1304,7 @@ mips_singlestep(p)
|
|||
{
|
||||
#ifdef NO_PROCFS_SUBR
|
||||
struct frame *f = (struct frame *)p->p_md.md_regs;
|
||||
unsigned va = 0;
|
||||
vaddr_t pc, va;
|
||||
int rv;
|
||||
|
||||
if (p->p_md.md_ss_addr) {
|
||||
|
@ -1358,8 +1312,9 @@ mips_singlestep(p)
|
|||
p->p_comm, p->p_pid, p->p_md.md_ss_addr, va); /* XXX */
|
||||
return EFAULT;
|
||||
}
|
||||
if (fuiword((caddr_t)f->f_regs[PC]) != 0) /* not a NOP instruction */
|
||||
va = MachEmulateBranch(f->f_regs, f->f_regs[PC],
|
||||
pc = (vaddr_t)f->f_regs[PC];
|
||||
if (fuiword((void *)pc) != 0) /* not a NOP instruction */
|
||||
va = MachEmulateBranch(f, pc,
|
||||
p->p_addr->u_pcb.pcb_fpregs.r_regs[32], 1);
|
||||
else
|
||||
va = f->f_regs[PC] + sizeof(int);
|
||||
|
@ -1367,9 +1322,9 @@ mips_singlestep(p)
|
|||
p->p_md.md_ss_instr = fuiword((caddr_t)va);
|
||||
rv = suiword((caddr_t)va, MIPS_BREAK_SSTEP);
|
||||
if (rv < 0) {
|
||||
vm_offset_t sa, ea;
|
||||
sa = trunc_page((vm_offset_t)va);
|
||||
ea = round_page((vm_offset_t)va + sizeof(int) - 1);
|
||||
vaddr_t sa, ea;
|
||||
sa = trunc_page(va);
|
||||
ea = round_page(va + sizeof(int) - 1);
|
||||
#if defined(UVM)
|
||||
rv = uvm_map_protect(&p->p_vmspace->vm_map,
|
||||
sa, ea, VM_PROT_DEFAULT, FALSE);
|
||||
|
@ -1426,7 +1381,7 @@ mips_singlestep(p)
|
|||
|
||||
/* compute next address after current location */
|
||||
if (curinstr != 0)
|
||||
va = MachEmulateBranch(f->f_regs, pc,
|
||||
va = MachEmulateBranch(f, pc,
|
||||
p->p_addr->u_pcb.pcb_fpregs.r_regs[32], 1);
|
||||
else
|
||||
va = pc + sizeof(int);
|
||||
|
@ -1459,7 +1414,7 @@ mips_singlestep(p)
|
|||
#if defined(DEBUG) || defined(DDB)
|
||||
int
|
||||
kdbpeek(addr)
|
||||
vm_offset_t addr;
|
||||
vaddr_t addr;
|
||||
{
|
||||
if (addr & 3) {
|
||||
printf("kdbpeek: unaligned address %lx\n", addr);
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: vm_machdep.c,v 1.31 1998/12/03 06:28:46 nisimura Exp $ */
|
||||
/* $NetBSD: vm_machdep.c,v 1.32 1999/01/06 04:11:30 nisimura Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1988 University of Utah.
|
||||
|
@ -43,7 +43,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
|
||||
__KERNEL_RCSID(0, "$NetBSD: vm_machdep.c,v 1.31 1998/12/03 06:28:46 nisimura Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: vm_machdep.c,v 1.32 1999/01/06 04:11:30 nisimura Exp $");
|
||||
|
||||
#include "opt_uvm.h"
|
||||
|
||||
|
@ -72,7 +72,7 @@ __KERNEL_RCSID(0, "$NetBSD: vm_machdep.c,v 1.31 1998/12/03 06:28:46 nisimura Exp
|
|||
/* XXX will be declared in mips/include/cpu.h XXX */
|
||||
extern struct proc *fpcurproc;
|
||||
|
||||
extern vm_offset_t kvtophys __P((vm_offset_t kva)); /* XXX */
|
||||
extern paddr_t kvtophys __P((vaddr_t kva)); /* XXX */
|
||||
|
||||
/*
|
||||
* cpu_fork() now returns just once.
|
||||
|
@ -94,7 +94,7 @@ cpu_fork(p1, p2)
|
|||
|
||||
#ifdef MIPS3
|
||||
if (CPUISMIPS3)
|
||||
mips3_HitFlushDCache((vm_offset_t)p2->p_addr, USPACE);
|
||||
mips3_HitFlushDCache((vaddr_t)p2->p_addr, USPACE);
|
||||
#endif
|
||||
|
||||
if (p1 == fpcurproc)
|
||||
|
@ -251,12 +251,12 @@ pagemove(from, to, size)
|
|||
if (CPUISMIPS3 &&
|
||||
((int)from & mips_CacheAliasMask) !=
|
||||
((int)to & mips_CacheAliasMask)) {
|
||||
mips3_HitFlushDCache((vm_offset_t)from, size);
|
||||
mips3_HitFlushDCache((vaddr_t)from, size);
|
||||
}
|
||||
#endif
|
||||
while (size > 0) {
|
||||
MachTLBFlushAddr((vm_offset_t)from);
|
||||
MachTLBUpdate((vm_offset_t)to, fpte->pt_entry);
|
||||
MachTLBFlushAddr((vaddr_t)from);
|
||||
MachTLBUpdate((vaddr_t)to, fpte->pt_entry);
|
||||
*tpte = *fpte;
|
||||
if (CPUISMIPS3)
|
||||
fpte->pt_entry = MIPS3_PG_NV | MIPS3_PG_G;
|
||||
|
@ -281,17 +281,18 @@ extern vm_map_t phys_map;
|
|||
void
|
||||
vmapbuf(bp, len)
|
||||
struct buf *bp;
|
||||
vm_size_t len;
|
||||
vsize_t len;
|
||||
{
|
||||
vm_offset_t faddr, taddr, off;
|
||||
vaddr_t faddr, taddr;
|
||||
vsize_t off;
|
||||
pt_entry_t *fpte, *tpte;
|
||||
pt_entry_t *pmap_pte __P((pmap_t, vm_offset_t));
|
||||
register u_int pt_mask;
|
||||
pt_entry_t *pmap_pte __P((pmap_t, vaddr_t));
|
||||
u_int pt_mask;
|
||||
|
||||
if ((bp->b_flags & B_PHYS) == 0)
|
||||
panic("vmapbuf");
|
||||
faddr = trunc_page(bp->b_saveaddr = bp->b_data);
|
||||
off = (vm_offset_t)bp->b_data - faddr;
|
||||
off = (vaddr_t)bp->b_data - faddr;
|
||||
len = round_page(off + len);
|
||||
#if defined(UVM)
|
||||
taddr = uvm_km_valloc_wait(phys_map, len);
|
||||
|
@ -323,14 +324,15 @@ vmapbuf(bp, len)
|
|||
void
|
||||
vunmapbuf(bp, len)
|
||||
struct buf *bp;
|
||||
vm_size_t len;
|
||||
vsize_t len;
|
||||
{
|
||||
vm_offset_t addr, off;
|
||||
vaddr_t addr;
|
||||
vsize_t off;
|
||||
|
||||
if ((bp->b_flags & B_PHYS) == 0)
|
||||
panic("vunmapbuf");
|
||||
addr = trunc_page(bp->b_data);
|
||||
off = (vm_offset_t)bp->b_data - addr;
|
||||
off = (vaddr_t)bp->b_data - addr;
|
||||
len = round_page(off + len);
|
||||
#if defined(UVM)
|
||||
uvm_km_free_wakeup(phys_map, addr, len);
|
||||
|
@ -359,11 +361,11 @@ vunmapbuf(bp, len)
|
|||
* XXX the double-mapped u-area holding the current process's kernel stack
|
||||
* and u-area at a fixed address should be fixed.
|
||||
*/
|
||||
vm_offset_t
|
||||
kvtophys(vm_offset_t kva)
|
||||
paddr_t
|
||||
kvtophys(vaddr_t kva)
|
||||
{
|
||||
pt_entry_t *pte;
|
||||
vm_offset_t phys;
|
||||
paddr_t phys;
|
||||
|
||||
if (kva >= MIPS_KSEG0_START && kva < MIPS_KSEG1_START)
|
||||
{
|
||||
|
|
Loading…
Reference in New Issue