e6286b949a
Add some framework for MI assignment of device majors - add sys/dev/majors
...
which is automatically included during kernel config, and add comments
to individual machine-dependant majors.* files to assign new MI majors
in MI file.
Range 0-191 is reserved for machine-specific assignments, range
192+ are MI assignments.
Follows recent discussion on tech-kern@
2003-10-05 08:04:24 +00:00
81227d1ae1
avoid compile error with GCC3, and add some comments.
2003-10-03 07:24:05 +00:00
2652188cc4
New generic I2C framework. Supports bit-bang and "intelligent" I2C
...
interface controllers (of varying intelligence levels).
Contributed by Wasabi Systems, Inc. Primarily written by Steve Woodford,
with some modification by me.
2003-09-30 00:35:30 +00:00
960dfae23f
Define ELF32_MACHDEP_ENDIANNESS according to target byte order.
2003-09-29 09:08:20 +00:00
4d59420344
Move __cpu_simple_lock_t and __SIMPLELOCK_{UN,}LOCKED to machine/types.h
...
so that they can be used in a namespace-friendly way.
2003-09-26 22:45:41 +00:00
550b4bef88
Fix "constify sendsig/trapsignal" fallout for non-siginfo'd archs. Test
...
compiled on most architectures.
2003-09-26 12:02:55 +00:00
066497ec38
add comment and delete unused definition
2003-09-25 14:48:16 +00:00
663ccee1cc
pci bus support
2003-09-25 14:11:18 +00:00
3e08e45a55
Fix GCC 3 barfage.
2003-09-24 11:57:44 +00:00
6b19830ebb
Tweak register usage to shave a couple of instructions off
...
the Xscale code.
2003-09-23 10:01:36 +00:00
6bf111a80e
Fix GCC 3.3.1 nits.
2003-09-21 19:32:37 +00:00
b9d20d131e
Fix GCC 3.3.1 nits
2003-09-21 15:12:16 +00:00
2d54fd3a9c
Change some type-punning detected by gcc 3.3.1 to (void *).
2003-09-21 00:26:09 +00:00
81976735fd
If we're going to reference SA variables in this file, might as well
...
include the header file to define them. From Steve Woodford.
2003-09-19 11:42:20 +00:00
2c1366cfee
add MD part of SA/pthread pagefault handling on arm
2003-09-18 22:37:38 +00:00
22d06d95f5
fix typo
...
#if DEBUG -> #ifdef PCI_DEBUG
2003-09-15 05:11:31 +00:00
4be788fe81
add address decode of "PCI Configuration type 1"
2003-09-15 05:07:29 +00:00
27dc577349
Tidy up a couple of bits to avoid duplication within the switch.
2003-09-13 14:31:34 +00:00
346b195550
Backout previous, now that <sys/syscall.h> is fixed it's SYS___sigreturn14
...
again (until we convert to siginfo).
2003-09-11 19:36:29 +00:00
877b3cbe5e
Hand-optimised in_cksum/in4_cksum for ARM and XSCALE.
...
Contributed by Wasabi Systems, with input from Chris Gilbert,
Richard Earnshaw and David Laight.
2003-09-11 18:54:31 +00:00
d440784b30
__{BEGIN,END}_DECLS-wrap prototypes.
2003-09-11 09:40:11 +00:00
ab0f909e6e
s/SYS___sigreturn14/SYS_compat_16___sigreturn14/
2003-09-11 03:57:29 +00:00
b805fdb7fa
Add build-system support for ARM10.
2003-09-06 09:48:47 +00:00
46af0c9f17
Make sure _ARM32_BUS_DMA_PRIVATE is defined before we pull in any
...
include files to avoid problems with the rats nest of dependencies.
2003-09-06 09:46:37 +00:00
da86d47fb0
Support for initializing ARM10 processors in write-through mode.
2003-09-06 09:44:10 +00:00
ec2b5e2dfd
Support for ARM10E class devices.
2003-09-06 09:42:12 +00:00
1eba58255a
Support for ARM10. Extract some additional information about the
...
dcache so that we can have cache cleaning code that works for any
permitted arm10 cache architecture.
2003-09-06 09:31:37 +00:00
bb00ee6bce
Add a function to read the processor cache configuation register.
2003-09-06 09:14:52 +00:00
637a44c215
Processor-specific operations for ARM10 class devices.
2003-09-06 09:12:29 +00:00
d4e1e335e8
Add support for ARM10 class processors.
2003-09-06 09:10:46 +00:00
a515ec698a
Add processor-specific declarations for ARM10 class processors.
2003-09-06 09:08:35 +00:00
446ca3f32d
Fix declarations of primary cache variables, so that they are
...
declarations, not definitions.
2003-09-06 09:04:52 +00:00
cfcc3a8ad4
Add support for ARM10 class devices.
2003-09-06 08:55:42 +00:00
e1f8618cbd
Add arm1020E cpu id
2003-09-06 08:43:02 +00:00
e5168f409e
Use generic versions of rr_1, wr_1, sr_1 -- some PCMCIA cards use these.
2003-09-03 03:15:02 +00:00
f13bd83ab3
Minor tweak for some macros elsewhere.
2003-09-03 03:12:28 +00:00
1e2b27307d
Add some register definitions.
2003-09-03 03:11:50 +00:00
b715eaff3c
Recognize some TI processors -- not that you'd want to use them.
2003-09-03 02:07:07 +00:00
de45322924
support EXTINT[4:23] as interrupt sources. They are cascaded to
...
IRQ4 (EXTINT[4:7]) and 5 (EXTINT[8:23]). ssextio driver handles these interrupts.
2003-08-29 12:57:50 +00:00
23b593ca51
+ set vendor name as Samsung.
...
+ delete debug printf() and use aprint_normal()
2003-08-29 12:38:48 +00:00
7726d33fed
+ fix the definition of timer #4 observation register. This change fixed
...
delay() bug.
+ match the names of timer registers to those in user's manual.
2003-08-27 03:57:05 +00:00
13543d215c
move some definitions of register block size from s3c24[10]0reg.h
...
to s3c24x0reg.h when they are same for S3C2410 and 2400, and rename them as
S3C24X0_FOO_SIZE.
2003-08-27 03:46:05 +00:00
0e001a53fa
make it "static long nil;" as it's used as &nil in an array wanting long *'s.
...
makes GCC3 happy.
2003-08-25 04:51:10 +00:00
4440262659
create /dev/crypto
2003-08-22 05:06:22 +00:00
10c7bfc755
split StrongArm companion chip (sacc) driver so that we can support
...
sacc on other platforms than hpcarm (evbarm for example).
codes specific to hpcarm are extracted and moved to hpcarm/dev/.
2003-08-08 12:29:22 +00:00
02087c6497
make this compile again. (arm32_bus_dma_tag._cookie)
2003-08-07 16:58:35 +00:00
aad01611e7
Move UCB-licensed code from 4-clause to 3-clause licence.
...
Patches provided by Joel Baker in PR 22364, verified by myself.
2003-08-07 16:26:28 +00:00
208a93d254
fix dont reset register when every interrupt.
...
pointed by Shoichi Miyake port-arm/22392
2003-08-07 13:32:27 +00:00
f2de581410
forgot to add copyright.
2003-08-05 11:44:28 +00:00
3245163bdf
support S3C2410's built-in USB host controller, which is OHCI
...
compliant.
2003-08-05 11:28:59 +00:00
jdolecek