Add some register definitions.
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@ -1,4 +1,4 @@
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/* $NetBSD: s3c2410reg.h,v 1.3 2003/08/27 03:46:05 bsh Exp $ */
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/* $NetBSD: s3c2410reg.h,v 1.4 2003/09/03 03:11:50 mycroft Exp $ */
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/*
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* Copyright (c) 2003 Genetec corporation. All rights reserved.
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@ -112,7 +112,11 @@
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#define S3C2410_INTCTL_SIZE 0x20
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/* Clock control: CLKCON register */
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/* Clock control */
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#define CLKMAN_LOCKTIME 0x00
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#define CLKMAN_MPLLCON 0x04
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#define CLKMAN_UPLLCON 0x08
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#define CLKMAN_CLKCON 0x0c
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#define CLKCON_SPI (1<<18)
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#define CLKCON_IIS (1<<17)
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#define CLKCON_IIC (1<<16)
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@ -130,6 +134,10 @@
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#define CLKCON_NANDFC (1<<4) /* PCLK to NAND Flash controller */
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#define CLKCON_IDLE (1<<2) /* 1=transition to IDLE mode */
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#define CLKCON_STOP (1<<0) /* 1=transition to STOP mode */
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#define CLKMAN_CLKSLOW 0x10
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#define CLKMAN_CLKDIVN 0x14
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#define CLKDIVN_HDIVN (1<<1) /* hclk=fclk/2 */
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#define CLKDIVN_PDIVN (1<<0) /* pclk=hclk/2 */
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/* NAND Flash controller */
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#define NANDFC_NFCONF 0x00 /* Configuration */
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