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43 Commits

Author SHA1 Message Date
kiyohara a4c1b5d6be Add support Marvell Dove. 
Also <SoC>_intr_bootstrap() rename to <SoC>_bootstrap(). And SoC init func, getclk into that.
 2017-01-07 16:19:28 +00:00
hsuenaga 7d6cdecd7e initialize ARMADA XP's Mbus address decoder and code clean up 
probably we need more sophisticated Mbus driver or KPI...
 2015-06-03 03:25:51 +00:00
hsuenaga 18a97e755e add synchronization barrier for AURORA_IO_CACHE_COHERENCY. 
cleanup MARVELL L2 cache code.
 2015-05-14 05:39:32 +00:00
hsuenaga 4e3bd6105a add new ethernet driver mvxpe for recent MARVELL's SoC after ARMADA/XP. 
this driver supports 'counter mode', and is disabled by default.

ARMADA SoC family has new ethernet controller acceleration mode called
'enhanced mode' or 'counter mode.' it seems that backward compatibility mode
used by if_mvgbe is still working, but the specification of the old mode
is completely disappeared from SoC's reference manual.

I tested the driver using MIRABOX(ARMADA/370).
 2015-05-03 14:38:09 +00:00
kiyohara 9e620e2f41 Fix initialize PJ4B. 2014-08-30 13:28:07 +00:00
kiyohara 586b335e2c Fix broken registers. 2014-08-30 13:24:44 +00:00
kiyohara a31b3d055c Support __HAVE_MM_MD_DIRECT_MAPPED_PHYS. 2014-08-30 13:19:52 +00:00
kiyohara d3fda78cda Use armreg_ttbr_read() instead of __asm("mrc ..."). 2014-08-30 13:15:52 +00:00
matt 36d3623386 Add hook to set L2 cache to write-through 2014-04-14 20:53:28 +00:00
matt 149bf5cc01 Add _LOCORE around marvell_interregs_pbase 2014-03-18 07:30:09 +00:00
kiyohara 6597406b24 Support options MVSOC_INTERREGS_PBASE for *old* Armada {XP,370} machines. 2014-03-15 13:56:19 +00:00
kiyohara 4601694a8e Support Armada 370. 2014-03-15 13:48:44 +00:00
kiyohara f376d26f65 Abolish run time configuration for mapped address of SoC by u-boot. 
This had become a cause hang-ups from some models.
 2014-01-29 04:27:26 +00:00
kiyohara 4200b0bab8 Support to check the clock gating for Armada XP in armadaxp.c. 
Also move the checking for clock gate of Kirkwood into kirkwood.c.
 2013-12-23 04:12:09 +00:00
kiyohara c17671e989 Move Misc Registers from mvsocreg.h to armadaxpreg.h. These registers only 
Armada XP.  The misc_base initializes in initarm() instead of mvsoc_bootstrap().
 2013-12-23 03:19:43 +00:00
kiyohara 4d2dd5e114 Rename marvell_system_reset_old from marvell_system_reset. 
And add reset function for ArmadaXP.  It named marvell_system_reset.
 2013-11-20 12:59:21 +00:00
kiyohara d0eef02cbd Initialize mvTclk in SOC_getclks() before call consinit(). 
And more fast call set_cpufuncs().
 2013-11-20 12:52:24 +00:00
kiyohara 0e5a795e81 Remove undefined CPU ID. Thanks skrll@. 2013-10-02 12:41:06 +00:00
kiyohara cbe271df9d Support ARMADA XP. 2013-09-30 12:57:53 +00:00
kiyohara cd5fb389c3 Support ARMADAXP. 
+ Add MVSOC_FIXUP_DEVID.
  + check mapped address for SoC registers.
 2013-09-30 12:54:59 +00:00
rkujawa c370465bf5 Handle differences for Armada XP. 
Obtained from Marvell, Semihalf.
 2013-05-01 12:32:46 +00:00
matt d3ada46e2f Change physical_end to segment_end to avoid shadowing a global. 2012-12-12 00:03:11 +00:00
msaitoh bbe22882db Get bootargs and parse them. This was accidentally removed in rev. 1.17. 
Fixes PR#47250.
 2012-12-02 18:20:20 +00:00
matt 64683924bd Switch to ARM_VECTORS_HIGH 2012-10-22 15:43:32 +00:00
matt 8943663d89 Increase kernel VM space. 2012-09-07 04:40:13 +00:00
matt dd5988d137 Switch beagle and marvell to use the new boot/init code. 2012-09-01 00:20:49 +00:00
kiyohara 77342f3cf9 Allocate more VM space for over 8M kernel. 2012-08-23 10:48:19 +00:00
matt 83d36728df Move the standard definitions of the {UND,IRQ,FIQ,ABT}_STACK_SIZE to 
<arm32/machdep.h>
Move the extern for cpu_reset_address to the same file.
Add cpu_reset_address_paddr.
Kill cpu_reset_v4_MMU_disable.
if cpu_reset_address is NULL, then the MMU will be disabled.
 2012-08-16 18:22:37 +00:00
matt ed55a69d33 Make mvsoc_bootstrap (so it can initial an early console). 2012-08-10 02:33:11 +00:00
kiyohara 3c453cf6bc Remove unnecessary property 'xore-irq-begin'. 2012-08-03 08:01:35 +00:00
kiyohara 576b2b8edd Fix to assert. We call to strncpy(), if r3 of args is valid from u-boot. 2012-08-03 07:56:37 +00:00
matt a039bd91a6 Fix more -fno-common fallout. 
Move more variables to common locations.
 2012-07-29 00:07:06 +00:00
matt a971ba5943 Remove declartions of physmem 2012-07-28 19:08:22 +00:00
kiyohara ecbe55adfa Support 88F6282. But PEX1 not test. 2012-07-18 10:28:47 +00:00
kiyohara d4116d0d96 Set default EVBARM_BOARDTYPE is Marvell. 2012-07-18 08:51:42 +00:00
tsutsui aa4070f274 Make this compile NMVPEX > 0 && !ORION && KIRKWOOD. 2012-03-31 02:36:31 +00:00
jakllsch 273d253879 "if (mvTclk == 166666667) mvTclk = 166664740;" does not make sense. 
It's within the margin of a 25.000MHz crystal multiplied by 20
and divided by 3, so it's moot anyway.
 2012-01-27 15:28:32 +00:00
wiz 4cbd24b23f dependant -> dependent 2011-06-30 20:09:15 +00:00
jakllsch bb246152ed Use the command line U-Boot gave us for boothowto. From evbarm/gumstix. 2011-02-01 23:23:52 +00:00
jakllsch 476e483aa2 Address 3rd issue in PR#43990. 
Different implementation but same method as suggested.
 2011-02-01 22:54:24 +00:00
jakllsch fdf24150c5 ksyms_init() happens in main() now. 2011-02-01 22:36:41 +00:00
matt 497ddd31b9 Add RCSID when needed. 
Don't include pmap.h or pte.h, include "assym.h" instead.
Use assym.h provided values.
 2011-01-31 06:28:02 +00:00
kiyohara 464a6fe072 Add support Marvell Sheevaplug. 
Add some NAS on Marvell SoC.
 2010-10-03 06:03:10 +00:00