- alpha_rpcc(), alpha_mb(), alpha_wmb() -- these are instructions, and
we win by inlining them: rpcc is generally used for profiling, and
the memory barriers really should execute as quickly as possible with
minimal side-effects (like additional loads/stores required to call the
functions!)
- alpha_pal_imb(), alpha_pal_rdps(), alpha_pal_swpipl(), alpha_pal_tbi(),
alpha_pal_whami() -- these are PALcode ops. We must specify some register
clobbers for these.
We have a very decent size savings as a result. My test system:
text data bss dec hex filename
2671724 235848 377016 3284588 321e6c /netbsd.bak
2617708 235736 377016 3230460 314afc /netbsd
Most of this comes from fewer register saves/restores around spl*() calls
(now that alpha_pal_rdps() and alpha_pal_swpipl() are inlined).
Note that alpha_pal_rdps() and alpha_pal_swpipl() remain in pal.s to
maintain binary compatibility with LKMs that may use spl*() functions.
add an IPI which causes the target CPU to perform AST processing when
it returns to userspace.
- Add a way to get/set a private pointer in the shared interrupt header.
longer need to lock the kernel pmap in pmap_kenter_pa() and pmap_kremove().
- Since locking the kernel pmap in interrupt context is no longer required,
don't go to splimp() when locking the kernel pmap.
- Implement a new pmap_remove() function, not yet enabled by default. It
is structured like pmap_protect, and should be *much* faster. This was
actually written quite some time ago, but never committed because it
didn't work properly. Given the recent bugfix to pmap_protect(), "duh,
of course it didn't work properly before...". It seems to work fine now
(have done several builds and run the UVM regression tests using the new
code), but it is currently run-time optional so that some performance
measurements can be easily run against the old and new code.
big-endian. i386, pc532 and vax still include <machine/byte_swap.h>
and define macros for the {n,h}to{h,n}*() functions. mips also
defines some endian-independent assembly-code aliases for unaligned
memory accesses.
that is priority is rasied. Add a new spllowersoftclock() to provide the
atomic drop-to-softclock semantics that the old splsoftclock() provided,
and update calls accordingly.
This fixes a problem with using the "rnd" pseudo-device from within
interrupt context to extract random data (e.g. from within the softnet
interrupt) where doing so would incorrectly unblock interrupts (causing
all sorts of lossage).
XXX 4 platforms do not have priority-raising capability: newsmips, sparc,
XXX sparc64, and VAX. This platforms still have this bug until their
XXX spl*() functions are fixed.
context, so we must block interrupts which may cause memory allocation
before asserting the kernel pmap's lock. Put this all in PMAP_LOCK()
and PMAP_UNLOCK() macros to make it easier.
* Implement fpgetsticky() for alpha.
* Direct fpsetsticky() and fp{get,set}mask() into alpha kernel via sysarch(2).
* Define new sysarch(2) stub for above and install and distribute sysarch.h
for alpha. (The fpcr IS user mode r/w, but for reasons beyond the scope
of a commit message kernel calls are needed.) And much kernel Magick is
required before these do anything, but this way programs compiled under
1.4 will DTRT on future snapshots and releases.
allocated from a pool, and the MIPS and Alpha use KSEG to map pool
pages. So, mb_map wasn't actually being used. Saves around 4MB of
kernel virtual address space in a typical configuration.
Garbage-collect the related VM_MBUF_SIZE constant.
"BUS_SPACE_ALIGNED_POINTER()".
Equal to the param.h "ALIGNED_POINTER()" normally, but obeys additional
requirements of the bus_space_xxx_n() macros. (BUS_SPACE_DEBUG)
additional processors are spun up on multiprocessor Alpha systems.
Now, each processor gets its own idle thread (the primary processor
uses proc0). This idle thread is used in switch_exit(), rather than
explicitly referencing proc0.
Also, make `curproc', `fpcurproc', and `curpcb' per-cpu values. This
required some data structure rearrangement; cpu info is now statically
allocated in the BSS, rather than via malloc(), and cpu_softc is gone.
(Modeled somewhat after NetBSD/sparc's multiprocessor info structures.)
minor of libc and the major of libutil). For little-endian architectures
merge the bnswap() assembly versions with nto* and hton* using symbols
aliasing. Use symbol renaming for the bswap function in this case to avoid
namespace pollution.
Declare bswap* in machine/bswap.h, not machine/endian.h. For little-endian
machines, common code for inline macros go in machine/byte_swap.h
Sync libkern with libc.
Adjust #include in kernel sources for machine/bswap.h.
exported to the MI kernel. Almost everything here was formerly in cpu.h.
Optionally, this module could in the future be used to #include anything
that is always needed by arch/alpha modules.
They should not be visible to the MI kernel and the MI kernel shouldn't
depend on this junk. Most of it moves to new module <machine/alpha.h>.
Leave badaddr() here, though, because it's used so widely.
I just cannot add one more platform without getting sick.
Instead, we do just one table for all platforms. More-or-less,
it was only the A12 that even named it's individual interrupts anyway.
Also, prototype set_iointr() here. It's a slightly odd place, but 10*
better than the old place it was, and this file is included by exactly
the perfect set of .c files for set_iointr() visibility.
- cpu_set_kpc() now takes void *arg third argument, passed to the
entry point.
- cpu_fork() allows parent to be non-curproc iff parent is proc0.
When forking non-curproc, assume its state has already been saved.
- Adjust various pieces of machine-dependent code to account of all of this.
Alpha system, conditional on MULTIPROCESSOR.
NOTE: This does not yet work completely. The secondary CPU begins the
boot process, but never makes it into the cpu spinup trampoline. This
is merely a snapshot of a work-in-progress.
bus_space(9), if drivers want it (they shouldn't; easy to convert) they
can define it right before including bus.h. There's been a release since
the interfaces were (slightly) changed, and no code in the source tree
uses the old interfaces as far as I can tell.
tty structures, and on some machines (namely the DraCo internal lpt, and some
multi-i/o boards for Amigas and DraCos), tying spltty to the pretty high printer
interupt level would hurt serial performance.
On all affected ports but Amiga, spllpt() has been defined in machine/intr.h
to be spltty(), thus preserving old behaviour. Portmasters are encouraged to
change is, if they feel something else is better (e.g., one of its own were
possible).
New macros:
LOCATE_PCS(struct rpb *hwrpb, int cpu_number)
PCS_PROC_MAJORTYPE(struct pcs *)
PCS_PROC_MINORTYPE(struct pcs *)
Define LOCATE_PCS() to map (hwrpb, cpu_number) -> Per-Cpu-Slot structure.
Replace the PCS_PROC_{MAJOR,MINOR}{,SHIFT} stuff with macros that simply
return the major and minor cpu type codes.
address on 2 architectures anyhow. Also, move the definition of the `label_t'
type inside _KERNEL protection, since it is specific to the in-kernel
setjmp()/longjmp() implementations.
as with user-land programs, include files are installed by each directory
in the tree that has includes to install. (This allows more flexibility
as to what gets installed, makes 'partial installs' easier, and gives us
more options as to which machines' includes get installed at any given
time.) The old SYS_INCLUDES={symlinks,copies} behaviours are _both_
still supported, though at least one bug in the 'symlinks' case is
fixed by this change. Include files can't be build before installation,
so directories that have includes as targets (e.g. dev/pci) have to move
those targets into a different Makefile.
is defined, the bus_space macros will check to ensure that the bus address
and the target buffer (if applicable) are aligned properly for the size
of the type being used. If they are not, a message will be displayed on
the console.
Strict alignment is required by the Alpha architecture, and a trap will
occur of unaligned access is performed. These changes will aid debugging
of broken device drivers.
UVM pmap's locking protocol, written by Chuck Cranor. Not all of the
support for multiple processors is here yet, but the kernel does run
under moderate loads with LOCKDEBUG (all locking operations are no-ops
unless LOCKDEBUG is turned on).
This is by no means complete... there are still some possible snares
to take a look at.
member to the DMA tag, and calling the direct-mapped back-ends directly,
rather than through chipset-specific front-ends which pass the window
base as an additional argument.
caller to pass an optional 3rd argument, which is the previous level
PTE corresponding the virtual address. If this argument is non-NULL,
the table walk otherwise necessary will be bypassed.
enough to use as a console on my DEC 3000/400 (connected to a VT-520
terminal).
XXX The MI SCC driver needs serious changes to handle platforms which
have muliple SCC attachments (e.g. the Alpha port, which has an ioasic
attachment for TurboChannel systems and a gbus attachment for TurboLaser
systems).
XXX The MI SCC driver also needs changes to deal with the wacky (to put
it mildly) way the chips are wired up on the ioasic (on both TC Alphas
and DECstations). These are going to come along later.
Major change is that page table page management has been completely
rewritten. Page tables are now accessed via K0SEG (no more KVA space
wasted on user page tables), and a much larger user address space is
supported.
Many thanks to Chris Demetriou and Ross Harvey for helpful insight and
debugging assistance.
- Make pv_table an array of struct pv_head's, which contain LIST_HEADs
for the pv_entry's, as well as page attributes (mod, ref, ptpage).
- Use <sys/queue.h> to manipulate pv_entry lists.
- Fix several obvious bugs in pmap_collect_pv().
- Use K0SEG to access pv_page's.
- Clean up pmap_bootstrap() some, and make a slight change to how the
PROM mappings are saved.
- Give each pmap its own level 1 page table, rather than sharing a global
level 1 page table. This will eventually allow for Very Large user
address spaces.
- Keep a list of all pmaps, so that when kernel level 2 page tables are
allocated, all level 1 tables may be updated.
- Add a couple of functions for allocating and freeing page table pages.
- Add a few comments about ASN allocation.
These changes also recover memory that is located before the kernel in
the first system software segment on systems which do not use the PROM
for console I/O. Written by Chris Demetriou and myself.
knowledge) earlier, and gather all information needed earlier. Mark the
init code carefully re: when it can print stuff out, when it can expect
the firmware to stop working, etc. Be more careful about using the PROM
console and other PROM facilities, and hint that in the future all use
of firmware/boot program callbacks by the kernel should go away (since
the world may not be mapped the way the firmware/boot program wants!).
- Attempt to find the model string in the HWRPB's DSR area. Failing that
(if the HWRPB version is too old)...
- Look up the system variation in a variation/string table. Failing that
(unknown variation)...
- Create a default model string using the variation number.
Also, factor out a bunch of common code.
number passed by the boot block into a register, change the kernel's
bootinfo handing so that it always uses bootinfo to get bootinfo-ish values
(filling them in if the boot blocks didn't pass them), and make versioning
a small bit more sane.
configured into the kernel, or when the platform is not supported.
Use the defopt'ed options, rather than NDEC_... and remove the needs-flag
hack that's existed for a while.
- fix _C_LABEL so that it actually works.
- make __RENAME use _C_LABEL.
- fix __RENAME so that it expects an unquoted argument.
- fix __indr_reference and __warn_references so that they
supply their own final semicolon.
- define __warn_references to nothing if not GNU C (required
by the way it's used).
The __warn_references semicolon change has to be made
so that __warn_references can be defined into nothing.
(A ; all by itself isn't a great idea.) The __indr_reference
change was made for consistency.
--entries / remove kernel entry from locore / reorganize vector entry
--code. Enables access to stack frames transitively w.r.t. palcode
--vectors, e.g. upward traceback works, inverting (possibly several)
--kernel vectors. Until now, all trackbacks ended at the first-reached
--instance of trap(), which was totally useless as there is no mystery
--to trap->panic->cpu_reboot
Only assembly version for i386 bswap16 and bswap32 for now (bswap64 uses
bswap32). Contribution of assembly versions of these are welcome.
Add byte-swapping of ext2fs metadata for big-endian systems.
Tested on i386 and sparc.
with large amounts of memory and not spew. This doesn't really replace
fixing this problem better later, but it works for now. Basically, if memory
is greater than 128MB, start upping the sizes of some maps.
msgbuf. Note that old 'dmesg' and 'syslogd' binaries will continue running,
though old 'dmesg' binaries will output a few bytes of junk at the start of
the buffer, and will miss a few bytes at the end of the buffer.
on EV56 and later processors that have the "amask BWX" bit clear. These
instructions will be used to implement non-swizzle bus access functions
on newer systems, such as the new AlphaStation 500s with EV56 and 21172
PCI chipsets.
See "Alpha Architecture Handbook, Version 3", DEC order number EC-QD2KB-TE.
(II-B) 2-33 of the Alpha AXP Architecture Reference Manual, Second Edition:
* rdps - Read Processor Status, needed by spl* functions.
* cflush - Cache Flush
* rdval - Read System Value
* wripir - Write Interprocessor Interrupt Request
* wrval - Write System Value
cflush, rdval, wripir, and wrval are used in multi-processor environments.
passing them a proc *, which encapsulates all of the information necessary
to activate an address space.
- Garbage-collect pmap->pm_stchanged; it's not really used for anything.
Also, put the cpu_decl()s in cpuconf.h, so that platform support files
can pull in the prototypes from there, and pull in options for those
systems for which there is code in the source tree.