Inline several things from pal.s:
- alpha_rpcc(), alpha_mb(), alpha_wmb() -- these are instructions, and we win by inlining them: rpcc is generally used for profiling, and the memory barriers really should execute as quickly as possible with minimal side-effects (like additional loads/stores required to call the functions!) - alpha_pal_imb(), alpha_pal_rdps(), alpha_pal_swpipl(), alpha_pal_tbi(), alpha_pal_whami() -- these are PALcode ops. We must specify some register clobbers for these. We have a very decent size savings as a result. My test system: text data bss dec hex filename 2671724 235848 377016 3284588 321e6c /netbsd.bak 2617708 235736 377016 3230460 314afc /netbsd Most of this comes from fewer register saves/restores around spl*() calls (now that alpha_pal_rdps() and alpha_pal_swpipl() are inlined). Note that alpha_pal_rdps() and alpha_pal_swpipl() remain in pal.s to maintain binary compatibility with LKMs that may use spl*() functions.
This commit is contained in:
thorpej
parent
871b54b6d2
commit
89ae0bf93c
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@ -1,4 +1,4 @@
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/* $NetBSD: pal.s,v 1.12 1998/02/27 03:44:53 thorpej Exp $ */
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/* $NetBSD: pal.s,v 1.13 1999/11/30 00:42:46 thorpej Exp $ */
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/*
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* Copyright (c) 1994, 1995 Carnegie-Mellon University.
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@ -39,37 +39,9 @@
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* and Richard T. Witek.
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*/
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__KERNEL_RCSID(1, "$NetBSD: pal.s,v 1.12 1998/02/27 03:44:53 thorpej Exp $");
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__KERNEL_RCSID(1, "$NetBSD: pal.s,v 1.13 1999/11/30 00:42:46 thorpej Exp $");
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inc2: .stabs __FILE__,132,0,0,inc2; .loc 1 __LINE__
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/*
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* alpha_rpcc: read process cycle counter (XXX INSTRUCTION, NOT PALcode OP)
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*/
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.text
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LEAF(alpha_rpcc,1)
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rpcc v0
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RET
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END(alpha_rpcc)
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/*
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* alpha_mb: memory barrier (XXX INSTRUCTION, NOT PALcode OP)
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*/
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.text
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LEAF(alpha_mb,0)
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mb
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RET
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END(alpha_mb)
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/*
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* alpha_wmb: write memory barrier (XXX INSTRUCTION, NOT PALcode OP)
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*/
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.text
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LEAF(alpha_wmb,0)
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/* wmb XXX */
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mb /* XXX */
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RET
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END(alpha_wmb)
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/*
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* alpha_amask: read architecture features (XXX INSTRUCTION, NOT PALcode OP)
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*
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@ -101,16 +73,6 @@ LEAF(alpha_implver,0)
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RET
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END(alpha_implver)
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/*
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* alpha_pal_imb: I-Stream memory barrier. [UNPRIVILEGED]
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* (Makes instruction stream coherent with data stream.)
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*/
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.text
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LEAF(alpha_pal_imb,0)
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call_pal PAL_imb
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RET
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END(alpha_pal_imb)
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/*
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* alpha_pal_cflush: Cache flush [PRIVILEGED]
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*
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@ -217,31 +179,6 @@ LEAF_NOPROFILE(_alpha_pal_swpipl,1)
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RET
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END(_alpha_pal_swpipl)
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/*
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* alpha_pal_tbi: Translation buffer invalidate. [PRIVILEGED]
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*
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* Arguments:
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* a0 operation selector
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* a1 address to operate on (if necessary)
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*/
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.text
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LEAF(alpha_pal_tbi,2)
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call_pal PAL_OSF1_tbi
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RET
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END(alpha_pal_tbi)
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/*
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* alpha_pal_whami: Who am I? [PRIVILEGED]
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*
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* Return:
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* v0 processor number
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*/
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.text
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LEAF(alpha_pal_whami,0)
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call_pal PAL_OSF1_whami
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RET
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END(alpha_pal_whami)
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/*
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* alpha_pal_wrent: Write system entry address. [PRIVILEGED]
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*
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@ -1,4 +1,4 @@
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/* $NetBSD: alpha_cpu.h,v 1.31 1999/11/28 19:47:14 thorpej Exp $ */
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/* $NetBSD: alpha_cpu.h,v 1.32 1999/11/30 00:42:47 thorpej Exp $ */
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/*
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* Copyright (c) 1996 Carnegie-Mellon University.
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@ -313,9 +313,21 @@ const char *alpha_dsr_sysname __P((void));
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*/
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unsigned long alpha_amask __P((unsigned long));
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unsigned long alpha_implver __P((void));
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unsigned long alpha_rpcc __P((void));
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void alpha_mb __P((void));
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void alpha_wmb __P((void));
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static __inline unsigned long alpha_rpcc __P((void))
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__attribute__((__unused__));
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static __inline unsigned long
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alpha_rpcc()
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{
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unsigned long v0;
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__asm __volatile("rpcc %0" : "=r" (v0));
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return (v0);
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}
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#define alpha_mb() __asm __volatile("mb")
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#define alpha_wmb() __asm __volatile("mb") /* XXX */
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u_int8_t alpha_ldbu __P((volatile u_int8_t *));
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u_int16_t alpha_ldwu __P((volatile u_int16_t *));
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@ -338,19 +350,14 @@ void alpha_atomic_sub_q __P((unsigned long *, unsigned long));
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/*
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* Stubs for OSF/1 PALcode operations.
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*/
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void alpha_pal_imb __P((void));
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void alpha_pal_cflush __P((unsigned long));
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void alpha_pal_draina __P((void));
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void alpha_pal_halt __P((void)) __attribute__((__noreturn__));
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unsigned long alpha_pal_rdmces __P((void));
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unsigned long alpha_pal_rdps __P((void));
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unsigned long alpha_pal_rdusp __P((void));
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unsigned long alpha_pal_rdval __P((void));
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unsigned long alpha_pal_swpctx __P((unsigned long));
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unsigned long alpha_pal_swpipl __P((unsigned long));
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unsigned long _alpha_pal_swpipl __P((unsigned long)); /* for profiling */
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void alpha_pal_tbi __P((unsigned long, vaddr_t));
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unsigned long alpha_pal_whami __P((void));
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void alpha_pal_wrent __P((void *, unsigned long));
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void alpha_pal_wrfen __P((unsigned long));
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void alpha_pal_wripir __P((unsigned long));
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@ -359,4 +366,74 @@ void alpha_pal_wrvptptr __P((unsigned long));
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void alpha_pal_wrmces __P((unsigned long));
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void alpha_pal_wrval __P((unsigned long));
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static __inline unsigned long alpha_pal_rdps __P((void))
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__attribute__((__unused__));
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static __inline unsigned long alpha_pal_swpipl __P((unsigned long))
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__attribute__((__unused__));
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static __inline void alpha_pal_tbi __P((unsigned long, vaddr_t))
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__attribute__((__unused__));
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static __inline unsigned long alpha_pal_whami __P((void))
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__attribute__((__unused__));
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#define alpha_pal_imb() __asm __volatile("call_pal 0x0086")
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static __inline unsigned long
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alpha_pal_rdps()
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{
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register unsigned long v0 __asm("$0");
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__asm __volatile("call_pal 0x0036" /* PAL_OSF1_rdps */
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: "=r" (v0)
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:
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/* clobbers t0, t8..t11 */
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: "$1", "$22", "$23", "$24", "$25");
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return (v0);
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}
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static __inline unsigned long
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alpha_pal_swpipl(ipl)
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unsigned long ipl;
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{
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register unsigned long a0 __asm("$16") = ipl;
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register unsigned long v0 __asm("$0");
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__asm __volatile("call_pal 0x0035" /* PAL_OSF1_swpipl */
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: "=r" (v0)
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: "r" (a0)
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/* clobbers t0, t8..t11, a0 */
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: "$1", "$22", "$23", "$24", "$25", "$16");
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return (v0);
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}
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static __inline void
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alpha_pal_tbi(op, va)
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unsigned long op;
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vaddr_t va;
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{
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register unsigned long a0 __asm("$16") = op;
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register unsigned long a1 __asm("$17") = va;
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__asm __volatile("call_pal 0x0033" /* PAL_OSF1_tbi */
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:
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: "r" (a0), "r" (a1)
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/* clobbers t0, t8..t11, a0, a1 */
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: "$1", "$22", "$23", "$24", "$25", "$16", "$17");
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}
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static __inline unsigned long
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alpha_pal_whami()
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{
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register unsigned long v0 __asm("$0");
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__asm __volatile("call_pal 0x003c" /* PAL_OSF1_whami */
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: "=r" (v0)
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:
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/* clobbers t0, t8..t11 */
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: "$1", "$22", "$23", "$24", "$25");
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return (v0);
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}
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#endif /* __ALPHA_ALPHA_CPU_H__ */
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