- remove patch_kernel() since it isn't necessary and has been patching
the wrong thing in general.
- implement USIII versions of blast_icache(), dcache_flush_page() and
cache_flush_phys(). use the newly recorded cache size/line sizes.
- in winfixsave, flush the D$ with the right size index and ops. this
kills one of the wrong tag->inval patches.
- for blast_dcache(), use the newly recorded dcache_size/line_size.
- for blast_icache(), use the newly recorded cache size/line sizes.
for the USIII verison, disable the I$ while writing to ASI_ICACHE_TAG.
these changes removed several hard coded cache sizes values, some very
wrong kernel patching, and seem to make the current failure modes for
USIII less common, but not gone.
same issue. Also add a BUS_DMASYNC_POSTWRITE to the POLL operation.
Problem pointed out by tsutsui@.
Still not perfect (a BUS_DMASYNC_PREREAD would be needed after the
testing the condition in the POLL() macro), but closer.
User's manual rev 1.3.
The values of ULCON_PARITY_SHIFT and ULCON_IR are now same to those
for S3C2410. So the definitions are moved to s3c2xx0reg.h. (Old
definitions from User's manual rev1.1 were differ to those for
S3C2410, and that was why I put them in s3c2800reg.h and s3c24x0reg.h.
There's no description in errata about this changes.)
Also, fix the value for UMSTAT_DCTS on 2800.
The values of UMCON_AFC and UMSTAT_DCTS still differ between 2800 and
2410.
Reported by Brett Slager. Thank you very much.
DTrace adds a pointer to the lwp and proc structures which it uses to
manage its state. These are opaque from the kernel perspective to keep
the kernel free of CDDL code. The state arenas are kmem_alloced and freed
as proccesses and threads are created and destoyed.
Also add a check for trap06 (privileged/illegal instruction) so that
DTrace can check for D scripts that may have triggered the trap so it
can clean up after them and resume normal operation.
Ok with core@.
