Where CACHED_TO_HYS() is still needed for kernel-virtual-to-physical
or physical-to-uncached mapping (fb drivers), replace with
`#include <mips/cpuregs.h>'.
* dcparam() with normal tty t_param interface, which calls
* cold_dcparam() called with explicit dc7085 register address
and flags, which does the work and is also callable when cold,
to set up console (or kgdb) line parameters.
* use mips_round_page,mips_trunc_seg() instead of
pica_round_page(),pica_trunc_page().
* discard (unused) return value from TLBUpdate(), and delete
(unused) temporary variable used to hold it.
* Move mips-I pte (TLBlo) definitions from pmax/include/pte.h
to mips/include/mips1_pte.h
* Move mips-III pte (TLBlo) definitions from pica/include/pte.h
to mips/include/mips3_pte.h
* Add new mips/include/pte.h, which includes exactly one of
mips1_pte.h or mips3_pte.h (which still have namespace collisions),
depending on "options MIPS1" or "options MIPS3". (hack).
Move soft kvtopte(), ptetovk() definitions to mips/include/pte.h
* Add macro PTE_TO_PADDR() to hide the different hardware TLB formats
when mapping from pte to physical address.
* Add macro PTE_READONLY() to hide lack of SW read-only bit in mips-III
tlb. (mips1 pmap uses a sw bit in the PTE, mips3 looks up RO bit in
the kernel pmap.)
* Use macros (not direct TLB frobbing) in mips/trap.c, to make it
mips-1/mips-III indepenndet.
* Change {pmax,pica}/include/pte.h to just do #include <mips/pte.h>.
jump-table) locore entrypoints, so the stack traceback code can use
the end marker to handle entry points specially when doing tracebacks,
even if it doesn't know about them explicitly.
* fold in netBSD style changes:
``if (foo = bar)'' -> ``if ((foo = bar) != 0)''
* add mips1 vector as well as mips3 vector
* change vector names to make mips1 and mips3 locore entrpoints distinct
* add pmax additions (e.g., old fixes to ktrace code, kernel-TLB_miss
instrumentation)
* update stack traceback code to a newer version of the pmax code.
add catch-all case, with distinct mips1 and mips3 ranges for locore
entry points, cases to catch othewise-unknown locore entrypoints and
vector code (which have special entry sequences and require special
support to trace through). The relevant mips1 and mips3 functions are
of course now distinct.
NetBSD-current changes:
* change include paths to be relative to the kernel-source tree
(e.g., `/sys') instead of arch/pmax/conf.
* add explicit options for exec packages (EXEC_ELF32, EXEC_ECOFF
for COMPAT_ULTRIX)
* comment out references to still-unsuppoted MI scsi.
DEC dc503 cursor chip) into Decstation 2100,3100 cfattach front-end
and ``machine-independent'' back-end.
pm_ds.c: pmin/pmax cfattach front-end
pm.c: bt478, 503 back-end
pmvar.h: declarations of back-end normal and console attach
entry points.
- change uiomove() argument from caddr_t to void *; this was the last caddr_t
in systm.h.
- remove parameter names from the b*() routines to make them look like the
mem*() counterparts.
screen geometry.
- Re-arrange et_loadmode() and et_inittextmode() to write into shadow
register set instead of writing to the card-registers directly.
- provide et_hwsave()/et_hwrest() functions to transfer the card-registers
to and from the shadow set.
ELF_ROUND (round to higher alignment boundary), and use them properly.
Also, change a bit of code in elf_load_psection to use the next ELF_ROUND
macro. This fixes a bug found by Robert Baron <rvb+@cs.cmu.edu> where
elf_load_psection, if given a properly aligned address at which to load
the section, would round actually load it at the next highest alignment
boundary.
Scenario: If ip_insertoptions() prepends a new mbuf to the chain, the
bad: label's m_freem(m0) still would free only the original mbuf chain
if the transmission failed for, e.g., no route to host; resulting in
one lost mbuf per failed packet. (The original posting included a
demonstration program).
Original report of this bug was by jinmei@isl.rdc.toshiba.co.jp
(JINMEI Tatuya) on comp.bugs.4bsd.
christos