Set mips_sdcache_forceinv to 1 for r5k processors.

We now support secondary cache operation on r5ksc out-of-the-box.
This commit is contained in:
sekiya 2005-03-01 04:25:00 +00:00
parent 02889050a3
commit 8f1c003137

View File

@ -1,4 +1,4 @@
/* $NetBSD: machdep.c,v 1.89 2004/12/17 22:59:49 sekiya Exp $ */
/* $NetBSD: machdep.c,v 1.90 2005/03/01 04:25:00 sekiya Exp $ */
/*
* Copyright (c) 2000 Soren S. Jorvang
@ -34,7 +34,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.89 2004/12/17 22:59:49 sekiya Exp $");
__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.90 2005/03/01 04:25:00 sekiya Exp $");
#include "opt_ddb.h"
#include "opt_kgdb.h"
@ -865,15 +865,9 @@ void mips_machdep_cache_config(void)
#if defined(MIPS3)
case MIPS_R5000:
case MIPS_RM5200:
#ifdef notyet
r5k_enable_sdcache();
#else
mips3_cp0_config_write( (mips3_cp0_config_read())
& ~MIPS3_CONFIG_SE);
mips_sdcache_size = 0;
mips_sdcache_line_size = 0;
#endif
mips_sdcache_forceinv = 1;
break;
#endif
}
}