From 8f1c00313742716d429bf0acdf2719d929235490 Mon Sep 17 00:00:00 2001 From: sekiya <sekiya@NetBSD.org> Date: Tue, 1 Mar 2005 04:25:00 +0000 Subject: [PATCH] Set mips_sdcache_forceinv to 1 for r5k processors. We now support secondary cache operation on r5ksc out-of-the-box. --- sys/arch/sgimips/sgimips/machdep.c | 14 ++++---------- 1 file changed, 4 insertions(+), 10 deletions(-) diff --git a/sys/arch/sgimips/sgimips/machdep.c b/sys/arch/sgimips/sgimips/machdep.c index 2cdb24985269..7259d1cf72be 100644 --- a/sys/arch/sgimips/sgimips/machdep.c +++ b/sys/arch/sgimips/sgimips/machdep.c @@ -1,4 +1,4 @@ -/* $NetBSD: machdep.c,v 1.89 2004/12/17 22:59:49 sekiya Exp $ */ +/* $NetBSD: machdep.c,v 1.90 2005/03/01 04:25:00 sekiya Exp $ */ /* * Copyright (c) 2000 Soren S. Jorvang @@ -34,7 +34,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.89 2004/12/17 22:59:49 sekiya Exp $"); +__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.90 2005/03/01 04:25:00 sekiya Exp $"); #include "opt_ddb.h" #include "opt_kgdb.h" @@ -865,15 +865,9 @@ void mips_machdep_cache_config(void) #if defined(MIPS3) case MIPS_R5000: case MIPS_RM5200: -#ifdef notyet - r5k_enable_sdcache(); -#else - mips3_cp0_config_write( (mips3_cp0_config_read()) - & ~MIPS3_CONFIG_SE); - mips_sdcache_size = 0; - mips_sdcache_line_size = 0; -#endif + mips_sdcache_forceinv = 1; break; + #endif } }