NetBSD/sys/dev/isa/isa.c

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/*-
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* Copyright (c) 1993, 1994 Charles Hannum.
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* Copyright (c) 1991 The Regents of the University of California.
* All rights reserved.
*
* This code is derived from software contributed to Berkeley by
* William Jolitz.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: @(#)isa.c 7.2 (Berkeley) 5/13/91
1994-04-04 02:50:14 +04:00
* $Id: isa.c,v 1.48 1994/04/03 22:51:48 mycroft Exp $
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*/
/*
* code to manage AT bus
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*
* 92/08/18 Frank P. MacLachlan (fpm@crash.cts.com):
* Fixed uninitialized variable problem and added code to deal
* with DMA page boundaries in isa_dmarangecheck(). Fixed word
* mode DMA count compution and reorganized DMA setup code in
* isa_dmastart()
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*/
#include <sys/param.h>
#include <sys/systm.h>
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#include <sys/kernel.h>
#include <sys/conf.h>
#include <sys/file.h>
#include <sys/buf.h>
#include <sys/uio.h>
#include <sys/syslog.h>
#include <sys/malloc.h>
#include <sys/device.h>
#include <vm/vm.h>
#include <machine/pio.h>
#include <machine/cpufunc.h>
#include <i386/isa/isa.h>
#include <i386/isa/isa_device.h>
#include <i386/isa/isavar.h>
#include <i386/isa/icu.h>
#include <i386/isa/ic/i8237.h>
#include <i386/isa/ic/i8042.h>
#include <i386/isa/timerreg.h>
#include <i386/isa/spkr_reg.h>
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/* sorry, has to be here, no place else really suitable */
#include <machine/pc/display.h>
u_short *Crtat = (u_short *)MONO_BUF;
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/*
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* Register definitions for DMA controller 1 (channels 0..3):
*/
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#define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */
#define DMA1_SR (IO_DMA1 + 1*8) /* status register */
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#define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */
#define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */
#define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */
/*
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* Register definitions for DMA controller 2 (channels 4..7):
*/
#define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */
#define DMA2_SR (IO_DMA2 + 2*8) /* status register */
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#define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */
#define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */
#define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */
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static void sysbeepstop(int);
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/*
* Configure all ISA devices
*
* XXX This code is a hack. It wants to be new config, but can't be until the
* interrupt system is redone. For now, we do some gross hacks to make it look
* 99% like new config.
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*/
static char *msgs[3] = { "", " not configured\n", " unsupported\n" };
struct cfdata *
config_search(fn, parent, aux)
cfmatch_t fn;
struct device *parent;
void *aux;
{
struct cfdata *cf = 0;
struct device *dv = 0;
size_t devsize;
struct cfdriver *cd;
struct isa_device *id,
*idp = parent ? (void *)parent->dv_cfdata->cf_loc : 0;
for (id = isa_devtab; id->id_driver; id++) {
if (id->id_state == FSTATE_FOUND)
continue;
if (id->id_parent != idp)
continue;
cd = id->id_driver;
if (id->id_unit < cd->cd_ndevs) {
if (cd->cd_devs[id->id_unit] != 0)
continue;
} else {
int old = cd->cd_ndevs, new;
void **nsp;
if (old == 0) {
nsp = malloc(MINALLOCSIZE, M_DEVBUF, M_NOWAIT);
if (!nsp)
panic("config_search: creating dev array");
bzero(nsp, MINALLOCSIZE);
cd->cd_ndevs = MINALLOCSIZE / sizeof(void *);
} else {
new = old;
do {
new *= 2;
} while (new <= id->id_unit);
cd->cd_ndevs = new;
nsp = malloc(new * sizeof(void *), M_DEVBUF,
M_NOWAIT);
if (!nsp)
panic("config_search: expanding dev array");
bzero(nsp, new * sizeof(void *));
bcopy(cd->cd_devs, nsp, old * sizeof(void *));
free(cd->cd_devs, M_DEVBUF);
}
cd->cd_devs = nsp;
}
if (!cf) {
cf = malloc(sizeof(struct cfdata), M_DEVBUF, M_NOWAIT); if (!cf)
panic("config_search: creating cfdata");
}
cf->cf_driver = cd;
cf->cf_unit = id->id_unit;
cf->cf_fstate = 0;
cf->cf_loc = (void *)id;
cf->cf_flags = id->id_flags;
cf->cf_parents = 0;
cf->cf_ivstubs = 0;
if (dv && devsize != cd->cd_devsize) {
free(dv, M_DEVBUF);
dv = 0;
}
if (!dv) {
devsize = cd->cd_devsize;
dv = malloc(devsize, M_DEVBUF, M_NOWAIT);
if (!dv)
panic("config_search: creating softc");
}
bzero(dv, cd->cd_devsize);
dv->dv_class = cd->cd_class;
dv->dv_cfdata = cf;
dv->dv_unit = id->id_unit;
sprintf(dv->dv_xname, "%s%d", cd->cd_name, id->id_unit);
dv->dv_parent = parent;
cd->cd_devs[id->id_unit] = dv;
if (fn) {
if ((*fn)(parent, dv, aux))
return cf;
} else {
if ((*cd->cd_match)(parent, dv, aux))
return cf;
}
cd->cd_devs[id->id_unit] = 0;
}
if (cf)
free(cf, M_DEVBUF);
if (dv)
free(dv, M_DEVBUF);
return 0;
}
void
config_attach(parent, cf, aux, print)
struct device *parent;
struct cfdata *cf;
void *aux;
cfprint_t print;
{
struct isa_device *id = (void *)cf->cf_loc;
struct cfdriver *cd = cf->cf_driver;
struct device *dv = cd->cd_devs[id->id_unit];
cf->cf_fstate = id->id_state = FSTATE_FOUND;
printf("%s at %s", dv->dv_xname, parent ? parent->dv_xname : "isa0");
if (print)
(void) (*print)(aux, (char *)0);
(*cd->cd_attach)(parent, dv, aux);
}
int
config_found(parent, aux, print)
struct device *parent;
void *aux;
cfprint_t print;
{
struct cfdata *cf;
if ((cf = config_search((cfmatch_t)NULL, parent, aux)) != NULL) {
config_attach(parent, cf, aux, print);
return 1;
}
if (print)
printf(msgs[(*print)(aux, parent->dv_xname)]);
return 0;
}
int
isaprint(aux, isa)
void *aux;
char *isa;
{
struct isa_attach_args *ia = aux;
if (ia->ia_iosize)
printf(" port 0x%x", ia->ia_iobase);
if (ia->ia_iosize > 1)
printf("-0x%x", ia->ia_iobase + ia->ia_iosize - 1);
if (ia->ia_msize)
printf(" iomem 0x%x", ia->ia_maddr - atdevbase + 0xa0000);
if (ia->ia_msize > 1)
printf("-0x%x",
ia->ia_maddr - atdevbase + 0xa0000 + ia->ia_msize - 1);
if (ia->ia_irq)
printf(" irq %d", ffs(ia->ia_irq) - 1);
if (ia->ia_drq != (u_short)-1)
printf(" drq %d", ia->ia_drq);
/* XXXX print flags */
return QUIET;
}
int
isasubmatch(parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct isa_device *id = (void *)self->dv_cfdata->cf_loc;
struct isa_attach_args ia;
ia.ia_iobase = id->id_iobase;
ia.ia_iosize = 0x666;
ia.ia_irq = id->id_irq;
ia.ia_drq = id->id_drq;
ia.ia_maddr = id->id_maddr - 0xa0000 + atdevbase;
ia.ia_msize = id->id_msize;
if (!(*id->id_driver->cd_match)(parent, self, &ia)) {
/*
* If we don't do this, isa_configure() will repeatedly try to
* probe devices that weren't found. But we need to be careful
* to do it only for the ISA bus, or we would cause things like
* `com0 at ast? slave ?' to not probe on the second ast.
*/
if (!parent)
id->id_state = FSTATE_FOUND;
return 0;
}
config_attach(parent, self->dv_cfdata, &ia, isaprint);
if (id->id_irq) {
int intrno;
intrno = ffs(id->id_irq) - 1;
setidt(ICU_OFFSET+intrno, id->id_intr, SDT_SYS386IGT, SEL_KPL);
if (id->id_mask)
INTRMASK(*id->id_mask, id->id_irq);
INTREN(id->id_irq);
}
return 1;
}
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void
isa_configure()
{
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splhigh();
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INTREN(IRQ_SLAVE);
enable_intr();
while (config_search(isasubmatch, NULL, NULL));
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printf("biomask %x ttymask %x netmask %x\n",
biomask, ttymask, netmask);
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clockmask |= astmask;
biomask |= astmask;
ttymask |= astmask;
netmask |= astmask;
impmask = netmask | ttymask;
spl0();
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}
#define IDTVEC(name) __CONCAT(X,name)
/* default interrupt vector table entries */
extern IDTVEC(intr0), IDTVEC(intr1), IDTVEC(intr2), IDTVEC(intr3),
IDTVEC(intr4), IDTVEC(intr5), IDTVEC(intr6), IDTVEC(intr7),
IDTVEC(intr8), IDTVEC(intr9), IDTVEC(intr10), IDTVEC(intr11),
IDTVEC(intr12), IDTVEC(intr13), IDTVEC(intr14), IDTVEC(intr15);
static *defvec[16] = {
&IDTVEC(intr0), &IDTVEC(intr1), &IDTVEC(intr2), &IDTVEC(intr3),
&IDTVEC(intr4), &IDTVEC(intr5), &IDTVEC(intr6), &IDTVEC(intr7),
&IDTVEC(intr8), &IDTVEC(intr9), &IDTVEC(intr10), &IDTVEC(intr11),
&IDTVEC(intr12), &IDTVEC(intr13), &IDTVEC(intr14), &IDTVEC(intr15) };
/* out of range default interrupt vector gate entry */
extern IDTVEC(intrdefault);
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/*
* Fill in default interrupt table (in case of spuruious interrupt
* during configuration of kernel, setup interrupt control unit
*/
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void
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isa_defaultirq() {
int i;
/* icu vectors */
for (i = NRSVIDT ; i < NRSVIDT+ICU_LEN ; i++)
setidt(i, defvec[i], SDT_SYS386IGT, SEL_KPL);
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/* out of range vectors */
for (i = NRSVIDT; i < NIDT; i++)
setidt(i, &IDTVEC(intrdefault), SDT_SYS386IGT, SEL_KPL);
/* initialize 8259's */
outb(IO_ICU1, 0x11); /* reset; program device, four bytes */
outb(IO_ICU1+1, NRSVIDT); /* starting at this vector index */
outb(IO_ICU1+1, 1<<2); /* slave on line 2 */
#ifdef AUTO_EOI_1
outb(IO_ICU1+1, 2 | 1); /* auto EOI, 8086 mode */
#else
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outb(IO_ICU1+1, 1); /* 8086 mode */
#endif
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outb(IO_ICU1+1, 0xff); /* leave interrupts masked */
outb(IO_ICU1, 0x0a); /* default to IRR on read */
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#ifdef REORDER_IRQ
outb(IO_ICU1, 0xc0 | (3 - 1)); /* pri order 3-7, 0-2 (com2 first) */
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#endif
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outb(IO_ICU2, 0x11); /* reset; program device, four bytes */
outb(IO_ICU2+1, NRSVIDT+8); /* staring at this vector index */
outb(IO_ICU2+1,2); /* my slave id is 2 */
#ifdef AUTO_EOI_2
outb(IO_ICU2+1, 2 | 1); /* auto EOI, 8086 mode */
#else
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outb(IO_ICU2+1,1); /* 8086 mode */
#endif
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outb(IO_ICU2+1, 0xff); /* leave interrupts masked */
outb(IO_ICU2, 0x0a); /* default to IRR on read */
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}
/* region of physical memory known to be contiguous */
vm_offset_t isaphysmem;
static caddr_t dma_bounce[8]; /* XXX */
static char bounced[8]; /* XXX */
#define MAXDMASZ 512 /* XXX */
/* high byte of address is stored in this port for i-th dma channel */
static short dmapageport[8] =
{ 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a };
/*
* isa_dmacascade(): program 8237 DMA controller channel to accept
* external dma control by a board.
*/
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void
isa_dmacascade(chan)
int chan;
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{
#ifdef DIAGNOSTIC
if (chan < 0 || chan > 7)
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panic("isa_dmacascade: impossible request");
#endif
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/* set dma channel mode, and set dma channel mode */
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if ((chan & 4) == 0) {
outb(DMA1_MODE, DMA37MD_CASCADE | chan);
outb(DMA1_SMSK, chan);
} else {
outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3));
outb(DMA2_SMSK, chan & 3);
}
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}
/*
* isa_dmastart(): program 8237 DMA controller channel, avoid page alignment
* problems by using a bounce buffer.
*/
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void
isa_dmastart(flags, addr, nbytes, chan)
int flags;
caddr_t addr;
vm_size_t nbytes;
int chan;
{
vm_offset_t phys;
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int waport;
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caddr_t newaddr;
#ifdef DIAGNOSTIC
if (chan < 0 || chan > 7 ||
((chan & 4) ? (nbytes >= (1<<17) || nbytes & 1 || (u_int)addr & 1) :
(nbytes >= (1<<16))))
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panic("isa_dmastart: impossible request");
#endif
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if (isa_dmarangecheck(addr, nbytes, chan)) {
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if (dma_bounce[chan] == 0)
dma_bounce[chan] =
/*(caddr_t)malloc(MAXDMASZ, M_TEMP, M_WAITOK);*/
(caddr_t) isaphysmem + NBPG*chan;
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bounced[chan] = 1;
newaddr = dma_bounce[chan];
*(int *) newaddr = 0; /* XXX */
/* copy bounce buffer on write */
if ((flags & B_READ) == 0)
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bcopy(addr, newaddr, nbytes);
addr = newaddr;
}
/* translate to physical */
phys = pmap_extract(pmap_kernel(), (vm_offset_t)addr);
if ((chan & 4) == 0) {
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/*
* Program one of DMA channels 0..3. These are
* byte mode channels.
*/
/* set dma channel mode, and reset address ff */
if (flags & B_READ)
outb(DMA1_MODE, chan | DMA37MD_SINGLE | DMA37MD_WRITE);
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else
outb(DMA1_MODE, chan | DMA37MD_SINGLE | DMA37MD_READ);
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outb(DMA1_FFC, 0);
/* send start address */
waport = DMA1_CHN(chan);
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outb(waport, phys);
outb(waport, phys>>8);
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outb(dmapageport[chan], phys>>16);
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/* send count */
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outb(waport + 1, --nbytes);
outb(waport + 1, nbytes>>8);
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/* unmask channel */
outb(DMA1_SMSK, chan | DMA37SM_CLEAR);
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} else {
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/*
* Program one of DMA channels 4..7. These are
* word mode channels.
*/
/* set dma channel mode, and reset address ff */
if (flags & B_READ)
outb(DMA2_MODE, (chan & 3) | DMA37MD_SINGLE | DMA37MD_WRITE);
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else
outb(DMA2_MODE, (chan & 3) | DMA37MD_SINGLE | DMA37MD_READ);
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outb(DMA2_FFC, 0);
/* send start address */
waport = DMA2_CHN(chan & 3);
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outb(waport, phys>>1);
outb(waport, phys>>9);
outb(dmapageport[chan], phys>>16);
/* send count */
nbytes >>= 1;
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outb(waport + 2, --nbytes);
outb(waport + 2, nbytes>>8);
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/* unmask channel */
outb(DMA2_SMSK, (chan & 3) | DMA37SM_CLEAR);
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}
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}
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void
isa_dmaabort(chan)
int chan;
{
#ifdef DIAGNOSTIC
if (chan < 0 || chan > 7)
panic("isa_dmadone: impossible request");
#endif
bounced[chan] = 0;
/* mask channel */
if ((chan & 4) == 0)
outb(DMA1_SMSK, DMA37SM_SET | chan);
else
outb(DMA2_SMSK, DMA37SM_SET | (chan & 3));
}
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void
isa_dmadone(flags, addr, nbytes, chan)
int flags;
caddr_t addr;
vm_size_t nbytes;
int chan;
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{
u_char tc;
#ifdef DIAGNOSTIC
if (chan < 0 || chan > 7)
panic("isa_dmadone: impossible request");
#endif
/* check that the terminal count was reached */
if ((chan & 4) == 0)
tc = inb(DMA1_SR) & (1 << chan);
else
tc = inb(DMA2_SR) & (1 << (chan & 3));
if (tc == 0)
/* XXX probably should panic or something */
log(LOG_ERR, "dma channel %d not finished\n", chan);
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/* copy bounce buffer on read */
if (bounced[chan]) {
bcopy(dma_bounce[chan], addr, nbytes);
bounced[chan] = 0;
}
/* mask channel */
if ((chan & 4) == 0)
outb(DMA1_SMSK, DMA37SM_SET | chan);
else
outb(DMA2_SMSK, DMA37SM_SET | (chan & 3));
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}
/*
* Check for problems with the address range of a DMA transfer
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* (non-contiguous physical pages, outside of bus address space,
* crossing DMA page boundaries).
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* Return true if special handling needed.
*/
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int
isa_dmarangecheck(va, length, chan)
vm_offset_t va;
u_long length;
int chan;
{
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vm_offset_t phys, priorpage = 0, endva;
u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1);
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endva = round_page(va + length);
for (; va < endva ; va += NBPG) {
phys = trunc_page(pmap_extract(pmap_kernel(), va));
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if (phys == 0)
panic("isa_dmacheck: no physical page present");
if (phys >= (1<<24))
return 1;
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if (priorpage) {
if (priorpage + NBPG != phys)
return 1;
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/* check if crossing a DMA page boundary */
if ((priorpage ^ phys) & dma_pgmsk)
return 1;
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}
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priorpage = phys;
}
return 0;
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}
/* head of queue waiting for physmem to become available */
struct buf isa_physmemq;
/* blocked waiting for resource to become free for exclusive use */
static isaphysmemflag;
/* if waited for and call requested when free (B_CALL) */
static void (*isaphysmemunblock)(); /* needs to be a list */
/*
* Allocate contiguous physical memory for transfer, returning
* a *virtual* address to region. May block waiting for resource.
* (assumed to be called at splbio())
*/
caddr_t
isa_allocphysmem(caddr_t va, unsigned length, void (*func)()) {
isaphysmemunblock = func;
while (isaphysmemflag & B_BUSY) {
isaphysmemflag |= B_WANTED;
sleep((caddr_t)&isaphysmemflag, PRIBIO);
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}
isaphysmemflag |= B_BUSY;
return((caddr_t)isaphysmem);
}
/*
* Free contiguous physical memory used for transfer.
* (assumed to be called at splbio())
*/
void
isa_freephysmem(caddr_t va, unsigned length) {
isaphysmemflag &= ~B_BUSY;
if (isaphysmemflag & B_WANTED) {
isaphysmemflag &= B_WANTED;
wakeup((caddr_t)&isaphysmemflag);
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if (isaphysmemunblock)
(*isaphysmemunblock)();
}
}
/*
* Handle a NMI, possibly a machine check.
* return true to panic system, false to ignore.
*/
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int
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isa_nmi(cd) {
log(LOG_CRIT, "\nNMI port 61 %x, port 70 %x\n", inb(0x61), inb(0x70));
return(0);
}
/*
* Caught a stray interrupt, notify
*/
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void
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isa_strayintr(d) {
/* DON'T BOTHER FOR NOW! */
/* for some reason, we get bursts of intr #7, even if not enabled! */
/*
* Well the reason you got bursts of intr #7 is because someone
* raised an interrupt line and dropped it before the 8259 could
* prioritize it. This is documented in the intel data book. This
* means you have BAD hardware! I have changed this so that only
* the first 5 get logged, then it quits logging them, and puts
* out a special message. rgrimes 3/25/1993
*/
extern u_long intrcnt_stray;
intrcnt_stray++;
if (intrcnt_stray <= 5)
log(LOG_ERR,"ISA strayintr %x\n", d);
if (intrcnt_stray == 5)
log(LOG_CRIT,"Too many ISA strayintr not logging any more\n");
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}
static beeping;
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static void
sysbeepstop(int f)
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{
int s = splhigh();
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/* disable counter 2 */
disable_intr();
outb(PITAUX_PORT, inb(PITAUX_PORT) & ~PIT_SPKR);
enable_intr();
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if (f)
timeout((timeout_t)sysbeepstop, (caddr_t)0, f);
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else
beeping = 0;
splx(s);
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}
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void
sysbeep(int pitch, int period)
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{
int s = splhigh();
static int last_pitch, last_period;
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if (beeping) {
untimeout((timeout_t)sysbeepstop, (caddr_t)(last_period/2));
untimeout((timeout_t)sysbeepstop, (caddr_t)0);
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}
if (!beeping || last_pitch != pitch) {
/*
* XXX - move timer stuff to clock.c.
*/
disable_intr();
outb(TIMER_MODE, TIMER_SEL2|TIMER_16BIT|TIMER_SQWAVE);
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outb(TIMER_CNTR2, TIMER_DIV(pitch)%256);
outb(TIMER_CNTR2, TIMER_DIV(pitch)/256);
outb(PITAUX_PORT, inb(PITAUX_PORT) | PIT_SPKR); /* enable counter 2 */
enable_intr();
}
last_pitch = pitch;
beeping = last_period = period;
timeout((timeout_t)sysbeepstop, (caddr_t)(period/2), period);
splx(s);
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}
/*
* Return nonzero if a (masked) irq is pending for a given device.
*/
int
isa_irq_pending(dvp)
struct isa_device *dvp;
{
unsigned id_irq;
id_irq = (unsigned short) dvp->id_irq; /* XXX silly type in struct */
if (id_irq & 0xff)
return (inb(IO_ICU1) & id_irq);
return (inb(IO_ICU2) & (id_irq >> 8));
}