1993-03-21 12:45:37 +03:00
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/*-
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1994-03-06 20:37:56 +03:00
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* Copyright (c) 1993, 1994 Charles Hannum.
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1993-03-21 12:45:37 +03:00
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* Copyright (c) 1991 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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1993-05-22 11:56:12 +04:00
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* from: @(#)isa.c 7.2 (Berkeley) 5/13/91
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1994-03-31 20:59:04 +04:00
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* $Id: isa.c,v 1.47 1994/03/31 16:59:04 mycroft Exp $
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1993-03-21 12:45:37 +03:00
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*/
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/*
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* code to manage AT bus
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1993-03-21 21:04:42 +03:00
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*
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* 92/08/18 Frank P. MacLachlan (fpm@crash.cts.com):
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* Fixed uninitialized variable problem and added code to deal
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* with DMA page boundaries in isa_dmarangecheck(). Fixed word
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* mode DMA count compution and reorganized DMA setup code in
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* isa_dmastart()
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1993-03-21 12:45:37 +03:00
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*/
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1993-12-20 12:05:17 +03:00
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#include <sys/param.h>
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#include <sys/systm.h>
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1994-03-06 20:37:56 +03:00
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#include <sys/kernel.h>
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1993-12-20 12:05:17 +03:00
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#include <sys/conf.h>
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#include <sys/file.h>
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#include <sys/buf.h>
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#include <sys/uio.h>
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#include <sys/syslog.h>
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#include <sys/malloc.h>
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1994-03-29 08:34:18 +04:00
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#include <sys/device.h>
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1993-12-20 12:05:17 +03:00
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#include <vm/vm.h>
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1994-03-09 10:58:39 +03:00
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#include <machine/segments.h>
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1993-12-20 12:05:17 +03:00
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#include <machine/pio.h>
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1993-12-20 12:11:38 +03:00
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#include <machine/cpufunc.h>
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1993-12-20 12:05:17 +03:00
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#include <i386/isa/isa.h>
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1994-03-29 08:34:18 +04:00
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#include <i386/isa/isa_device.h>
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#include <i386/isa/isavar.h>
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1993-12-20 12:05:17 +03:00
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#include <i386/isa/icu.h>
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#include <i386/isa/ic/i8237.h>
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#include <i386/isa/ic/i8042.h>
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#include <i386/isa/timerreg.h>
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#include <i386/isa/spkr_reg.h>
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1993-03-21 12:45:37 +03:00
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1993-05-28 13:10:52 +04:00
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/* sorry, has to be here, no place else really suitable */
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1993-12-20 12:05:17 +03:00
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#include <machine/pc/display.h>
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1993-05-28 13:10:52 +04:00
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u_short *Crtat = (u_short *)MONO_BUF;
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1993-03-21 21:04:42 +03:00
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/*
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1994-03-01 21:22:52 +03:00
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* Register definitions for DMA controller 1 (channels 0..3):
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*/
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1993-03-21 21:04:42 +03:00
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#define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */
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1994-03-01 21:16:33 +03:00
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#define DMA1_SR (IO_DMA1 + 1*8) /* status register */
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1993-03-21 21:04:42 +03:00
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#define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */
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#define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */
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#define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */
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/*
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1994-03-01 21:22:52 +03:00
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* Register definitions for DMA controller 2 (channels 4..7):
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*/
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1993-12-17 03:10:06 +03:00
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#define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */
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1994-03-01 21:16:33 +03:00
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#define DMA2_SR (IO_DMA2 + 2*8) /* status register */
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1993-03-21 21:04:42 +03:00
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#define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */
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#define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */
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#define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */
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1993-06-27 10:27:29 +04:00
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static void sysbeepstop(int);
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1993-03-21 12:45:37 +03:00
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/*
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* Configure all ISA devices
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1994-03-29 08:34:18 +04:00
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*
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* XXX This code is a hack. It wants to be new config, but can't be until the
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* interrupt system is redone. For now, we do some gross hacks to make it look
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* 99% like new config.
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1993-03-21 12:45:37 +03:00
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*/
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1994-03-29 08:34:18 +04:00
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static char *msgs[3] = { "", " not configured\n", " unsupported\n" };
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struct cfdata *
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config_search(fn, parent, aux)
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cfmatch_t fn;
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struct device *parent;
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void *aux;
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{
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struct cfdata *cf = 0;
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struct device *dv = 0;
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size_t devsize;
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struct cfdriver *cd;
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struct isa_device *id,
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*idp = parent ? (void *)parent->dv_cfdata->cf_loc : 0;
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for (id = isa_devtab; id->id_driver; id++) {
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if (id->id_state == FSTATE_FOUND)
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continue;
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if (id->id_parent != idp)
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continue;
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cd = id->id_driver;
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if (id->id_unit < cd->cd_ndevs) {
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if (cd->cd_devs[id->id_unit] != 0)
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continue;
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} else {
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int old = cd->cd_ndevs, new;
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void **nsp;
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if (old == 0) {
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nsp = malloc(MINALLOCSIZE, M_DEVBUF, M_NOWAIT);
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if (!nsp)
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panic("config_search: creating dev array");
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bzero(nsp, MINALLOCSIZE);
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cd->cd_ndevs = MINALLOCSIZE / sizeof(void *);
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} else {
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new = old;
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do {
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new *= 2;
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} while (new <= id->id_unit);
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cd->cd_ndevs = new;
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nsp = malloc(new * sizeof(void *), M_DEVBUF,
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M_NOWAIT);
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if (!nsp)
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panic("config_search: expanding dev array");
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bzero(nsp, new * sizeof(void *));
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bcopy(cd->cd_devs, nsp, old * sizeof(void *));
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free(cd->cd_devs, M_DEVBUF);
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}
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cd->cd_devs = nsp;
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}
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if (!cf) {
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cf = malloc(sizeof(struct cfdata), M_DEVBUF, M_NOWAIT); if (!cf)
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panic("config_search: creating cfdata");
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}
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cf->cf_driver = cd;
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cf->cf_unit = id->id_unit;
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cf->cf_fstate = 0;
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cf->cf_loc = (void *)id;
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cf->cf_flags = id->id_flags;
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cf->cf_parents = 0;
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cf->cf_ivstubs = 0;
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if (dv && devsize != cd->cd_devsize) {
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free(dv, M_DEVBUF);
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dv = 0;
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}
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if (!dv) {
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devsize = cd->cd_devsize;
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dv = malloc(devsize, M_DEVBUF, M_NOWAIT);
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if (!dv)
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panic("config_search: creating softc");
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}
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bzero(dv, cd->cd_devsize);
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dv->dv_class = cd->cd_class;
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dv->dv_cfdata = cf;
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dv->dv_unit = id->id_unit;
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sprintf(dv->dv_xname, "%s%d", cd->cd_name, id->id_unit);
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dv->dv_parent = parent;
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cd->cd_devs[id->id_unit] = dv;
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if (fn) {
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if ((*fn)(parent, dv, aux))
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return cf;
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} else {
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if ((*cd->cd_match)(parent, dv, aux))
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return cf;
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}
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1994-03-31 20:59:04 +04:00
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cd->cd_devs[id->id_unit] = 0;
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1994-03-29 08:34:18 +04:00
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}
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if (cf)
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free(cf, M_DEVBUF);
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if (dv)
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free(dv, M_DEVBUF);
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return 0;
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}
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void
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config_attach(parent, cf, aux, print)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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cfprint_t print;
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{
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struct isa_device *id = (void *)cf->cf_loc;
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struct cfdriver *cd = cf->cf_driver;
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struct device *dv = cd->cd_devs[id->id_unit];
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cf->cf_fstate = id->id_state = FSTATE_FOUND;
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printf("%s at %s", dv->dv_xname, parent ? parent->dv_xname : "isa0");
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if (print)
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(void) (*print)(aux, (char *)0);
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(*cd->cd_attach)(parent, dv, aux);
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}
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int
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config_found(parent, aux, print)
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struct device *parent;
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void *aux;
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cfprint_t print;
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{
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struct cfdata *cf;
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if ((cf = config_search((cfmatch_t)NULL, parent, aux)) != NULL) {
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config_attach(parent, cf, aux, print);
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return 1;
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}
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if (print)
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printf(msgs[(*print)(aux, parent->dv_xname)]);
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return 0;
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}
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int
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isaprint(aux, isa)
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void *aux;
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char *isa;
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{
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struct isa_attach_args *ia = aux;
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if (ia->ia_iosize)
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printf(" port 0x%x", ia->ia_iobase);
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if (ia->ia_iosize > 1)
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printf("-0x%x", ia->ia_iobase + ia->ia_iosize - 1);
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if (ia->ia_msize)
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printf(" iomem 0x%x", ia->ia_maddr - atdevbase + 0xa0000);
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if (ia->ia_msize > 1)
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printf("-0x%x",
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ia->ia_maddr - atdevbase + 0xa0000 + ia->ia_msize - 1);
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if (ia->ia_irq)
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printf(" irq %d", ffs(ia->ia_irq) - 1);
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if (ia->ia_drq != (u_short)-1)
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printf(" drq %d", ia->ia_drq);
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/* XXXX print flags */
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return QUIET;
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}
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int
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isasubmatch(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct isa_device *id = (void *)self->dv_cfdata->cf_loc;
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struct isa_attach_args ia;
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ia.ia_iobase = id->id_iobase;
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ia.ia_iosize = 0x666;
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ia.ia_irq = id->id_irq;
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ia.ia_drq = id->id_drq;
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ia.ia_maddr = id->id_maddr - 0xa0000 + atdevbase;
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ia.ia_msize = id->id_msize;
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if (!(*id->id_driver->cd_match)(parent, self, &ia)) {
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/*
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* If we don't do this, isa_configure() will repeatedly try to
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* probe devices that weren't found. But we need to be careful
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* to do it only for the ISA bus, or we would cause things like
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* `com0 at ast? slave ?' to not probe on the second ast.
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*/
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if (!parent)
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id->id_state = FSTATE_FOUND;
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return 0;
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}
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config_attach(parent, self->dv_cfdata, &ia, isaprint);
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if (id->id_irq) {
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int intrno;
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intrno = ffs(id->id_irq) - 1;
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setidt(ICU_OFFSET+intrno, id->id_intr, SDT_SYS386IGT, SEL_KPL);
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if (id->id_mask)
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INTRMASK(*id->id_mask, id->id_irq);
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INTREN(id->id_irq);
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}
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return 1;
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}
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1993-06-27 10:27:29 +04:00
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void
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1993-12-17 03:10:06 +03:00
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isa_configure()
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{
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1993-03-21 12:45:37 +03:00
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1994-03-09 10:58:39 +03:00
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splhigh();
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1993-03-21 12:45:37 +03:00
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INTREN(IRQ_SLAVE);
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1993-12-17 03:10:06 +03:00
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enable_intr();
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1994-03-29 08:34:18 +04:00
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while (config_search(isasubmatch, NULL, NULL));
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1993-07-11 18:03:51 +04:00
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1994-03-09 10:58:39 +03:00
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printf("biomask %x ttymask %x netmask %x\n",
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biomask, ttymask, netmask);
|
1993-05-04 06:37:27 +04:00
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1994-03-09 10:58:39 +03:00
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clockmask |= astmask;
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biomask |= astmask;
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ttymask |= astmask;
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netmask |= astmask;
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impmask = netmask | ttymask;
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1993-05-04 06:37:27 +04:00
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1993-12-17 03:10:06 +03:00
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|
|
spl0();
|
1993-03-21 12:45:37 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
#define IDTVEC(name) __CONCAT(X,name)
|
|
|
|
/* default interrupt vector table entries */
|
|
|
|
extern IDTVEC(intr0), IDTVEC(intr1), IDTVEC(intr2), IDTVEC(intr3),
|
|
|
|
IDTVEC(intr4), IDTVEC(intr5), IDTVEC(intr6), IDTVEC(intr7),
|
|
|
|
IDTVEC(intr8), IDTVEC(intr9), IDTVEC(intr10), IDTVEC(intr11),
|
|
|
|
IDTVEC(intr12), IDTVEC(intr13), IDTVEC(intr14), IDTVEC(intr15);
|
|
|
|
|
|
|
|
static *defvec[16] = {
|
|
|
|
&IDTVEC(intr0), &IDTVEC(intr1), &IDTVEC(intr2), &IDTVEC(intr3),
|
|
|
|
&IDTVEC(intr4), &IDTVEC(intr5), &IDTVEC(intr6), &IDTVEC(intr7),
|
|
|
|
&IDTVEC(intr8), &IDTVEC(intr9), &IDTVEC(intr10), &IDTVEC(intr11),
|
|
|
|
&IDTVEC(intr12), &IDTVEC(intr13), &IDTVEC(intr14), &IDTVEC(intr15) };
|
|
|
|
|
|
|
|
/* out of range default interrupt vector gate entry */
|
|
|
|
extern IDTVEC(intrdefault);
|
1993-06-06 08:14:01 +04:00
|
|
|
|
1993-03-21 12:45:37 +03:00
|
|
|
/*
|
|
|
|
* Fill in default interrupt table (in case of spuruious interrupt
|
|
|
|
* during configuration of kernel, setup interrupt control unit
|
|
|
|
*/
|
1993-06-27 10:27:29 +04:00
|
|
|
void
|
1993-03-21 12:45:37 +03:00
|
|
|
isa_defaultirq() {
|
|
|
|
int i;
|
|
|
|
|
|
|
|
/* icu vectors */
|
|
|
|
for (i = NRSVIDT ; i < NRSVIDT+ICU_LEN ; i++)
|
|
|
|
setidt(i, defvec[i], SDT_SYS386IGT, SEL_KPL);
|
1993-06-06 08:14:01 +04:00
|
|
|
|
1993-03-21 12:45:37 +03:00
|
|
|
/* out of range vectors */
|
|
|
|
for (i = NRSVIDT; i < NIDT; i++)
|
|
|
|
setidt(i, &IDTVEC(intrdefault), SDT_SYS386IGT, SEL_KPL);
|
|
|
|
|
|
|
|
/* initialize 8259's */
|
|
|
|
outb(IO_ICU1, 0x11); /* reset; program device, four bytes */
|
|
|
|
outb(IO_ICU1+1, NRSVIDT); /* starting at this vector index */
|
|
|
|
outb(IO_ICU1+1, 1<<2); /* slave on line 2 */
|
1993-06-06 08:14:01 +04:00
|
|
|
#ifdef AUTO_EOI_1
|
|
|
|
outb(IO_ICU1+1, 2 | 1); /* auto EOI, 8086 mode */
|
|
|
|
#else
|
1993-03-21 12:45:37 +03:00
|
|
|
outb(IO_ICU1+1, 1); /* 8086 mode */
|
1993-06-06 08:14:01 +04:00
|
|
|
#endif
|
1993-03-21 12:45:37 +03:00
|
|
|
outb(IO_ICU1+1, 0xff); /* leave interrupts masked */
|
1993-06-06 08:14:01 +04:00
|
|
|
outb(IO_ICU1, 0x0a); /* default to IRR on read */
|
1993-06-27 10:27:29 +04:00
|
|
|
#ifdef REORDER_IRQ
|
1993-06-06 08:14:01 +04:00
|
|
|
outb(IO_ICU1, 0xc0 | (3 - 1)); /* pri order 3-7, 0-2 (com2 first) */
|
1993-06-27 10:27:29 +04:00
|
|
|
#endif
|
1993-03-21 12:45:37 +03:00
|
|
|
|
|
|
|
outb(IO_ICU2, 0x11); /* reset; program device, four bytes */
|
|
|
|
outb(IO_ICU2+1, NRSVIDT+8); /* staring at this vector index */
|
|
|
|
outb(IO_ICU2+1,2); /* my slave id is 2 */
|
1993-06-06 08:14:01 +04:00
|
|
|
#ifdef AUTO_EOI_2
|
|
|
|
outb(IO_ICU2+1, 2 | 1); /* auto EOI, 8086 mode */
|
|
|
|
#else
|
1993-03-21 12:45:37 +03:00
|
|
|
outb(IO_ICU2+1,1); /* 8086 mode */
|
1993-06-06 08:14:01 +04:00
|
|
|
#endif
|
1993-03-21 12:45:37 +03:00
|
|
|
outb(IO_ICU2+1, 0xff); /* leave interrupts masked */
|
1993-06-06 08:14:01 +04:00
|
|
|
outb(IO_ICU2, 0x0a); /* default to IRR on read */
|
1993-03-21 12:45:37 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
/* region of physical memory known to be contiguous */
|
|
|
|
vm_offset_t isaphysmem;
|
|
|
|
static caddr_t dma_bounce[8]; /* XXX */
|
|
|
|
static char bounced[8]; /* XXX */
|
|
|
|
#define MAXDMASZ 512 /* XXX */
|
|
|
|
|
|
|
|
/* high byte of address is stored in this port for i-th dma channel */
|
|
|
|
static short dmapageport[8] =
|
|
|
|
{ 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a };
|
|
|
|
|
|
|
|
/*
|
|
|
|
* isa_dmacascade(): program 8237 DMA controller channel to accept
|
|
|
|
* external dma control by a board.
|
|
|
|
*/
|
1993-06-27 10:27:29 +04:00
|
|
|
void
|
1994-03-01 21:16:33 +03:00
|
|
|
isa_dmacascade(chan)
|
|
|
|
int chan;
|
1993-03-21 21:04:42 +03:00
|
|
|
{
|
1994-03-01 21:16:33 +03:00
|
|
|
|
|
|
|
#ifdef DIAGNOSTIC
|
|
|
|
if (chan < 0 || chan > 7)
|
1993-03-21 12:45:37 +03:00
|
|
|
panic("isa_dmacascade: impossible request");
|
1994-03-01 21:16:33 +03:00
|
|
|
#endif
|
1993-03-21 12:45:37 +03:00
|
|
|
|
|
|
|
/* set dma channel mode, and set dma channel mode */
|
1993-03-21 21:04:42 +03:00
|
|
|
if ((chan & 4) == 0) {
|
|
|
|
outb(DMA1_MODE, DMA37MD_CASCADE | chan);
|
|
|
|
outb(DMA1_SMSK, chan);
|
|
|
|
} else {
|
|
|
|
outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3));
|
|
|
|
outb(DMA2_SMSK, chan & 3);
|
|
|
|
}
|
1993-03-21 12:45:37 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* isa_dmastart(): program 8237 DMA controller channel, avoid page alignment
|
|
|
|
* problems by using a bounce buffer.
|
|
|
|
*/
|
1993-06-27 10:27:29 +04:00
|
|
|
void
|
1994-03-01 21:16:33 +03:00
|
|
|
isa_dmastart(flags, addr, nbytes, chan)
|
|
|
|
int flags;
|
|
|
|
caddr_t addr;
|
|
|
|
vm_size_t nbytes;
|
|
|
|
int chan;
|
|
|
|
{
|
|
|
|
vm_offset_t phys;
|
1993-03-21 21:04:42 +03:00
|
|
|
int waport;
|
1993-03-21 12:45:37 +03:00
|
|
|
caddr_t newaddr;
|
|
|
|
|
1994-03-01 21:16:33 +03:00
|
|
|
#ifdef DIAGNOSTIC
|
|
|
|
if (chan < 0 || chan > 7 ||
|
|
|
|
((chan & 4) ? (nbytes >= (1<<17) || nbytes & 1 || (u_int)addr & 1) :
|
|
|
|
(nbytes >= (1<<16))))
|
1993-03-21 12:45:37 +03:00
|
|
|
panic("isa_dmastart: impossible request");
|
1994-03-01 21:16:33 +03:00
|
|
|
#endif
|
1993-03-21 12:45:37 +03:00
|
|
|
|
1993-03-21 21:04:42 +03:00
|
|
|
if (isa_dmarangecheck(addr, nbytes, chan)) {
|
1993-03-21 12:45:37 +03:00
|
|
|
if (dma_bounce[chan] == 0)
|
|
|
|
dma_bounce[chan] =
|
1994-03-01 21:16:33 +03:00
|
|
|
/*(caddr_t)malloc(MAXDMASZ, M_TEMP, M_WAITOK);*/
|
|
|
|
(caddr_t) isaphysmem + NBPG*chan;
|
1993-03-21 12:45:37 +03:00
|
|
|
bounced[chan] = 1;
|
|
|
|
newaddr = dma_bounce[chan];
|
|
|
|
*(int *) newaddr = 0; /* XXX */
|
|
|
|
/* copy bounce buffer on write */
|
1994-03-01 21:16:33 +03:00
|
|
|
if ((flags & B_READ) == 0)
|
1993-03-21 12:45:37 +03:00
|
|
|
bcopy(addr, newaddr, nbytes);
|
|
|
|
addr = newaddr;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* translate to physical */
|
|
|
|
phys = pmap_extract(pmap_kernel(), (vm_offset_t)addr);
|
|
|
|
|
|
|
|
if ((chan & 4) == 0) {
|
1993-03-21 21:04:42 +03:00
|
|
|
/*
|
|
|
|
* Program one of DMA channels 0..3. These are
|
|
|
|
* byte mode channels.
|
|
|
|
*/
|
|
|
|
/* set dma channel mode, and reset address ff */
|
|
|
|
if (flags & B_READ)
|
1994-03-01 21:16:33 +03:00
|
|
|
outb(DMA1_MODE, chan | DMA37MD_SINGLE | DMA37MD_WRITE);
|
1993-03-21 21:04:42 +03:00
|
|
|
else
|
1994-03-01 21:16:33 +03:00
|
|
|
outb(DMA1_MODE, chan | DMA37MD_SINGLE | DMA37MD_READ);
|
1993-03-21 21:04:42 +03:00
|
|
|
outb(DMA1_FFC, 0);
|
|
|
|
|
|
|
|
/* send start address */
|
|
|
|
waport = DMA1_CHN(chan);
|
1993-03-21 12:45:37 +03:00
|
|
|
outb(waport, phys);
|
|
|
|
outb(waport, phys>>8);
|
1993-03-21 21:04:42 +03:00
|
|
|
outb(dmapageport[chan], phys>>16);
|
1993-03-21 12:45:37 +03:00
|
|
|
|
1993-03-21 21:04:42 +03:00
|
|
|
/* send count */
|
1993-03-21 12:45:37 +03:00
|
|
|
outb(waport + 1, --nbytes);
|
|
|
|
outb(waport + 1, nbytes>>8);
|
1993-03-21 21:04:42 +03:00
|
|
|
|
|
|
|
/* unmask channel */
|
1994-03-01 21:16:33 +03:00
|
|
|
outb(DMA1_SMSK, chan | DMA37SM_CLEAR);
|
1993-03-21 12:45:37 +03:00
|
|
|
} else {
|
1993-03-21 21:04:42 +03:00
|
|
|
/*
|
|
|
|
* Program one of DMA channels 4..7. These are
|
|
|
|
* word mode channels.
|
|
|
|
*/
|
|
|
|
/* set dma channel mode, and reset address ff */
|
|
|
|
if (flags & B_READ)
|
1994-03-01 21:16:33 +03:00
|
|
|
outb(DMA2_MODE, (chan & 3) | DMA37MD_SINGLE | DMA37MD_WRITE);
|
1993-03-21 21:04:42 +03:00
|
|
|
else
|
1994-03-01 21:16:33 +03:00
|
|
|
outb(DMA2_MODE, (chan & 3) | DMA37MD_SINGLE | DMA37MD_READ);
|
1993-03-21 21:04:42 +03:00
|
|
|
outb(DMA2_FFC, 0);
|
|
|
|
|
|
|
|
/* send start address */
|
1994-03-01 21:16:33 +03:00
|
|
|
waport = DMA2_CHN(chan & 3);
|
1993-03-21 21:04:42 +03:00
|
|
|
outb(waport, phys>>1);
|
|
|
|
outb(waport, phys>>9);
|
|
|
|
outb(dmapageport[chan], phys>>16);
|
|
|
|
|
|
|
|
/* send count */
|
|
|
|
nbytes >>= 1;
|
1993-03-21 12:45:37 +03:00
|
|
|
outb(waport + 2, --nbytes);
|
|
|
|
outb(waport + 2, nbytes>>8);
|
|
|
|
|
1993-03-21 21:04:42 +03:00
|
|
|
/* unmask channel */
|
1994-03-01 21:16:33 +03:00
|
|
|
outb(DMA2_SMSK, (chan & 3) | DMA37SM_CLEAR);
|
1993-03-21 21:04:42 +03:00
|
|
|
}
|
1993-03-21 12:45:37 +03:00
|
|
|
}
|
|
|
|
|
1994-03-10 21:14:32 +03:00
|
|
|
void
|
|
|
|
isa_dmaabort(chan)
|
|
|
|
int chan;
|
|
|
|
{
|
|
|
|
|
|
|
|
#ifdef DIAGNOSTIC
|
|
|
|
if (chan < 0 || chan > 7)
|
|
|
|
panic("isa_dmadone: impossible request");
|
|
|
|
#endif
|
|
|
|
|
|
|
|
bounced[chan] = 0;
|
|
|
|
|
|
|
|
/* mask channel */
|
|
|
|
if ((chan & 4) == 0)
|
|
|
|
outb(DMA1_SMSK, DMA37SM_SET | chan);
|
|
|
|
else
|
|
|
|
outb(DMA2_SMSK, DMA37SM_SET | (chan & 3));
|
|
|
|
}
|
|
|
|
|
1993-06-27 10:27:29 +04:00
|
|
|
void
|
1994-03-01 21:16:33 +03:00
|
|
|
isa_dmadone(flags, addr, nbytes, chan)
|
|
|
|
int flags;
|
|
|
|
caddr_t addr;
|
|
|
|
vm_size_t nbytes;
|
|
|
|
int chan;
|
1993-03-21 12:45:37 +03:00
|
|
|
{
|
1994-03-01 21:16:33 +03:00
|
|
|
u_char tc;
|
|
|
|
|
|
|
|
#ifdef DIAGNOSTIC
|
|
|
|
if (chan < 0 || chan > 7)
|
|
|
|
panic("isa_dmadone: impossible request");
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* check that the terminal count was reached */
|
|
|
|
if ((chan & 4) == 0)
|
|
|
|
tc = inb(DMA1_SR) & (1 << chan);
|
|
|
|
else
|
|
|
|
tc = inb(DMA2_SR) & (1 << (chan & 3));
|
|
|
|
if (tc == 0)
|
|
|
|
/* XXX probably should panic or something */
|
|
|
|
log(LOG_ERR, "dma channel %d not finished\n", chan);
|
1993-03-21 12:45:37 +03:00
|
|
|
|
|
|
|
/* copy bounce buffer on read */
|
|
|
|
if (bounced[chan]) {
|
|
|
|
bcopy(dma_bounce[chan], addr, nbytes);
|
|
|
|
bounced[chan] = 0;
|
|
|
|
}
|
1994-03-01 21:16:33 +03:00
|
|
|
|
|
|
|
/* mask channel */
|
|
|
|
if ((chan & 4) == 0)
|
|
|
|
outb(DMA1_SMSK, DMA37SM_SET | chan);
|
|
|
|
else
|
|
|
|
outb(DMA2_SMSK, DMA37SM_SET | (chan & 3));
|
1993-03-21 12:45:37 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Check for problems with the address range of a DMA transfer
|
1993-03-21 21:04:42 +03:00
|
|
|
* (non-contiguous physical pages, outside of bus address space,
|
|
|
|
* crossing DMA page boundaries).
|
1993-03-21 12:45:37 +03:00
|
|
|
* Return true if special handling needed.
|
|
|
|
*/
|
1993-06-27 10:27:29 +04:00
|
|
|
int
|
1994-03-01 21:16:33 +03:00
|
|
|
isa_dmarangecheck(va, length, chan)
|
|
|
|
vm_offset_t va;
|
|
|
|
u_long length;
|
|
|
|
int chan;
|
|
|
|
{
|
1993-03-21 21:04:42 +03:00
|
|
|
vm_offset_t phys, priorpage = 0, endva;
|
|
|
|
u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1);
|
1993-03-21 12:45:37 +03:00
|
|
|
|
1994-03-01 21:16:33 +03:00
|
|
|
endva = round_page(va + length);
|
|
|
|
for (; va < endva ; va += NBPG) {
|
|
|
|
phys = trunc_page(pmap_extract(pmap_kernel(), va));
|
1993-03-21 12:45:37 +03:00
|
|
|
if (phys == 0)
|
|
|
|
panic("isa_dmacheck: no physical page present");
|
1994-03-01 21:16:33 +03:00
|
|
|
if (phys >= (1<<24))
|
|
|
|
return 1;
|
1993-03-21 21:04:42 +03:00
|
|
|
if (priorpage) {
|
|
|
|
if (priorpage + NBPG != phys)
|
1994-03-01 21:16:33 +03:00
|
|
|
return 1;
|
1993-03-21 21:04:42 +03:00
|
|
|
/* check if crossing a DMA page boundary */
|
1994-03-01 21:16:33 +03:00
|
|
|
if ((priorpage ^ phys) & dma_pgmsk)
|
|
|
|
return 1;
|
1993-03-21 21:04:42 +03:00
|
|
|
}
|
1993-03-21 12:45:37 +03:00
|
|
|
priorpage = phys;
|
|
|
|
}
|
1994-03-01 21:16:33 +03:00
|
|
|
return 0;
|
1993-03-21 12:45:37 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
/* head of queue waiting for physmem to become available */
|
|
|
|
struct buf isa_physmemq;
|
|
|
|
|
|
|
|
/* blocked waiting for resource to become free for exclusive use */
|
|
|
|
static isaphysmemflag;
|
|
|
|
/* if waited for and call requested when free (B_CALL) */
|
|
|
|
static void (*isaphysmemunblock)(); /* needs to be a list */
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Allocate contiguous physical memory for transfer, returning
|
|
|
|
* a *virtual* address to region. May block waiting for resource.
|
|
|
|
* (assumed to be called at splbio())
|
|
|
|
*/
|
|
|
|
caddr_t
|
|
|
|
isa_allocphysmem(caddr_t va, unsigned length, void (*func)()) {
|
|
|
|
|
|
|
|
isaphysmemunblock = func;
|
|
|
|
while (isaphysmemflag & B_BUSY) {
|
|
|
|
isaphysmemflag |= B_WANTED;
|
1993-07-06 10:06:26 +04:00
|
|
|
sleep((caddr_t)&isaphysmemflag, PRIBIO);
|
1993-03-21 12:45:37 +03:00
|
|
|
}
|
|
|
|
isaphysmemflag |= B_BUSY;
|
|
|
|
|
|
|
|
return((caddr_t)isaphysmem);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Free contiguous physical memory used for transfer.
|
|
|
|
* (assumed to be called at splbio())
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
isa_freephysmem(caddr_t va, unsigned length) {
|
|
|
|
|
|
|
|
isaphysmemflag &= ~B_BUSY;
|
|
|
|
if (isaphysmemflag & B_WANTED) {
|
|
|
|
isaphysmemflag &= B_WANTED;
|
1993-07-06 10:06:26 +04:00
|
|
|
wakeup((caddr_t)&isaphysmemflag);
|
1993-03-21 12:45:37 +03:00
|
|
|
if (isaphysmemunblock)
|
|
|
|
(*isaphysmemunblock)();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Handle a NMI, possibly a machine check.
|
|
|
|
* return true to panic system, false to ignore.
|
|
|
|
*/
|
1993-06-27 10:27:29 +04:00
|
|
|
int
|
1993-03-21 12:45:37 +03:00
|
|
|
isa_nmi(cd) {
|
|
|
|
|
|
|
|
log(LOG_CRIT, "\nNMI port 61 %x, port 70 %x\n", inb(0x61), inb(0x70));
|
|
|
|
return(0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Caught a stray interrupt, notify
|
|
|
|
*/
|
1993-06-27 10:27:29 +04:00
|
|
|
void
|
1993-03-21 12:45:37 +03:00
|
|
|
isa_strayintr(d) {
|
|
|
|
|
|
|
|
/* DON'T BOTHER FOR NOW! */
|
|
|
|
/* for some reason, we get bursts of intr #7, even if not enabled! */
|
1993-04-09 17:43:40 +04:00
|
|
|
/*
|
|
|
|
* Well the reason you got bursts of intr #7 is because someone
|
|
|
|
* raised an interrupt line and dropped it before the 8259 could
|
|
|
|
* prioritize it. This is documented in the intel data book. This
|
|
|
|
* means you have BAD hardware! I have changed this so that only
|
1993-06-06 08:14:01 +04:00
|
|
|
* the first 5 get logged, then it quits logging them, and puts
|
1993-04-09 17:43:40 +04:00
|
|
|
* out a special message. rgrimes 3/25/1993
|
|
|
|
*/
|
1993-06-06 08:14:01 +04:00
|
|
|
extern u_long intrcnt_stray;
|
1993-04-09 17:43:40 +04:00
|
|
|
|
1993-06-06 08:14:01 +04:00
|
|
|
intrcnt_stray++;
|
|
|
|
if (intrcnt_stray <= 5)
|
1993-04-09 17:43:40 +04:00
|
|
|
log(LOG_ERR,"ISA strayintr %x\n", d);
|
1993-06-06 08:14:01 +04:00
|
|
|
if (intrcnt_stray == 5)
|
1993-04-09 17:43:40 +04:00
|
|
|
log(LOG_CRIT,"Too many ISA strayintr not logging any more\n");
|
1993-03-21 12:45:37 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
static beeping;
|
1993-06-27 10:27:29 +04:00
|
|
|
static void
|
|
|
|
sysbeepstop(int f)
|
1993-03-21 12:45:37 +03:00
|
|
|
{
|
1993-06-16 00:34:54 +04:00
|
|
|
int s = splhigh();
|
|
|
|
|
1993-03-21 12:45:37 +03:00
|
|
|
/* disable counter 2 */
|
1993-06-16 00:34:54 +04:00
|
|
|
disable_intr();
|
1993-08-28 04:13:00 +04:00
|
|
|
outb(PITAUX_PORT, inb(PITAUX_PORT) & ~PIT_SPKR);
|
1993-06-16 00:34:54 +04:00
|
|
|
enable_intr();
|
1993-03-21 12:45:37 +03:00
|
|
|
if (f)
|
1993-07-06 10:06:26 +04:00
|
|
|
timeout((timeout_t)sysbeepstop, (caddr_t)0, f);
|
1993-03-21 12:45:37 +03:00
|
|
|
else
|
|
|
|
beeping = 0;
|
1993-06-16 00:34:54 +04:00
|
|
|
|
|
|
|
splx(s);
|
1993-03-21 12:45:37 +03:00
|
|
|
}
|
|
|
|
|
1993-06-27 10:27:29 +04:00
|
|
|
void
|
|
|
|
sysbeep(int pitch, int period)
|
1993-03-21 12:45:37 +03:00
|
|
|
{
|
1993-06-16 00:34:54 +04:00
|
|
|
int s = splhigh();
|
|
|
|
static int last_pitch, last_period;
|
1993-03-21 12:45:37 +03:00
|
|
|
|
1993-06-16 00:34:54 +04:00
|
|
|
if (beeping) {
|
1993-07-06 10:06:26 +04:00
|
|
|
untimeout((timeout_t)sysbeepstop, (caddr_t)(last_period/2));
|
|
|
|
untimeout((timeout_t)sysbeepstop, (caddr_t)0);
|
1993-03-21 12:45:37 +03:00
|
|
|
}
|
1993-06-16 00:34:54 +04:00
|
|
|
if (!beeping || last_pitch != pitch) {
|
|
|
|
/*
|
|
|
|
* XXX - move timer stuff to clock.c.
|
|
|
|
*/
|
|
|
|
disable_intr();
|
|
|
|
outb(TIMER_MODE, TIMER_SEL2|TIMER_16BIT|TIMER_SQWAVE);
|
1993-06-16 06:59:42 +04:00
|
|
|
outb(TIMER_CNTR2, TIMER_DIV(pitch)%256);
|
|
|
|
outb(TIMER_CNTR2, TIMER_DIV(pitch)/256);
|
1993-08-28 04:13:00 +04:00
|
|
|
outb(PITAUX_PORT, inb(PITAUX_PORT) | PIT_SPKR); /* enable counter 2 */
|
1993-06-16 00:34:54 +04:00
|
|
|
enable_intr();
|
|
|
|
}
|
|
|
|
last_pitch = pitch;
|
|
|
|
beeping = last_period = period;
|
1993-07-06 10:06:26 +04:00
|
|
|
timeout((timeout_t)sysbeepstop, (caddr_t)(period/2), period);
|
1993-06-16 00:34:54 +04:00
|
|
|
|
|
|
|
splx(s);
|
1993-03-21 12:45:37 +03:00
|
|
|
}
|
|
|
|
|
1993-06-06 08:14:01 +04:00
|
|
|
/*
|
|
|
|
* Return nonzero if a (masked) irq is pending for a given device.
|
|
|
|
*/
|
|
|
|
int
|
|
|
|
isa_irq_pending(dvp)
|
|
|
|
struct isa_device *dvp;
|
|
|
|
{
|
|
|
|
unsigned id_irq;
|
|
|
|
|
|
|
|
id_irq = (unsigned short) dvp->id_irq; /* XXX silly type in struct */
|
|
|
|
if (id_irq & 0xff)
|
|
|
|
return (inb(IO_ICU1) & id_irq);
|
|
|
|
return (inb(IO_ICU2) & (id_irq >> 8));
|
|
|
|
}
|