1995-03-26 01:35:28 +03:00
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#------------------------------------------------------------------------------
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# elf: file(1) magic for ELF executables
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1993-06-10 04:57:28 +04:00
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#
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1995-03-26 01:35:28 +03:00
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# We have to check the byte order flag to see what byte order all the
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# other stuff in the header is in.
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1993-06-10 04:57:28 +04:00
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#
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1997-01-27 20:58:11 +03:00
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# What're the correct byte orders for the nCUBE and the Fujitsu VPP500?
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1995-10-28 02:33:14 +03:00
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#
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1995-04-28 23:23:38 +04:00
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# updated by Daniel Quinlan (quinlan@yggdrasil.com)
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1993-06-10 04:57:28 +04:00
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0 string \177ELF ELF
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>4 byte 0 invalid class
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>4 byte 1 32-bit
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2002-05-18 11:00:44 +04:00
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# only for MIPS - in the future, the ABI field of e_flags should be used.
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1999-11-01 20:39:26 +03:00
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>>18 beshort 8
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2000-08-13 10:33:03 +04:00
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>>18 beshort 10
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1999-11-01 20:39:26 +03:00
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>>>36 belong &0x20 N32
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1993-06-10 04:57:28 +04:00
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>4 byte 2 64-bit
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>5 byte 0 invalid byte order
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>5 byte 1 LSB
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2002-05-18 11:00:44 +04:00
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# The official e_machine number for MIPS is now #8, regardless of endianness.
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# The second number (#10) will be deprecated later. For now, we still
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# say something if #10 is encountered, but only gory details for #8.
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2000-08-10 23:12:40 +04:00
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>>18 leshort 8
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# only for 32-bit
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>>>4 byte 1
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2002-05-18 11:00:44 +04:00
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>>>>36 lelong&0xf0000000 0x00000000 MIPS-I
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>>>>36 lelong&0xf0000000 0x10000000 MIPS-II
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>>>>36 lelong&0xf0000000 0x20000000 MIPS-III
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>>>>36 lelong&0xf0000000 0x30000000 MIPS-IV
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>>>>36 lelong&0xf0000000 0x40000000 MIPS-V
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>>>>36 lelong&0xf0000000 0x60000000 MIPS32
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>>>>36 lelong&0xf0000000 0x70000000 MIPS64
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>>>>36 lelong&0xf0000000 0x80000000 MIPS32 rel2
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>>>>36 lelong&0xf0000000 0x90000000 MIPS64 rel2
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2000-08-10 23:12:40 +04:00
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# only for 64-bit
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>>>4 byte 2
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2002-05-18 11:00:44 +04:00
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>>>>48 lelong&0xf0000000 0x00000000 MIPS-I
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>>>>48 lelong&0xf0000000 0x10000000 MIPS-II
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>>>>48 lelong&0xf0000000 0x20000000 MIPS-III
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>>>>48 lelong&0xf0000000 0x30000000 MIPS-IV
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>>>>48 lelong&0xf0000000 0x40000000 MIPS-V
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>>>>48 lelong&0xf0000000 0x60000000 MIPS32
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>>>>48 lelong&0xf0000000 0x70000000 MIPS64
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>>>>48 lelong&0xf0000000 0x80000000 MIPS32 rel2
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>>>>48 lelong&0xf0000000 0x90000000 MIPS64 rel2
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1995-04-28 23:23:38 +04:00
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>>16 leshort 0 no file type,
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>>16 leshort 1 relocatable,
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>>16 leshort 2 executable,
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>>16 leshort 3 shared object,
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1996-10-06 00:20:24 +04:00
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# Core handling from Peter Tobias <tobias@server.et-inf.fho-emden.de>
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1998-09-20 19:27:15 +04:00
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# corrections by Christian 'Dr. Disk' Hechelmann <drdisk@ds9.au.s.shuttle.de>
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1996-10-06 00:20:24 +04:00
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>>16 leshort 4 core file
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2002-05-18 11:00:44 +04:00
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# Core file detection is not reliable.
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#>>>(0x38+0xcc) string >\0 of '%s'
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#>>>(0x38+0x10) lelong >0 (signal %d),
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1995-04-28 23:23:38 +04:00
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>>16 leshort &0xff00 processor-specific,
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>>18 leshort 0 no machine,
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1995-10-28 02:33:14 +03:00
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>>18 leshort 1 AT&T WE32100 - invalid byte order,
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1995-04-28 23:23:38 +04:00
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>>18 leshort 2 SPARC - invalid byte order,
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>>18 leshort 3 Intel 80386,
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2002-03-22 03:19:57 +03:00
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>>18 leshort 4 Motorola
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>>>36 lelong &0x01000000 68000 - invalid byte order,
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>>>36 lelong &0x00810000 CPU32 - invalid byte order,
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>>>36 lelong 0 68020 - invalid byte order,
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1995-04-28 23:23:38 +04:00
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>>18 leshort 5 Motorola 88000 - invalid byte order,
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>>18 leshort 6 Intel 80486,
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>>18 leshort 7 Intel 80860,
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2002-05-18 11:00:44 +04:00
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>>18 leshort 8 MIPS,
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1997-01-27 20:58:11 +03:00
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>>18 leshort 9 Amdahl - invalid byte order,
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2002-05-18 11:00:44 +04:00
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>>18 leshort 10 MIPS (deprecated),
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1997-01-27 20:58:11 +03:00
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>>18 leshort 11 RS6000 - invalid byte order,
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>>18 leshort 15 PA-RISC - invalid byte order,
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2001-03-17 14:21:51 +03:00
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>>>50 leshort 0x0214 2.0
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>>>48 leshort &0x0008 (LP64),
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1997-01-27 20:58:11 +03:00
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>>18 leshort 16 nCUBE,
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1998-09-20 19:27:15 +04:00
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>>18 leshort 17 Fujitsu VPP500,
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1997-01-27 20:58:11 +03:00
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>>18 leshort 18 SPARC32PLUS,
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>>18 leshort 20 PowerPC,
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1998-08-12 21:48:35 +04:00
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>>18 leshort 36 NEC V800,
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>>18 leshort 37 Fujitsu FR20,
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>>18 leshort 38 TRW RH-32,
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>>18 leshort 39 Motorola RCE,
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2001-02-13 17:35:21 +03:00
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>>18 leshort 40 ARM,
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1998-09-20 19:27:15 +04:00
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>>18 leshort 41 Alpha,
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1998-08-12 21:48:35 +04:00
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>>18 leshort 42 Hitachi SH,
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1998-09-20 19:27:15 +04:00
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>>18 leshort 43 SPARC V9 - invalid byte order,
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>>18 leshort 44 Siemens Tricore Embedded Processor,
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>>18 leshort 45 Argonaut RISC Core, Argonaut Technologies Inc.,
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>>18 leshort 46 Hitachi H8/300,
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>>18 leshort 47 Hitachi H8/300H,
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>>18 leshort 48 Hitachi H8S,
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>>18 leshort 49 Hitachi H8/500,
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1999-11-01 20:39:26 +03:00
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>>18 leshort 50 IA-64 (Intel 64 bit architecture)
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1998-09-20 19:27:15 +04:00
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>>18 leshort 51 Stanford MIPS-X,
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>>18 leshort 52 Motorola Coldfire,
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>>18 leshort 53 Motorola M68HC12,
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2001-06-19 13:27:24 +04:00
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>>18 leshort 62 AMD x86-64,
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1999-08-21 04:28:09 +04:00
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>>18 leshort 75 Digital VAX,
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1998-09-20 19:27:15 +04:00
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>>18 leshort 0x9026 Alpha (unofficial),
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1995-04-28 23:23:38 +04:00
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>>20 lelong 0 invalid version
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>>20 lelong 1 version 1
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1993-06-10 04:57:28 +04:00
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>>36 lelong 1 MathCoPro/FPU/MAU Required
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1996-09-26 23:51:28 +04:00
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>5 byte 2 MSB
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2002-05-18 11:00:44 +04:00
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# only for MIPS - see comment in little-endian section above.
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1999-11-01 20:39:26 +03:00
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>>18 beshort 8
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# only for 32-bit
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>>>4 byte 1
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2002-05-18 11:00:44 +04:00
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>>>>36 belong&0xf0000000 0x00000000 MIPS-I
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>>>>36 belong&0xf0000000 0x10000000 MIPS-II
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>>>>36 belong&0xf0000000 0x20000000 MIPS-III
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>>>>36 belong&0xf0000000 0x30000000 MIPS-IV
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>>>>36 belong&0xf0000000 0x40000000 MIPS-V
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>>>>36 belong&0xf0000000 0x60000000 MIPS32
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>>>>36 belong&0xf0000000 0x70000000 MIPS64
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>>>>36 belong&0xf0000000 0x80000000 MIPS32 rel2
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>>>>36 belong&0xf0000000 0x90000000 MIPS64 rel2
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1999-11-01 20:39:26 +03:00
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# only for 64-bit
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>>>4 byte 2
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2002-05-18 11:00:44 +04:00
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>>>>48 belong&0xf0000000 0x00000000 MIPS-I
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>>>>48 belong&0xf0000000 0x10000000 MIPS-II
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>>>>48 belong&0xf0000000 0x20000000 MIPS-III
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>>>>48 belong&0xf0000000 0x30000000 MIPS-IV
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>>>>48 belong&0xf0000000 0x40000000 MIPS-V
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>>>>48 belong&0xf0000000 0x60000000 MIPS32
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>>>>48 belong&0xf0000000 0x70000000 MIPS64
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>>>>48 belong&0xf0000000 0x80000000 MIPS32 rel2
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>>>>48 belong&0xf0000000 0x90000000 MIPS64 rel2
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1995-04-28 23:23:38 +04:00
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>>16 beshort 0 no file type,
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>>16 beshort 1 relocatable,
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>>16 beshort 2 executable,
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>>16 beshort 3 shared object,
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>>16 beshort 4 core file,
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2002-05-18 11:00:44 +04:00
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#>>>(0x38+0xcc) string >\0 of '%s'
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#>>>(0x38+0x10) belong >0 (signal %d),
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1995-04-28 23:23:38 +04:00
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>>16 beshort &0xff00 processor-specific,
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>>18 beshort 0 no machine,
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>>18 beshort 1 AT&T WE32100,
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>>18 beshort 2 SPARC,
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>>18 beshort 3 Intel 80386 - invalid byte order,
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2002-03-22 03:19:57 +03:00
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>>18 beshort 4 Motorola
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>>>36 belong &0x01000000 68000,
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>>>36 belong &0x00810000 CPU32,
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>>>36 belong 0 68020,
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1995-04-28 23:23:38 +04:00
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>>18 beshort 5 Motorola 88000,
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>>18 beshort 6 Intel 80486 - invalid byte order,
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>>18 beshort 7 Intel 80860,
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2002-05-18 11:00:44 +04:00
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>>18 beshort 8 MIPS,
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1996-10-06 00:20:24 +04:00
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>>18 beshort 9 Amdahl,
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2002-05-18 11:00:44 +04:00
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>>18 beshort 10 MIPS (deprecated),
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1997-01-27 20:58:11 +03:00
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>>18 beshort 11 RS6000,
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2001-03-17 14:21:51 +03:00
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>>18 beshort 15 PA-RISC
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>>>50 beshort 0x0214 2.0
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>>>48 beshort &0x0008 (LP64)
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1997-01-27 20:58:11 +03:00
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>>18 beshort 16 nCUBE,
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1998-09-20 19:27:15 +04:00
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>>18 beshort 17 Fujitsu VPP500,
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1997-01-27 20:58:11 +03:00
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>>18 beshort 18 SPARC32PLUS,
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1999-11-01 20:39:26 +03:00
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>>>36 belong&0xffff00 &0x000100 V8+ Required,
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>>>36 belong&0xffff00 &0x000200 Sun UltraSPARC1 Extensions Required,
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>>>36 belong&0xffff00 &0x000400 HaL R1 Extensions Required,
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>>>36 belong&0xffff00 &0x000800 Sun UltraSPARC3 Extensions Required,
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1998-09-20 19:27:15 +04:00
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>>18 beshort 20 PowerPC or cisco 4500,
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>>18 beshort 21 cisco 7500,
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>>18 beshort 24 cisco SVIP,
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>>18 beshort 25 cisco 7200,
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>>18 beshort 36 NEC V800 or cisco 12000,
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1998-08-12 21:48:35 +04:00
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>>18 beshort 37 Fujitsu FR20,
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>>18 beshort 38 TRW RH-32,
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>>18 beshort 39 Motorola RCE,
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2001-02-13 17:35:21 +03:00
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>>18 beshort 40 ARM,
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1998-09-20 19:27:15 +04:00
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>>18 beshort 41 Alpha,
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1999-09-12 20:38:16 +04:00
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>>18 beshort 42 Hitachi SH,
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1999-11-01 20:39:26 +03:00
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>>18 beshort 43 SPARC V9,
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1998-09-20 19:27:15 +04:00
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>>18 beshort 44 Siemens Tricore Embedded Processor,
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>>18 beshort 45 Argonaut RISC Core, Argonaut Technologies Inc.,
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>>18 beshort 46 Hitachi H8/300,
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>>18 beshort 47 Hitachi H8/300H,
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>>18 beshort 48 Hitachi H8S,
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>>18 beshort 49 Hitachi H8/500,
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>>18 beshort 50 Intel Merced Processor,
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>>18 beshort 51 Stanford MIPS-X,
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>>18 beshort 52 Motorola Coldfire,
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>>18 beshort 53 Motorola M68HC12,
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2001-07-23 02:53:00 +04:00
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>>18 beshort 73 Cray NV1,
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1999-08-21 04:28:09 +04:00
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>>18 beshort 75 Digital VAX,
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1998-09-20 19:27:15 +04:00
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>>18 beshort 0x9026 Alpha (unofficial),
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1995-04-28 23:23:38 +04:00
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>>20 belong 0 invalid version
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>>20 belong 1 version 1
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1993-06-10 04:57:28 +04:00
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>>36 belong 1 MathCoPro/FPU/MAU Required
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2001-07-23 02:53:00 +04:00
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>8 string >\0 (%s)
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>8 string \0
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>>7 byte 0 (SYSV)
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>>7 byte 1 (HP-UX)
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>>7 byte 2 (NetBSD)
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>>7 byte 3 (GNU/Linux)
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>>7 byte 4 (GNU/Hurd)
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>>7 byte 5 (86Open)
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>>7 byte 6 (Solaris)
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>>7 byte 7 (Monterey)
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>>7 byte 8 (IRIX)
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>>7 byte 9 (FreeBSD)
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>>7 byte 10 (Tru64)
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>>7 byte 11 (Novell Modesto)
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>>7 byte 12 (OpenBSD)
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>>7 byte 97 (ARM)
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>>7 byte 255 (embedded)
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