2004-08-12 09:02:50 +04:00
|
|
|
/* $NetBSD: ata_wdc.c,v 1.64 2004/08/12 05:02:50 thorpej Exp $ */
|
1998-10-12 20:09:10 +04:00
|
|
|
|
|
|
|
/*
|
2003-10-08 14:58:12 +04:00
|
|
|
* Copyright (c) 1998, 2001, 2003 Manuel Bouyer.
|
1998-10-12 20:09:10 +04:00
|
|
|
*
|
|
|
|
* Redistribution and use in source and binary forms, with or without
|
|
|
|
* modification, are permitted provided that the following conditions
|
|
|
|
* are met:
|
|
|
|
* 1. Redistributions of source code must retain the above copyright
|
|
|
|
* notice, this list of conditions and the following disclaimer.
|
|
|
|
* 2. Redistributions in binary form must reproduce the above copyright
|
|
|
|
* notice, this list of conditions and the following disclaimer in the
|
|
|
|
* documentation and/or other materials provided with the distribution.
|
|
|
|
* 3. All advertising materials mentioning features or use of this software
|
|
|
|
* must display the following acknowledgement:
|
2002-04-24 00:41:13 +04:00
|
|
|
* This product includes software developed by Manuel Bouyer.
|
2003-10-05 21:48:49 +04:00
|
|
|
* 4. The name of the author may not be used to endorse or promote products
|
|
|
|
* derived from this software without specific prior written permission.
|
1998-10-12 20:09:10 +04:00
|
|
|
*
|
2000-05-15 12:32:07 +04:00
|
|
|
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
|
|
|
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
|
|
|
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
|
|
|
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
|
|
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
|
|
|
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
|
|
|
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
|
|
|
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|
|
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
|
|
|
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
1998-10-12 20:09:10 +04:00
|
|
|
*/
|
|
|
|
|
|
|
|
/*-
|
2004-06-22 23:20:56 +04:00
|
|
|
* Copyright (c) 1998, 2004 The NetBSD Foundation, Inc.
|
1998-10-12 20:09:10 +04:00
|
|
|
* All rights reserved.
|
|
|
|
*
|
|
|
|
* This code is derived from software contributed to The NetBSD Foundation
|
|
|
|
* by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer.
|
|
|
|
*
|
|
|
|
* Redistribution and use in source and binary forms, with or without
|
|
|
|
* modification, are permitted provided that the following conditions
|
|
|
|
* are met:
|
|
|
|
* 1. Redistributions of source code must retain the above copyright
|
|
|
|
* notice, this list of conditions and the following disclaimer.
|
|
|
|
* 2. Redistributions in binary form must reproduce the above copyright
|
|
|
|
* notice, this list of conditions and the following disclaimer in the
|
|
|
|
* documentation and/or other materials provided with the distribution.
|
|
|
|
* 3. All advertising materials mentioning features or use of this software
|
|
|
|
* must display the following acknowledgement:
|
|
|
|
* This product includes software developed by the NetBSD
|
|
|
|
* Foundation, Inc. and its contributors.
|
|
|
|
* 4. Neither the name of The NetBSD Foundation nor the names of its
|
|
|
|
* contributors may be used to endorse or promote products derived
|
|
|
|
* from this software without specific prior written permission.
|
|
|
|
*
|
|
|
|
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
|
|
|
|
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
|
|
|
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
|
|
|
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
|
|
|
|
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
|
|
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
|
|
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
|
|
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
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|
|
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
|
|
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
|
|
* POSSIBILITY OF SUCH DAMAGE.
|
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|
|
*/
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|
2001-11-13 15:51:12 +03:00
|
|
|
#include <sys/cdefs.h>
|
2004-08-12 09:02:50 +04:00
|
|
|
__KERNEL_RCSID(0, "$NetBSD: ata_wdc.c,v 1.64 2004/08/12 05:02:50 thorpej Exp $");
|
2001-11-13 15:51:12 +03:00
|
|
|
|
1999-02-21 03:52:04 +03:00
|
|
|
#ifndef WDCDEBUG
|
1998-10-12 20:09:10 +04:00
|
|
|
#define WDCDEBUG
|
1999-02-21 03:52:04 +03:00
|
|
|
#endif /* WDCDEBUG */
|
1998-10-12 20:09:10 +04:00
|
|
|
|
|
|
|
#include <sys/param.h>
|
|
|
|
#include <sys/systm.h>
|
|
|
|
#include <sys/kernel.h>
|
|
|
|
#include <sys/file.h>
|
|
|
|
#include <sys/stat.h>
|
|
|
|
#include <sys/buf.h>
|
|
|
|
#include <sys/malloc.h>
|
|
|
|
#include <sys/device.h>
|
|
|
|
#include <sys/disklabel.h>
|
|
|
|
#include <sys/syslog.h>
|
|
|
|
#include <sys/proc.h>
|
|
|
|
|
|
|
|
#include <machine/intr.h>
|
|
|
|
#include <machine/bus.h>
|
|
|
|
#ifndef __BUS_SPACE_HAS_STREAM_METHODS
|
|
|
|
#define bus_space_write_multi_stream_2 bus_space_write_multi_2
|
|
|
|
#define bus_space_write_multi_stream_4 bus_space_write_multi_4
|
|
|
|
#define bus_space_read_multi_stream_2 bus_space_read_multi_2
|
|
|
|
#define bus_space_read_multi_stream_4 bus_space_read_multi_4
|
|
|
|
#endif /* __BUS_SPACE_HAS_STREAM_METHODS */
|
|
|
|
|
|
|
|
#include <dev/ata/atareg.h>
|
|
|
|
#include <dev/ata/atavar.h>
|
|
|
|
#include <dev/ic/wdcreg.h>
|
|
|
|
#include <dev/ic/wdcvar.h>
|
|
|
|
|
|
|
|
#define DEBUG_INTR 0x01
|
|
|
|
#define DEBUG_XFERS 0x02
|
|
|
|
#define DEBUG_STATUS 0x04
|
|
|
|
#define DEBUG_FUNCS 0x08
|
|
|
|
#define DEBUG_PROBE 0x10
|
|
|
|
#ifdef WDCDEBUG
|
2003-10-08 14:58:12 +04:00
|
|
|
extern int wdcdebug_wd_mask; /* inited in wd.c */
|
1998-10-12 20:09:10 +04:00
|
|
|
#define WDCDEBUG_PRINT(args, level) \
|
|
|
|
if (wdcdebug_wd_mask & (level)) \
|
|
|
|
printf args
|
|
|
|
#else
|
|
|
|
#define WDCDEBUG_PRINT(args, level)
|
|
|
|
#endif
|
|
|
|
|
1999-03-17 13:13:56 +03:00
|
|
|
#define ATA_DELAY 10000 /* 10s for a drive I/O */
|
1998-10-12 20:09:10 +04:00
|
|
|
|
2003-12-14 05:48:36 +03:00
|
|
|
static int wdc_ata_bio(struct ata_drive_datas*, struct ata_bio*);
|
2004-01-03 04:50:52 +03:00
|
|
|
static void wdc_ata_bio_start(struct wdc_channel *,struct ata_xfer *);
|
|
|
|
static void _wdc_ata_bio_start(struct wdc_channel *,struct ata_xfer *);
|
|
|
|
static int wdc_ata_bio_intr(struct wdc_channel *, struct ata_xfer *,
|
2003-12-14 05:48:36 +03:00
|
|
|
int);
|
2004-08-01 01:26:42 +04:00
|
|
|
static void wdc_ata_bio_kill_xfer(struct wdc_channel *,
|
|
|
|
struct ata_xfer *, int);
|
2004-01-03 04:50:52 +03:00
|
|
|
static void wdc_ata_bio_done(struct wdc_channel *, struct ata_xfer *);
|
2003-12-14 05:48:36 +03:00
|
|
|
static int wdc_ata_err(struct ata_drive_datas *, struct ata_bio *);
|
1998-10-12 20:09:10 +04:00
|
|
|
#define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */
|
|
|
|
#define WDC_ATA_RECOV 0x01 /* There was a recovered error */
|
|
|
|
#define WDC_ATA_ERR 0x02 /* Drive reports an error */
|
2003-12-14 05:48:36 +03:00
|
|
|
static int wdc_ata_addref(struct ata_drive_datas *);
|
|
|
|
static void wdc_ata_delref(struct ata_drive_datas *);
|
2001-12-03 03:11:15 +03:00
|
|
|
|
|
|
|
const struct ata_bustype wdc_ata_bustype = {
|
|
|
|
SCSIPI_BUSTYPE_ATA,
|
|
|
|
wdc_ata_bio,
|
2004-08-02 01:40:41 +04:00
|
|
|
wdc_reset_drive,
|
2001-12-03 03:11:15 +03:00
|
|
|
wdc_exec_command,
|
|
|
|
ata_get_params,
|
|
|
|
wdc_ata_addref,
|
|
|
|
wdc_ata_delref,
|
2004-08-05 02:44:04 +04:00
|
|
|
wdc_kill_pending,
|
2001-12-03 03:11:15 +03:00
|
|
|
};
|
|
|
|
|
2002-01-13 20:24:28 +03:00
|
|
|
/*
|
|
|
|
* Convert a 32 bit command to a 48 bit command.
|
|
|
|
*/
|
2003-12-14 05:45:48 +03:00
|
|
|
static __inline
|
2002-01-13 20:24:28 +03:00
|
|
|
int to48(int cmd32)
|
|
|
|
{
|
|
|
|
switch (cmd32) {
|
|
|
|
case WDCC_READ:
|
|
|
|
return WDCC_READ_EXT;
|
|
|
|
case WDCC_WRITE:
|
|
|
|
return WDCC_WRITE_EXT;
|
|
|
|
case WDCC_READMULTI:
|
|
|
|
return WDCC_READMULTI_EXT;
|
|
|
|
case WDCC_WRITEMULTI:
|
|
|
|
return WDCC_WRITEMULTI_EXT;
|
2002-01-14 05:17:59 +03:00
|
|
|
case WDCC_READDMA:
|
|
|
|
return WDCC_READDMA_EXT;
|
|
|
|
case WDCC_WRITEDMA:
|
|
|
|
return WDCC_WRITEDMA_EXT;
|
2002-01-13 20:24:28 +03:00
|
|
|
default:
|
|
|
|
panic("ata_wdc: illegal 32 bit command %d", cmd32);
|
|
|
|
/*NOTREACHED*/
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
1998-10-12 20:09:10 +04:00
|
|
|
/*
|
2004-08-12 09:02:50 +04:00
|
|
|
* Handle block I/O operation. Return ATACMD_COMPLETE, ATACMD_QUEUED, or
|
|
|
|
* ATACMD_TRY_AGAIN. Must be called at splbio().
|
1998-10-12 20:09:10 +04:00
|
|
|
*/
|
2003-12-14 05:48:36 +03:00
|
|
|
static int
|
2003-12-14 05:45:48 +03:00
|
|
|
wdc_ata_bio(struct ata_drive_datas *drvp, struct ata_bio *ata_bio)
|
1998-10-12 20:09:10 +04:00
|
|
|
{
|
2004-01-01 20:18:53 +03:00
|
|
|
struct ata_xfer *xfer;
|
2004-01-03 04:50:52 +03:00
|
|
|
struct wdc_channel *chp = drvp->chnl_softc;
|
2004-01-04 01:56:52 +03:00
|
|
|
struct wdc_softc *wdc = chp->ch_wdc;
|
1998-10-12 20:09:10 +04:00
|
|
|
|
|
|
|
xfer = wdc_get_xfer(WDC_NOSLEEP);
|
|
|
|
if (xfer == NULL)
|
2004-08-12 09:02:50 +04:00
|
|
|
return ATACMD_TRY_AGAIN;
|
2004-01-04 01:56:52 +03:00
|
|
|
if (wdc->cap & WDC_CAPABILITY_NOIRQ)
|
2001-06-13 22:17:38 +04:00
|
|
|
ata_bio->flags |= ATA_POLL;
|
1998-10-12 20:09:10 +04:00
|
|
|
if (ata_bio->flags & ATA_POLL)
|
|
|
|
xfer->c_flags |= C_POLL;
|
|
|
|
if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) &&
|
|
|
|
(ata_bio->flags & ATA_SINGLE) == 0)
|
|
|
|
xfer->c_flags |= C_DMA;
|
2004-01-01 20:18:53 +03:00
|
|
|
xfer->c_drive = drvp->drive;
|
|
|
|
xfer->c_cmd = ata_bio;
|
|
|
|
xfer->c_databuf = ata_bio->databuf;
|
1998-10-12 20:09:10 +04:00
|
|
|
xfer->c_bcount = ata_bio->bcount;
|
|
|
|
xfer->c_start = wdc_ata_bio_start;
|
|
|
|
xfer->c_intr = wdc_ata_bio_intr;
|
1999-10-20 19:22:24 +04:00
|
|
|
xfer->c_kill_xfer = wdc_ata_bio_kill_xfer;
|
1998-10-12 20:09:10 +04:00
|
|
|
wdc_exec_xfer(chp, xfer);
|
2004-08-12 09:02:50 +04:00
|
|
|
return (ata_bio->flags & ATA_ITSDONE) ? ATACMD_COMPLETE : ATACMD_QUEUED;
|
1998-10-12 20:09:10 +04:00
|
|
|
}
|
|
|
|
|
2003-12-14 05:48:36 +03:00
|
|
|
static void
|
2004-01-03 04:50:52 +03:00
|
|
|
wdc_ata_bio_start(struct wdc_channel *chp, struct ata_xfer *xfer)
|
1999-08-06 16:00:23 +04:00
|
|
|
{
|
2004-01-04 01:56:52 +03:00
|
|
|
struct wdc_softc *wdc = chp->ch_wdc;
|
2004-01-01 20:18:53 +03:00
|
|
|
struct ata_bio *ata_bio = xfer->c_cmd;
|
|
|
|
struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive];
|
2003-10-08 14:58:12 +04:00
|
|
|
int wait_flags = (xfer->c_flags & C_POLL) ? AT_POLL : 0;
|
|
|
|
char *errstring;
|
|
|
|
|
1999-08-06 16:00:23 +04:00
|
|
|
WDCDEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n",
|
2004-01-04 01:56:52 +03:00
|
|
|
wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive),
|
1999-08-06 16:00:23 +04:00
|
|
|
DEBUG_XFERS);
|
|
|
|
|
2003-10-08 14:58:12 +04:00
|
|
|
/* Do control operations specially. */
|
|
|
|
if (__predict_false(drvp->state < READY)) {
|
|
|
|
/*
|
|
|
|
* Actually, we want to be careful not to mess with the control
|
|
|
|
* state if the device is currently busy, but we can assume
|
|
|
|
* that we never get to this point if that's the case.
|
|
|
|
*/
|
|
|
|
/* If it's not a polled command, we need the kenrel thread */
|
|
|
|
if ((xfer->c_flags & C_POLL) == 0 &&
|
|
|
|
(chp->ch_flags & WDCF_TH_RUN) == 0) {
|
2003-10-30 01:05:15 +03:00
|
|
|
chp->ch_queue->queue_freeze++;
|
2004-01-04 02:59:58 +03:00
|
|
|
wakeup(&chp->ch_thread);
|
2003-10-08 14:58:12 +04:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
/*
|
|
|
|
* disable interrupts, all commands here should be quick
|
|
|
|
* enouth to be able to poll, and we don't go here that often
|
|
|
|
*/
|
|
|
|
bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
|
|
|
|
WDCTL_4BIT | WDCTL_IDS);
|
2004-01-04 01:56:52 +03:00
|
|
|
if (wdc->cap & WDC_CAPABILITY_SELECT)
|
|
|
|
wdc->select(chp, xfer->c_drive);
|
There are some cards that map the ATA control and IDE DMA registers
in a different fashion. Individually, they have the same functionality,
but their layout is different. An example of such a chipset is
the Promise 203xx.
To be able to deal with this, transform the cmd and dma bus_space handles
into an array of handles, each seperately created with bus_space_subregion.
The code generated by using the extra indirection shouldn't change much,
since the extra indirection is negated by having the offset calculation
already done in bus_space_subregion. E.g.
bus_space_write_4(tag, handle, offset, value)
becomes
bus_space_write_4(tag, handles[offset], 0, value)
Reviewed by Manuel Bouyer. Tested on wdc_isa, wdc_pcmcia, viaide, piixide (i386)
and on cmdide (sparc64).
2003-11-28 02:02:40 +03:00
|
|
|
bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0,
|
2004-01-01 20:18:53 +03:00
|
|
|
WDSD_IBM | (xfer->c_drive << 4));
|
2004-03-02 16:13:57 +03:00
|
|
|
DELAY(10);
|
2003-10-08 14:58:12 +04:00
|
|
|
errstring = "wait";
|
|
|
|
if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags))
|
|
|
|
goto ctrltimeout;
|
2004-01-01 20:18:53 +03:00
|
|
|
wdccommandshort(chp, xfer->c_drive, WDCC_RECAL);
|
2003-10-08 14:58:12 +04:00
|
|
|
/* Wait for at last 400ns for status bit to be valid */
|
|
|
|
DELAY(1);
|
|
|
|
errstring = "recal";
|
|
|
|
if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags))
|
|
|
|
goto ctrltimeout;
|
|
|
|
if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
|
|
|
|
goto ctrlerror;
|
|
|
|
/* Don't try to set modes if controller can't be adjusted */
|
2004-01-04 01:56:52 +03:00
|
|
|
if ((wdc->cap & WDC_CAPABILITY_MODE) == 0)
|
2003-10-08 14:58:12 +04:00
|
|
|
goto geometry;
|
|
|
|
/* Also don't try if the drive didn't report its mode */
|
|
|
|
if ((drvp->drive_flags & DRIVE_MODE) == 0)
|
|
|
|
goto geometry;
|
|
|
|
wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
|
|
|
|
0x08 | drvp->PIO_mode, WDSF_SET_MODE);
|
|
|
|
errstring = "piomode";
|
|
|
|
if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags))
|
|
|
|
goto ctrltimeout;
|
|
|
|
if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
|
|
|
|
goto ctrlerror;
|
|
|
|
if (drvp->drive_flags & DRIVE_UDMA) {
|
|
|
|
wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
|
|
|
|
0x40 | drvp->UDMA_mode, WDSF_SET_MODE);
|
|
|
|
} else if (drvp->drive_flags & DRIVE_DMA) {
|
|
|
|
wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
|
|
|
|
0x20 | drvp->DMA_mode, WDSF_SET_MODE);
|
|
|
|
} else {
|
|
|
|
goto geometry;
|
|
|
|
}
|
|
|
|
errstring = "dmamode";
|
|
|
|
if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags))
|
|
|
|
goto ctrltimeout;
|
|
|
|
if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
|
|
|
|
goto ctrlerror;
|
|
|
|
geometry:
|
|
|
|
if (ata_bio->flags & ATA_LBA)
|
|
|
|
goto multimode;
|
2004-01-01 20:18:53 +03:00
|
|
|
wdccommand(chp, xfer->c_drive, WDCC_IDP,
|
2003-10-08 14:58:12 +04:00
|
|
|
ata_bio->lp->d_ncylinders,
|
|
|
|
ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors,
|
|
|
|
(ata_bio->lp->d_type == DTYPE_ST506) ?
|
|
|
|
ata_bio->lp->d_precompcyl / 4 : 0);
|
|
|
|
errstring = "geometry";
|
|
|
|
if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags))
|
|
|
|
goto ctrltimeout;
|
|
|
|
if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
|
|
|
|
goto ctrlerror;
|
|
|
|
multimode:
|
|
|
|
if (ata_bio->multi == 1)
|
|
|
|
goto ready;
|
2004-01-01 20:18:53 +03:00
|
|
|
wdccommand(chp, xfer->c_drive, WDCC_SETMULTI, 0, 0, 0,
|
2003-10-08 14:58:12 +04:00
|
|
|
ata_bio->multi, 0);
|
|
|
|
errstring = "setmulti";
|
|
|
|
if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags))
|
|
|
|
goto ctrltimeout;
|
|
|
|
if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
|
|
|
|
goto ctrlerror;
|
|
|
|
ready:
|
|
|
|
drvp->state = READY;
|
|
|
|
/*
|
|
|
|
* The drive is usable now
|
|
|
|
*/
|
|
|
|
bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
|
|
|
|
WDCTL_4BIT);
|
2004-05-08 19:03:32 +04:00
|
|
|
delay(10); /* some drives need a little delay here */
|
2003-10-08 14:58:12 +04:00
|
|
|
}
|
|
|
|
|
1999-08-06 16:00:23 +04:00
|
|
|
_wdc_ata_bio_start(chp, xfer);
|
2003-10-08 14:58:12 +04:00
|
|
|
return;
|
|
|
|
ctrltimeout:
|
|
|
|
printf("%s:%d:%d: %s timed out\n",
|
2004-01-04 01:56:52 +03:00
|
|
|
wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive,
|
|
|
|
errstring);
|
2003-10-08 14:58:12 +04:00
|
|
|
ata_bio->error = TIMEOUT;
|
|
|
|
goto ctrldone;
|
|
|
|
ctrlerror:
|
|
|
|
printf("%s:%d:%d: %s ",
|
2004-01-04 01:56:52 +03:00
|
|
|
wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive,
|
2003-10-08 14:58:12 +04:00
|
|
|
errstring);
|
|
|
|
if (chp->ch_status & WDCS_DWF) {
|
|
|
|
printf("drive fault\n");
|
|
|
|
ata_bio->error = ERR_DF;
|
|
|
|
} else {
|
|
|
|
printf("error (%x)\n", chp->ch_error);
|
|
|
|
ata_bio->r_error = chp->ch_error;
|
|
|
|
ata_bio->error = ERROR;
|
|
|
|
}
|
|
|
|
ctrldone:
|
|
|
|
drvp->state = 0;
|
|
|
|
wdc_ata_bio_done(chp, xfer);
|
|
|
|
bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT);
|
|
|
|
return;
|
1999-08-06 16:00:23 +04:00
|
|
|
}
|
|
|
|
|
2003-12-14 05:48:36 +03:00
|
|
|
static void
|
2004-01-03 04:50:52 +03:00
|
|
|
_wdc_ata_bio_start(struct wdc_channel *chp, struct ata_xfer *xfer)
|
1998-10-12 20:09:10 +04:00
|
|
|
{
|
2004-01-04 01:56:52 +03:00
|
|
|
struct wdc_softc *wdc = chp->ch_wdc;
|
2004-01-01 20:18:53 +03:00
|
|
|
struct ata_bio *ata_bio = xfer->c_cmd;
|
|
|
|
struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive];
|
2004-01-04 01:56:52 +03:00
|
|
|
int wait_flags = (xfer->c_flags & C_POLL) ? AT_POLL : 0;
|
1998-10-12 20:09:10 +04:00
|
|
|
u_int16_t cyl;
|
|
|
|
u_int8_t head, sect, cmd = 0;
|
|
|
|
int nblks;
|
|
|
|
int dma_flags = 0;
|
|
|
|
|
1999-08-06 16:00:23 +04:00
|
|
|
WDCDEBUG_PRINT(("_wdc_ata_bio_start %s:%d:%d\n",
|
2004-01-04 01:56:52 +03:00
|
|
|
wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive),
|
1999-08-06 16:00:23 +04:00
|
|
|
DEBUG_INTR | DEBUG_XFERS);
|
1998-10-12 20:09:10 +04:00
|
|
|
|
|
|
|
if (xfer->c_flags & C_DMA) {
|
2000-01-17 03:01:00 +03:00
|
|
|
if (drvp->n_xfers <= NXFER)
|
|
|
|
drvp->n_xfers++;
|
1998-10-12 20:09:10 +04:00
|
|
|
dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0;
|
2003-04-28 09:20:29 +04:00
|
|
|
if (ata_bio->flags & ATA_LBA48)
|
|
|
|
dma_flags |= WDC_DMA_LBA48;
|
1998-10-12 20:09:10 +04:00
|
|
|
}
|
|
|
|
again:
|
|
|
|
/*
|
|
|
|
*
|
|
|
|
* When starting a multi-sector transfer, or doing single-sector
|
|
|
|
* transfers...
|
|
|
|
*/
|
|
|
|
if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0) {
|
|
|
|
if (ata_bio->flags & ATA_SINGLE)
|
|
|
|
nblks = 1;
|
|
|
|
else
|
|
|
|
nblks = xfer->c_bcount / ata_bio->lp->d_secsize;
|
|
|
|
/* Check for bad sectors and adjust transfer, if necessary. */
|
|
|
|
if ((ata_bio->lp->d_flags & D_BADSECT) != 0) {
|
|
|
|
long blkdiff;
|
|
|
|
int i;
|
|
|
|
for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1;
|
|
|
|
i++) {
|
|
|
|
blkdiff -= ata_bio->blkno;
|
|
|
|
if (blkdiff < 0)
|
|
|
|
continue;
|
|
|
|
if (blkdiff == 0) {
|
|
|
|
/* Replace current block of transfer. */
|
|
|
|
ata_bio->blkno =
|
|
|
|
ata_bio->lp->d_secperunit -
|
|
|
|
ata_bio->lp->d_nsectors - i - 1;
|
|
|
|
}
|
|
|
|
if (blkdiff < nblks) {
|
|
|
|
/* Bad block inside transfer. */
|
|
|
|
ata_bio->flags |= ATA_SINGLE;
|
|
|
|
nblks = 1;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
/* Transfer is okay now. */
|
|
|
|
}
|
2002-01-13 20:24:28 +03:00
|
|
|
if (ata_bio->flags & ATA_LBA48) {
|
|
|
|
sect = 0;
|
|
|
|
cyl = 0;
|
|
|
|
head = 0;
|
|
|
|
} else if (ata_bio->flags & ATA_LBA) {
|
1998-10-12 20:09:10 +04:00
|
|
|
sect = (ata_bio->blkno >> 0) & 0xff;
|
|
|
|
cyl = (ata_bio->blkno >> 8) & 0xffff;
|
|
|
|
head = (ata_bio->blkno >> 24) & 0x0f;
|
|
|
|
head |= WDSD_LBA;
|
|
|
|
} else {
|
|
|
|
int blkno = ata_bio->blkno;
|
|
|
|
sect = blkno % ata_bio->lp->d_nsectors;
|
|
|
|
sect++; /* Sectors begin with 1, not 0. */
|
|
|
|
blkno /= ata_bio->lp->d_nsectors;
|
|
|
|
head = blkno % ata_bio->lp->d_ntracks;
|
|
|
|
blkno /= ata_bio->lp->d_ntracks;
|
|
|
|
cyl = blkno;
|
|
|
|
head |= WDSD_CHS;
|
|
|
|
}
|
|
|
|
if (xfer->c_flags & C_DMA) {
|
|
|
|
ata_bio->nblks = nblks;
|
|
|
|
ata_bio->nbytes = xfer->c_bcount;
|
|
|
|
cmd = (ata_bio->flags & ATA_READ) ?
|
|
|
|
WDCC_READDMA : WDCC_WRITEDMA;
|
|
|
|
/* Init the DMA channel. */
|
2004-01-04 01:56:52 +03:00
|
|
|
if ((*wdc->dma_init)(wdc->dma_arg,
|
|
|
|
chp->ch_channel, xfer->c_drive,
|
2004-01-01 20:18:53 +03:00
|
|
|
(char *)xfer->c_databuf + xfer->c_skip,
|
1999-01-08 21:10:35 +03:00
|
|
|
ata_bio->nbytes, dma_flags) != 0) {
|
1998-10-12 20:09:10 +04:00
|
|
|
ata_bio->error = ERR_DMA;
|
|
|
|
ata_bio->r_error = 0;
|
|
|
|
wdc_ata_bio_done(chp, xfer);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
/* Initiate command */
|
2004-01-04 01:56:52 +03:00
|
|
|
if (wdc->cap & WDC_CAPABILITY_SELECT)
|
|
|
|
wdc->select(chp, xfer->c_drive);
|
There are some cards that map the ATA control and IDE DMA registers
in a different fashion. Individually, they have the same functionality,
but their layout is different. An example of such a chipset is
the Promise 203xx.
To be able to deal with this, transform the cmd and dma bus_space handles
into an array of handles, each seperately created with bus_space_subregion.
The code generated by using the extra indirection shouldn't change much,
since the extra indirection is negated by having the offset calculation
already done in bus_space_subregion. E.g.
bus_space_write_4(tag, handle, offset, value)
becomes
bus_space_write_4(tag, handles[offset], 0, value)
Reviewed by Manuel Bouyer. Tested on wdc_isa, wdc_pcmcia, viaide, piixide (i386)
and on cmdide (sparc64).
2003-11-28 02:02:40 +03:00
|
|
|
bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh],
|
2004-01-01 20:18:53 +03:00
|
|
|
0, WDSD_IBM | (xfer->c_drive << 4));
|
2004-01-01 23:25:22 +03:00
|
|
|
switch(wdc_wait_for_ready(chp, ATA_DELAY, wait_flags)) {
|
2003-10-08 14:58:12 +04:00
|
|
|
case WDCWAIT_OK:
|
|
|
|
break;
|
|
|
|
case WDCWAIT_TOUT:
|
1998-10-12 20:09:10 +04:00
|
|
|
goto timeout;
|
2003-10-08 14:58:12 +04:00
|
|
|
case WDCWAIT_THR:
|
|
|
|
return;
|
|
|
|
}
|
2002-01-13 20:24:28 +03:00
|
|
|
if (ata_bio->flags & ATA_LBA48) {
|
2004-01-01 20:18:53 +03:00
|
|
|
wdccommandext(chp, xfer->c_drive, to48(cmd),
|
2002-01-13 20:24:28 +03:00
|
|
|
(u_int64_t)ata_bio->blkno, nblks);
|
|
|
|
} else {
|
2004-01-01 20:18:53 +03:00
|
|
|
wdccommand(chp, xfer->c_drive, cmd, cyl,
|
2002-01-13 20:24:28 +03:00
|
|
|
head, sect, nblks, 0);
|
|
|
|
}
|
1998-10-12 20:09:10 +04:00
|
|
|
/* start the DMA channel */
|
2004-01-04 01:56:52 +03:00
|
|
|
(*wdc->dma_start)(wdc->dma_arg,
|
|
|
|
chp->ch_channel, xfer->c_drive);
|
2000-04-01 18:32:22 +04:00
|
|
|
chp->ch_flags |= WDCF_DMA_WAIT;
|
2003-10-08 14:58:12 +04:00
|
|
|
/* start timeout machinery */
|
|
|
|
if ((xfer->c_flags & C_POLL) == 0)
|
|
|
|
callout_reset(&chp->ch_callout,
|
|
|
|
ATA_DELAY / 1000 * hz, wdctimeout, chp);
|
1998-10-12 20:09:10 +04:00
|
|
|
/* wait for irq */
|
|
|
|
goto intr;
|
|
|
|
} /* else not DMA */
|
|
|
|
ata_bio->nblks = min(nblks, ata_bio->multi);
|
|
|
|
ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize;
|
2004-06-22 23:20:14 +04:00
|
|
|
KASSERT(nblks == 1 || (ata_bio->flags & ATA_SINGLE) == 0);
|
|
|
|
if (ata_bio->nblks > 1) {
|
1998-10-12 20:09:10 +04:00
|
|
|
cmd = (ata_bio->flags & ATA_READ) ?
|
|
|
|
WDCC_READMULTI : WDCC_WRITEMULTI;
|
|
|
|
} else {
|
|
|
|
cmd = (ata_bio->flags & ATA_READ) ?
|
|
|
|
WDCC_READ : WDCC_WRITE;
|
|
|
|
}
|
|
|
|
/* Initiate command! */
|
2004-01-04 01:56:52 +03:00
|
|
|
if (wdc->cap & WDC_CAPABILITY_SELECT)
|
|
|
|
wdc->select(chp, xfer->c_drive);
|
There are some cards that map the ATA control and IDE DMA registers
in a different fashion. Individually, they have the same functionality,
but their layout is different. An example of such a chipset is
the Promise 203xx.
To be able to deal with this, transform the cmd and dma bus_space handles
into an array of handles, each seperately created with bus_space_subregion.
The code generated by using the extra indirection shouldn't change much,
since the extra indirection is negated by having the offset calculation
already done in bus_space_subregion. E.g.
bus_space_write_4(tag, handle, offset, value)
becomes
bus_space_write_4(tag, handles[offset], 0, value)
Reviewed by Manuel Bouyer. Tested on wdc_isa, wdc_pcmcia, viaide, piixide (i386)
and on cmdide (sparc64).
2003-11-28 02:02:40 +03:00
|
|
|
bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0,
|
2004-01-01 20:18:53 +03:00
|
|
|
WDSD_IBM | (xfer->c_drive << 4));
|
2004-01-01 23:25:22 +03:00
|
|
|
switch(wdc_wait_for_ready(chp, ATA_DELAY, wait_flags)) {
|
2003-10-08 14:58:12 +04:00
|
|
|
case WDCWAIT_OK:
|
|
|
|
break;
|
|
|
|
case WDCWAIT_TOUT:
|
1998-10-12 20:09:10 +04:00
|
|
|
goto timeout;
|
2003-10-08 14:58:12 +04:00
|
|
|
case WDCWAIT_THR:
|
|
|
|
return;
|
|
|
|
}
|
2002-01-13 20:24:28 +03:00
|
|
|
if (ata_bio->flags & ATA_LBA48) {
|
2004-01-01 20:18:53 +03:00
|
|
|
wdccommandext(chp, xfer->c_drive, to48(cmd),
|
2002-01-13 20:24:28 +03:00
|
|
|
(u_int64_t) ata_bio->blkno, nblks);
|
|
|
|
} else {
|
2004-01-01 20:18:53 +03:00
|
|
|
wdccommand(chp, xfer->c_drive, cmd, cyl,
|
2002-01-13 20:24:28 +03:00
|
|
|
head, sect, nblks,
|
|
|
|
(ata_bio->lp->d_type == DTYPE_ST506) ?
|
|
|
|
ata_bio->lp->d_precompcyl / 4 : 0);
|
|
|
|
}
|
2003-10-08 14:58:12 +04:00
|
|
|
/* start timeout machinery */
|
|
|
|
if ((xfer->c_flags & C_POLL) == 0)
|
|
|
|
callout_reset(&chp->ch_callout,
|
|
|
|
ATA_DELAY / 1000 * hz, wdctimeout, chp);
|
1998-10-12 20:09:10 +04:00
|
|
|
} else if (ata_bio->nblks > 1) {
|
|
|
|
/* The number of blocks in the last stretch may be smaller. */
|
|
|
|
nblks = xfer->c_bcount / ata_bio->lp->d_secsize;
|
|
|
|
if (ata_bio->nblks > nblks) {
|
|
|
|
ata_bio->nblks = nblks;
|
|
|
|
ata_bio->nbytes = xfer->c_bcount;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
/* If this was a write and not using DMA, push the data. */
|
|
|
|
if ((ata_bio->flags & ATA_READ) == 0) {
|
2003-10-08 14:58:12 +04:00
|
|
|
/*
|
|
|
|
* we have to busy-wait here, we can't rely on running in
|
|
|
|
* thread context.
|
|
|
|
*/
|
2004-01-01 23:25:22 +03:00
|
|
|
if (wdc_wait_for_drq(chp, ATA_DELAY, AT_POLL) != 0) {
|
1998-10-12 20:09:10 +04:00
|
|
|
printf("%s:%d:%d: timeout waiting for DRQ, "
|
|
|
|
"st=0x%02x, err=0x%02x\n",
|
2004-01-04 01:56:52 +03:00
|
|
|
wdc->sc_dev.dv_xname, chp->ch_channel,
|
2004-01-01 20:18:53 +03:00
|
|
|
xfer->c_drive, chp->ch_status, chp->ch_error);
|
1999-03-07 17:02:53 +03:00
|
|
|
if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR)
|
1998-10-12 20:09:10 +04:00
|
|
|
ata_bio->error = TIMEOUT;
|
|
|
|
wdc_ata_bio_done(chp, xfer);
|
|
|
|
return;
|
|
|
|
}
|
1999-03-07 17:02:53 +03:00
|
|
|
if (wdc_ata_err(drvp, ata_bio) == WDC_ATA_ERR) {
|
1998-10-12 20:09:10 +04:00
|
|
|
wdc_ata_bio_done(chp, xfer);
|
|
|
|
return;
|
|
|
|
}
|
2004-08-11 22:41:46 +04:00
|
|
|
wdc->dataout_pio(chp, drvp->drive_flags,
|
2004-08-11 21:49:27 +04:00
|
|
|
(char *)xfer->c_databuf + xfer->c_skip, ata_bio->nbytes);
|
1998-10-12 20:09:10 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
intr: /* Wait for IRQ (either real or polled) */
|
|
|
|
if ((ata_bio->flags & ATA_POLL) == 0) {
|
|
|
|
chp->ch_flags |= WDCF_IRQ_WAIT;
|
|
|
|
} else {
|
|
|
|
/* Wait for at last 400ns for status bit to be valid */
|
|
|
|
delay(1);
|
2000-04-01 18:32:22 +04:00
|
|
|
if (chp->ch_flags & WDCF_DMA_WAIT) {
|
|
|
|
wdc_dmawait(chp, xfer, ATA_DELAY);
|
|
|
|
chp->ch_flags &= ~WDCF_DMA_WAIT;
|
|
|
|
}
|
1999-04-02 01:46:28 +04:00
|
|
|
wdc_ata_bio_intr(chp, xfer, 0);
|
1998-10-12 20:09:10 +04:00
|
|
|
if ((ata_bio->flags & ATA_ITSDONE) == 0)
|
|
|
|
goto again;
|
|
|
|
}
|
|
|
|
return;
|
|
|
|
timeout:
|
|
|
|
printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n",
|
2004-01-04 01:56:52 +03:00
|
|
|
wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive,
|
1998-10-12 20:09:10 +04:00
|
|
|
chp->ch_status, chp->ch_error);
|
1999-03-07 17:02:53 +03:00
|
|
|
if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR)
|
1998-10-12 20:09:10 +04:00
|
|
|
ata_bio->error = TIMEOUT;
|
|
|
|
wdc_ata_bio_done(chp, xfer);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2003-12-14 05:48:36 +03:00
|
|
|
static int
|
2004-01-03 04:50:52 +03:00
|
|
|
wdc_ata_bio_intr(struct wdc_channel *chp, struct ata_xfer *xfer, int irq)
|
1998-10-12 20:09:10 +04:00
|
|
|
{
|
2004-01-04 01:56:52 +03:00
|
|
|
struct wdc_softc *wdc = chp->ch_wdc;
|
2004-01-01 20:18:53 +03:00
|
|
|
struct ata_bio *ata_bio = xfer->c_cmd;
|
|
|
|
struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive];
|
1998-10-12 20:09:10 +04:00
|
|
|
int drv_err;
|
|
|
|
|
|
|
|
WDCDEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n",
|
2004-01-04 01:56:52 +03:00
|
|
|
wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive),
|
1998-10-12 20:09:10 +04:00
|
|
|
DEBUG_INTR | DEBUG_XFERS);
|
|
|
|
|
|
|
|
|
|
|
|
/* Is it not a transfer, but a control operation? */
|
|
|
|
if (drvp->state < READY) {
|
|
|
|
printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n",
|
2004-01-04 01:56:52 +03:00
|
|
|
wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive,
|
1998-10-12 20:09:10 +04:00
|
|
|
drvp->state);
|
2002-09-27 19:35:29 +04:00
|
|
|
panic("wdc_ata_bio_intr: bad state");
|
1998-10-12 20:09:10 +04:00
|
|
|
}
|
|
|
|
|
1999-08-06 16:00:23 +04:00
|
|
|
/*
|
|
|
|
* if we missed an interrupt in a PIO transfer, reset and restart.
|
|
|
|
* Don't try to continue transfer, we may have missed cycles.
|
|
|
|
*/
|
|
|
|
if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) {
|
|
|
|
ata_bio->error = TIMEOUT;
|
|
|
|
wdc_ata_bio_done(chp, xfer);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
2004-01-01 23:25:22 +03:00
|
|
|
/* Ack interrupt done by wdc_wait_for_unbusy */
|
|
|
|
if (wdc_wait_for_unbusy(chp, (irq == 0) ? ATA_DELAY : 0, AT_POLL) < 0) {
|
1999-04-02 01:46:28 +04:00
|
|
|
if (irq && (xfer->c_flags & C_TIMEOU) == 0)
|
1999-03-25 19:17:36 +03:00
|
|
|
return 0; /* IRQ was not for us */
|
1998-10-12 20:09:10 +04:00
|
|
|
printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n",
|
2004-01-04 01:56:52 +03:00
|
|
|
wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive,
|
1998-10-12 20:09:10 +04:00
|
|
|
xfer->c_bcount, xfer->c_skip);
|
|
|
|
ata_bio->error = TIMEOUT;
|
|
|
|
wdc_ata_bio_done(chp, xfer);
|
|
|
|
return 1;
|
|
|
|
}
|
2004-01-04 01:56:52 +03:00
|
|
|
if (wdc->cap & WDC_CAPABILITY_IRQACK)
|
|
|
|
wdc->irqack(chp);
|
1998-10-12 20:09:10 +04:00
|
|
|
|
1999-03-07 17:02:53 +03:00
|
|
|
drv_err = wdc_ata_err(drvp, ata_bio);
|
1998-10-12 20:09:10 +04:00
|
|
|
|
|
|
|
/* If we were using DMA, Turn off the DMA channel and check for error */
|
|
|
|
if (xfer->c_flags & C_DMA) {
|
|
|
|
if (ata_bio->flags & ATA_POLL) {
|
|
|
|
/*
|
1999-01-29 14:36:20 +03:00
|
|
|
* IDE drives deassert WDCS_BSY before transfer is
|
1998-10-12 20:09:10 +04:00
|
|
|
* complete when using DMA. Polling for DRQ to deassert
|
2002-07-26 05:00:39 +04:00
|
|
|
* is not enough DRQ is not required to be
|
1998-11-11 22:38:27 +03:00
|
|
|
* asserted for DMA transfers, so poll for DRDY.
|
1998-10-12 20:09:10 +04:00
|
|
|
*/
|
|
|
|
if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY,
|
2003-10-08 14:58:12 +04:00
|
|
|
ATA_DELAY, ATA_POLL) == WDCWAIT_TOUT) {
|
1998-11-11 22:38:27 +03:00
|
|
|
printf("%s:%d:%d: polled transfer timed out "
|
2004-01-04 01:56:52 +03:00
|
|
|
"(st=0x%x)\n", wdc->sc_dev.dv_xname,
|
|
|
|
chp->ch_channel, xfer->c_drive,
|
2004-01-01 20:18:53 +03:00
|
|
|
chp->ch_status);
|
1998-10-12 20:09:10 +04:00
|
|
|
ata_bio->error = TIMEOUT;
|
1998-12-16 16:02:03 +03:00
|
|
|
drv_err = WDC_ATA_ERR;
|
|
|
|
}
|
|
|
|
}
|
2004-01-04 01:56:52 +03:00
|
|
|
if (wdc->dma_status != 0) {
|
1998-12-16 16:02:03 +03:00
|
|
|
if (drv_err != WDC_ATA_ERR) {
|
|
|
|
ata_bio->error = ERR_DMA;
|
|
|
|
drv_err = WDC_ATA_ERR;
|
1998-10-12 20:09:10 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
if (chp->ch_status & WDCS_DRQ) {
|
|
|
|
if (drv_err != WDC_ATA_ERR) {
|
|
|
|
printf("%s:%d:%d: intr with DRQ (st=0x%x)\n",
|
2004-01-04 01:56:52 +03:00
|
|
|
wdc->sc_dev.dv_xname, chp->ch_channel,
|
2004-01-01 20:18:53 +03:00
|
|
|
xfer->c_drive, chp->ch_status);
|
1998-10-12 20:09:10 +04:00
|
|
|
ata_bio->error = TIMEOUT;
|
|
|
|
drv_err = WDC_ATA_ERR;
|
|
|
|
}
|
|
|
|
}
|
2004-06-01 23:32:30 +04:00
|
|
|
if (ata_bio->r_error & WDCE_CRC)
|
|
|
|
ata_dmaerr(drvp, (xfer->c_flags & C_POLL) ? AT_POLL : 0);
|
1998-10-12 20:09:10 +04:00
|
|
|
if (drv_err != WDC_ATA_ERR)
|
|
|
|
goto end;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* if we had an error, end */
|
|
|
|
if (drv_err == WDC_ATA_ERR) {
|
|
|
|
wdc_ata_bio_done(chp, xfer);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* If this was a read and not using DMA, fetch the data. */
|
|
|
|
if ((ata_bio->flags & ATA_READ) != 0) {
|
1999-02-08 18:22:28 +03:00
|
|
|
if ((chp->ch_status & WDCS_DRQ) != WDCS_DRQ) {
|
1998-10-12 20:09:10 +04:00
|
|
|
printf("%s:%d:%d: read intr before drq\n",
|
2004-01-04 01:56:52 +03:00
|
|
|
wdc->sc_dev.dv_xname, chp->ch_channel,
|
2004-01-01 20:18:53 +03:00
|
|
|
xfer->c_drive);
|
1998-10-12 20:09:10 +04:00
|
|
|
ata_bio->error = TIMEOUT;
|
|
|
|
wdc_ata_bio_done(chp, xfer);
|
|
|
|
return 1;
|
|
|
|
}
|
2004-08-11 22:41:46 +04:00
|
|
|
wdc->datain_pio(chp, drvp->drive_flags,
|
2004-08-11 21:49:27 +04:00
|
|
|
(char *)xfer->c_databuf + xfer->c_skip, ata_bio->nbytes);
|
1998-10-12 20:09:10 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
end:
|
|
|
|
ata_bio->blkno += ata_bio->nblks;
|
|
|
|
ata_bio->blkdone += ata_bio->nblks;
|
|
|
|
xfer->c_skip += ata_bio->nbytes;
|
|
|
|
xfer->c_bcount -= ata_bio->nbytes;
|
|
|
|
/* See if this transfer is complete. */
|
|
|
|
if (xfer->c_bcount > 0) {
|
|
|
|
if ((ata_bio->flags & ATA_POLL) == 0) {
|
|
|
|
/* Start the next operation */
|
1999-08-06 16:00:23 +04:00
|
|
|
_wdc_ata_bio_start(chp, xfer);
|
1998-10-12 20:09:10 +04:00
|
|
|
} else {
|
1999-08-06 16:00:23 +04:00
|
|
|
/* Let _wdc_ata_bio_start do the loop */
|
1998-10-12 20:09:10 +04:00
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
} else { /* Done with this transfer */
|
|
|
|
ata_bio->error = NOERROR;
|
|
|
|
wdc_ata_bio_done(chp, xfer);
|
|
|
|
}
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
2003-12-14 05:48:36 +03:00
|
|
|
static void
|
2004-08-01 01:26:42 +04:00
|
|
|
wdc_ata_bio_kill_xfer(struct wdc_channel *chp, struct ata_xfer *xfer,
|
|
|
|
int reason)
|
1999-10-20 19:22:24 +04:00
|
|
|
{
|
2004-01-01 20:18:53 +03:00
|
|
|
struct ata_bio *ata_bio = xfer->c_cmd;
|
|
|
|
int drive = xfer->c_drive;
|
1999-10-20 19:22:24 +04:00
|
|
|
|
|
|
|
wdc_free_xfer(chp, xfer);
|
|
|
|
|
|
|
|
ata_bio->flags |= ATA_ITSDONE;
|
2004-08-01 01:26:42 +04:00
|
|
|
switch (reason) {
|
|
|
|
case KILL_GONE:
|
|
|
|
ata_bio->error = ERR_NODEV;
|
|
|
|
break;
|
|
|
|
case KILL_RESET:
|
|
|
|
ata_bio->error = ERR_RESET;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
printf("wdc_ata_bio_kill_xfer: unknown reason %d\n",
|
|
|
|
reason);
|
|
|
|
panic("wdc_ata_bio_kill_xfer");
|
|
|
|
}
|
1999-10-20 19:22:24 +04:00
|
|
|
ata_bio->r_error = WDCE_ABRT;
|
2003-12-14 08:33:29 +03:00
|
|
|
WDCDEBUG_PRINT(("wdc_ata_done: drv_done\n"), DEBUG_XFERS);
|
|
|
|
(*chp->ch_drive[drive].drv_done)(chp->ch_drive[drive].drv_softc);
|
1999-10-20 19:22:24 +04:00
|
|
|
}
|
|
|
|
|
2003-12-14 05:48:36 +03:00
|
|
|
static void
|
2004-01-03 04:50:52 +03:00
|
|
|
wdc_ata_bio_done(struct wdc_channel *chp, struct ata_xfer *xfer)
|
1998-10-12 20:09:10 +04:00
|
|
|
{
|
2004-01-04 01:56:52 +03:00
|
|
|
struct wdc_softc *wdc = chp->ch_wdc;
|
2004-01-01 20:18:53 +03:00
|
|
|
struct ata_bio *ata_bio = xfer->c_cmd;
|
|
|
|
int drive = xfer->c_drive;
|
1998-10-12 20:09:10 +04:00
|
|
|
|
1998-10-13 19:02:41 +04:00
|
|
|
WDCDEBUG_PRINT(("wdc_ata_bio_done %s:%d:%d: flags 0x%x\n",
|
2004-01-04 01:56:52 +03:00
|
|
|
wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive,
|
1998-10-13 19:02:41 +04:00
|
|
|
(u_int)xfer->c_flags),
|
1998-10-13 13:33:59 +04:00
|
|
|
DEBUG_XFERS);
|
1998-10-12 20:09:10 +04:00
|
|
|
|
2000-03-23 10:01:25 +03:00
|
|
|
callout_stop(&chp->ch_callout);
|
1998-12-16 16:02:03 +03:00
|
|
|
|
1998-10-12 20:09:10 +04:00
|
|
|
/* feed back residual bcount to our caller */
|
|
|
|
ata_bio->bcount = xfer->c_bcount;
|
|
|
|
|
2004-08-04 22:24:10 +04:00
|
|
|
/* mark controller inactive and free xfer */
|
|
|
|
chp->ch_queue->active_xfer = NULL;
|
1998-10-12 20:09:10 +04:00
|
|
|
wdc_free_xfer(chp, xfer);
|
|
|
|
|
2004-08-05 02:44:04 +04:00
|
|
|
if (chp->ch_drive[drive].drive_flags & DRIVE_WAITDRAIN) {
|
|
|
|
ata_bio->error = ERR_NODEV;
|
|
|
|
chp->ch_drive[drive].drive_flags &= ~DRIVE_WAITDRAIN;
|
|
|
|
wakeup(&chp->ch_queue->active_xfer);
|
|
|
|
}
|
1998-10-12 20:09:10 +04:00
|
|
|
ata_bio->flags |= ATA_ITSDONE;
|
2003-12-14 08:33:29 +03:00
|
|
|
WDCDEBUG_PRINT(("wdc_ata_done: drv_done\n"), DEBUG_XFERS);
|
|
|
|
(*chp->ch_drive[drive].drv_done)(chp->ch_drive[drive].drv_softc);
|
1998-10-12 20:09:10 +04:00
|
|
|
WDCDEBUG_PRINT(("wdcstart from wdc_ata_done, flags 0x%x\n",
|
1998-10-13 13:33:59 +04:00
|
|
|
chp->ch_flags), DEBUG_XFERS);
|
1998-11-21 18:41:41 +03:00
|
|
|
wdcstart(chp);
|
1998-10-12 20:09:10 +04:00
|
|
|
}
|
|
|
|
|
2003-12-14 05:48:36 +03:00
|
|
|
static int
|
2003-12-14 05:45:48 +03:00
|
|
|
wdc_ata_err(struct ata_drive_datas *drvp, struct ata_bio *ata_bio)
|
1998-10-12 20:09:10 +04:00
|
|
|
{
|
2004-01-03 04:50:52 +03:00
|
|
|
struct wdc_channel *chp = drvp->chnl_softc;
|
1998-10-12 20:09:10 +04:00
|
|
|
ata_bio->error = 0;
|
|
|
|
if (chp->ch_status & WDCS_BSY) {
|
|
|
|
ata_bio->error = TIMEOUT;
|
|
|
|
return WDC_ATA_ERR;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (chp->ch_status & WDCS_DWF) {
|
|
|
|
ata_bio->error = ERR_DF;
|
|
|
|
return WDC_ATA_ERR;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (chp->ch_status & WDCS_ERR) {
|
|
|
|
ata_bio->error = ERROR;
|
|
|
|
ata_bio->r_error = chp->ch_error;
|
|
|
|
if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF |
|
|
|
|
WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF))
|
|
|
|
return WDC_ATA_ERR;
|
|
|
|
return WDC_ATA_NOERR;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (chp->ch_status & WDCS_CORR)
|
|
|
|
ata_bio->flags |= ATA_CORR;
|
|
|
|
return WDC_ATA_NOERR;
|
|
|
|
}
|
1998-11-20 04:23:52 +03:00
|
|
|
|
2003-12-14 05:48:36 +03:00
|
|
|
static int
|
2003-12-14 05:45:48 +03:00
|
|
|
wdc_ata_addref(struct ata_drive_datas *drvp)
|
1998-11-20 04:23:52 +03:00
|
|
|
{
|
2004-01-03 04:50:52 +03:00
|
|
|
struct wdc_channel *chp = drvp->chnl_softc;
|
1998-11-20 04:23:52 +03:00
|
|
|
|
|
|
|
return (wdc_addref(chp));
|
|
|
|
}
|
|
|
|
|
2003-12-14 05:48:36 +03:00
|
|
|
static void
|
2003-12-14 05:45:48 +03:00
|
|
|
wdc_ata_delref(struct ata_drive_datas *drvp)
|
1998-11-20 04:23:52 +03:00
|
|
|
{
|
2004-01-03 04:50:52 +03:00
|
|
|
struct wdc_channel *chp = drvp->chnl_softc;
|
1998-11-20 04:23:52 +03:00
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|
|
|
|
|
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wdc_delref(chp);
|
|
|
|
}
|