- clearify the boot messages (features supported vs features used). Thanks to
Havard Eidnes for his complains about this :) - fix some typo in comments - hoppefully better detection of drives reporting bogus PIO modes.
This commit is contained in:
bouyer
parent
4f3cc30bcc
commit
1e71e76d6c
@ -1,4 +1,4 @@
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/* $NetBSD: ata_wdc.c,v 1.6 1998/10/13 15:18:46 bouyer Exp $ */
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/* $NetBSD: ata_wdc.c,v 1.7 1998/11/11 19:38:27 bouyer Exp $ */
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/*
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* Copyright (c) 1998 Manuel Bouyer.
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@ -426,11 +426,11 @@ wdc_ata_bio_intr(chp, xfer)
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* IDE drives deassert WDCS_BSY before trasfert is
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* complete when using DMA. Polling for DRQ to deassert
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* is not enouth DRQ is not required to be
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* asserted for DMA transferts, so poll for DRDY.
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* asserted for DMA transfers, so poll for DRDY.
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*/
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if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY,
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ATA_DELAY) < 0) {
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printf("%s:%d:%d: polled transfert timed out "
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printf("%s:%d:%d: polled transfer timed out "
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"(st=0x%x)\n", chp->wdc->sc_dev.dv_xname,
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chp->channel, xfer->drive, chp->ch_status);
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ata_bio->error = TIMEOUT;
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@ -1,4 +1,4 @@
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/* $NetBSD: wd.c,v 1.183 1998/10/20 17:00:25 bouyer Exp $ */
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/* $NetBSD: wd.c,v 1.184 1998/11/11 19:38:27 bouyer Exp $ */
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/*
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* Copyright (c) 1998 Manuel Bouyer. All rights reserved.
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@ -129,7 +129,7 @@ struct wd_softc {
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struct disk sc_dk;
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struct buf sc_q;
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/* IDE disk soft states */
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struct ata_bio sc_wdc_bio; /* current transfert */
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struct ata_bio sc_wdc_bio; /* current transfer */
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struct buf *sc_bp; /* buf being transfered */
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void *wdc_softc; /* pointer to our parent */
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struct ata_drive_datas *drvp; /* Our controller's infos */
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@ -264,8 +264,8 @@ wdattach(parent, self, aux)
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wd->sc_multi = 1;
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}
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printf("%s: using %d-sector pio transfers,", wd->sc_dev.dv_xname,
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wd->sc_multi);
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printf("%s: drive supports %d-sector pio transfers,",
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wd->sc_dev.dv_xname, wd->sc_multi);
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/* Prior to ATA-4, LBA was optional. */
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if ((wd->sc_params.atap_capabilities1 & WDC_CAP_LBA) != 0)
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@ -278,7 +278,7 @@ wdattach(parent, self, aux)
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#endif
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if ((wd->sc_flags & WDF_LBA) != 0) {
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printf(" lba mode\n");
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printf(" lba addressing\n");
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wd->sc_capacity =
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(wd->sc_params.atap_capacity[1] << 16) |
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wd->sc_params.atap_capacity[0];
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@ -292,7 +292,7 @@ wdattach(parent, self, aux)
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DEV_BSIZE,
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wd->sc_capacity);
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} else {
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printf(" chs mode\n");
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printf(" chs addressing\n");
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wd->sc_capacity =
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wd->sc_params.atap_cylinders *
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wd->sc_params.atap_heads *
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@ -423,7 +423,7 @@ __wdstart(wd, bp)
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/*
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* If we're retrying, retry in single-sector mode. This will give us
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* the sector number of the problem, and will eventually allow the
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* transfert to succeed.
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* transfer to succeed.
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*/
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if (wd->sc_multi == 1 || wd->retries > 0)
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wd->sc_wdc_bio.flags = ATA_SINGLE;
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@ -1,4 +1,4 @@
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/* $NetBSD: wdvar.h,v 1.2 1998/10/12 16:09:17 bouyer Exp $ */
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/* $NetBSD: wdvar.h,v 1.3 1998/11/11 19:38:27 bouyer Exp $ */
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/*
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* Copyright (c) 1998 Manuel Bouyer.
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@ -42,8 +42,8 @@ struct ata_bio {
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#define ATA_SINGLE 0x0008 /* transfer has to be done in single-sector mode */
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#define ATA_LBA 0x0010 /* tranfert uses LBA adressing */
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#define ATA_READ 0x0020 /* tranfert is a read (otherwise a write) */
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#define ATA_CORR 0x0040 /* transfert had a corrected error */
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int multi; /* number of blocks to transfert in multi-mode */
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#define ATA_CORR 0x0040 /* transfer had a corrected error */
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int multi; /* number of blocks to transfer in multi-mode */
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struct disklabel *lp; /* pointer to drive's label info */
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daddr_t blkno; /* block addr */
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daddr_t blkdone; /* number of blks transfered */
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@ -1,4 +1,4 @@
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/* $NetBSD: wdc.c,v 1.38 1998/10/21 09:12:46 bouyer Exp $ */
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/* $NetBSD: wdc.c,v 1.39 1998/11/11 19:38:27 bouyer Exp $ */
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/*
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@ -719,8 +719,8 @@ wdc_probe_caps(drvp)
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if ((wdc->cap & (WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32)) ==
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(WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32)) {
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/*
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* Controller claims 16 and 32 bit transferts.
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* Re-do an UDENTIFY with 32-bit transferts,
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* Controller claims 16 and 32 bit transfers.
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* Re-do an IDENTIFY with 32-bit transfers,
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* and compare results.
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*/
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drvp->drive_flags |= DRIVE_CAP32;
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@ -729,8 +729,7 @@ wdc_probe_caps(drvp)
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/* Not good. fall back to 16bits */
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drvp->drive_flags &= ~DRIVE_CAP32;
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} else {
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printf("%s: using 32-bits pio transfers\n",
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drv_dev->dv_xname);
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printf("%s: 32-bits data port\n", drv_dev->dv_xname);
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}
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}
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@ -749,10 +748,13 @@ wdc_probe_caps(drvp)
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* XXX some drives report something wrong here (they claim to
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* support PIO mode 8 !). As mode is coded on 3 bits in
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* SET FEATURE, limit it to 7 (so limit i to 4).
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* If higther mode than 7 is found, abort.
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*/
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for (i = 4; i >= 0; i--) {
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for (i = 7; i >= 0; i--) {
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if ((params.atap_piomode_supp & (1 << i)) == 0)
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continue;
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if (i > 4)
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return;
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/*
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* See if mode is accepted.
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* If the controller can't set its PIO mode,
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@ -764,8 +766,8 @@ wdc_probe_caps(drvp)
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AT_POLL) != CMD_OK)
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continue;
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if (!printed) {
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printf("%s: PIO mode %d", drv_dev->dv_xname,
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i + 3);
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printf("%s: drive supports PIO mode %d",
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drv_dev->dv_xname, i + 3);
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sep = ",";
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printed = 1;
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: pciide.c,v 1.14 1998/11/09 09:21:09 bouyer Exp $ */
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/* $NetBSD: pciide.c,v 1.15 1998/11/11 19:38:27 bouyer Exp $ */
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/*
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* Copyright (c) 1996, 1998 Christopher G. Demetriou. All rights reserved.
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@ -172,6 +172,7 @@ int pciide_dma_table_setup __P((struct pciide_softc*, int, int));
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int pciide_dma_init __P((void*, int, int, void *, size_t, int));
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void pciide_dma_start __P((void*, int, int, int));
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int pciide_dma_finish __P((void*, int, int, int));
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void pciide_print_modes __P((struct pciide_softc *));
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struct pciide_product_desc {
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u_int32_t ide_product;
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@ -499,8 +500,11 @@ pciide_attach(parent, self, aux)
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sc->sc_wdcdev.dma_finish = pciide_dma_finish;
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}
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}
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printf("\n");
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} else {
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printf("%s: pciide0: hardware does not support DMA",
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sc->sc_wdcdev.sc_dev.dv_xname);
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}
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printf("\n");
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sc->sc_pp->setup_cap(sc);
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sc->sc_wdcdev.channels = sc->wdc_channels;
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sc->sc_wdcdev.nchannels = PCIIDE_NUM_CHANNELS;
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@ -814,15 +818,14 @@ default_setup_chip(sc, pc, tag)
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if (pciide_dma_table_setup(sc, channel, drive) != 0) {
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/* Abort DMA setup */
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printf("%s:%d:%d: can't allocate DMA maps, "
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"using PIO transferts\n",
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"using PIO transfers\n",
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sc->sc_wdcdev.sc_dev.dv_xname,
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channel, drive);
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drvp->drive_flags &= ~DRIVE_DMA;
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}
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printf("%s:%d:%d: using DMA mode %d\n",
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printf("%s:%d:%d: using DMA data tranferts\n",
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sc->sc_wdcdev.sc_dev.dv_xname,
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channel, drive,
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drvp->DMA_mode);
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channel, drive);
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idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
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}
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if (idedma_ctl != 0) {
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@ -1002,15 +1005,8 @@ end: /*
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if ((drvp[drive].drive_flags & DRIVE) == 0)
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continue;
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idetim |= piix_setup_idetim_drvs(&drvp[drive]);
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printf("%s(%s:%d:%d): using PIO mode %d",
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drvp[drive].drv_softc->dv_xname,
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sc->sc_wdcdev.sc_dev.dv_xname,
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channel, drive, drvp[drive].PIO_mode);
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if (drvp[drive].drive_flags & DRIVE_DMA) {
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if (drvp[drive].drive_flags & DRIVE_DMA)
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idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
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printf(", DMA mode %d", drvp[drive].DMA_mode);
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}
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printf("\n");
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}
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if (idedma_ctl != 0) {
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/* Add software bits in status register */
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@ -1019,6 +1015,7 @@ end: /*
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idedma_ctl);
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}
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}
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pciide_print_modes(sc);
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WDCDEBUG_PRINT(("piix_setup_chip: idetim=0x%x, sidetim=0x%x\n",
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idetim, sidetim), DEBUG_PROBE);
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pci_conf_write(pc, tag, PIIX_IDETIM, idetim);
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@ -1110,15 +1107,6 @@ pio: /* use PIO mode */
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idetim =PIIX_IDETIM_SET(idetim,
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PIIX_IDETIM_SITRE, channel);
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}
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printf("%s(%s:%d:%d): using PIO mode %d",
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drvp->drv_softc->dv_xname,
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sc->sc_wdcdev.sc_dev.dv_xname,
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channel, drive, drvp->PIO_mode);
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if (drvp->drive_flags & DRIVE_DMA)
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printf(", DMA mode %d", drvp->DMA_mode);
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if (drvp->drive_flags & DRIVE_UDMA)
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printf(", UDMA mode %d", drvp->UDMA_mode);
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printf("\n");
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}
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if (idedma_ctl != 0) {
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/* Add software bits in status register */
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@ -1128,6 +1116,7 @@ pio: /* use PIO mode */
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}
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}
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pciide_print_modes(sc);
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WDCDEBUG_PRINT(("piix3_4_setup_chip: idetim=0x%x, sidetim=0x%x",
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idetim, sidetim), DEBUG_PROBE);
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if (sc->sc_wdcdev.cap & WDC_CAPABILITY_UDMA) {
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@ -1341,15 +1330,6 @@ pio: /* setup PIO mode */
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apollo_pio_rec[mode]);
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drvp->PIO_mode = mode;
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drvp->DMA_mode = mode - 2;
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printf("%s(%s:%d:%d): using PIO mode %d",
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drvp->drv_softc->dv_xname,
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sc->sc_wdcdev.sc_dev.dv_xname,
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channel, drive, drvp->PIO_mode);
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if (drvp[drive].drive_flags & DRIVE_DMA)
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printf(", DMA mode %d", drvp->DMA_mode);
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if (drvp->drive_flags & DRIVE_UDMA)
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printf(", UDMA mode %d", drvp->UDMA_mode);
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printf("\n");
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}
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if (idedma_ctl != 0) {
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/* Add software bits in status register */
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@ -1358,6 +1338,7 @@ pio: /* setup PIO mode */
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idedma_ctl);
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}
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}
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pciide_print_modes(sc);
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WDCDEBUG_PRINT(("apollo_setup_chip: APO_DATATIM=0x%x, APO_UDMA=0x%x\n",
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datatim_reg, udmatim_reg), DEBUG_PROBE);
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pci_conf_write(pc, tag, APO_DATATIM, datatim_reg);
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@ -1738,3 +1719,32 @@ pciide_dma_finish(v, channel, drive, flags)
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return 0;
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}
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void
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pciide_print_modes(sc)
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struct pciide_softc *sc;
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{
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int channel, drive;
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struct channel_softc *chp;
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struct ata_drive_datas *drvp;
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for (channel = 0; channel < PCIIDE_NUM_CHANNELS; channel++) {
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chp = &sc->wdc_channels[channel];
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for (drive = 0; drive < 2; drive++) {
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drvp = &chp->ch_drive[drive];
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if ((drvp->drive_flags & DRIVE) == 0)
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continue;
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printf("%s(%s:%d:%d): using PIO mode %d",
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drvp->drv_softc->dv_xname,
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sc->sc_wdcdev.sc_dev.dv_xname,
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channel, drive, drvp->PIO_mode);
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if (drvp->drive_flags & DRIVE_DMA)
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printf(", DMA mode %d", drvp->DMA_mode);
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if (drvp->drive_flags & DRIVE_UDMA)
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printf(", Ultra-DMA mode %d", drvp->UDMA_mode);
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if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA))
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printf(" (using DMA data transfers)");
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printf("\n");
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}
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}
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}
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