122 lines
3.8 KiB
C
122 lines
3.8 KiB
C
#include "unicorn_test.h"
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const uint64_t code_start = 0x10000000;
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const uint64_t code_len = 0x4000;
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static void uc_common_setup(uc_engine** uc, uc_arch arch, uc_mode mode, const char* code, uint64_t size) {
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OK(uc_open(arch, mode, uc));
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OK(uc_mem_map(*uc, code_start, code_len, UC_PROT_ALL));
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OK(uc_mem_write(*uc, code_start, code, size));
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}
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static void test_mips_el_ori() {
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uc_engine* uc;
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char code[] = "\x56\x34\x21\x34"; // ori $at, $at, 0x3456;
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int r_r1 = 0x6789;
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uc_common_setup(&uc, UC_ARCH_MIPS, UC_MODE_32 | UC_MODE_LITTLE_ENDIAN, code, sizeof(code) - 1);
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OK(uc_reg_write(uc, UC_MIPS_REG_1, &r_r1));
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OK(uc_emu_start(uc, code_start, code_start + sizeof(code) - 1, 0, 0));
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OK(uc_reg_read(uc, UC_MIPS_REG_1, &r_r1));
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TEST_CHECK(r_r1 == 0x77df);
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OK(uc_close(uc));
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}
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static void test_mips_eb_ori() {
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uc_engine* uc;
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char code[] = "\x34\x21\x34\x56"; // ori $at, $at, 0x3456;
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int r_r1 = 0x6789;
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uc_common_setup(&uc, UC_ARCH_MIPS, UC_MODE_32 | UC_MODE_BIG_ENDIAN, code, sizeof(code) - 1);
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OK(uc_reg_write(uc, UC_MIPS_REG_1, &r_r1));
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OK(uc_emu_start(uc, code_start, code_start + sizeof(code) - 1, 0, 0));
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OK(uc_reg_read(uc, UC_MIPS_REG_1, &r_r1));
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TEST_CHECK(r_r1 == 0x77df);
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OK(uc_close(uc));
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}
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static void test_mips_stop_at_branch() {
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uc_engine* uc;
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char code[] = "\x02\x00\x00\x08\x00\x00\x00\x00\x00\x00\x00\x00"; // j 0x8; nop;
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int r_pc = 0x0;
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uc_common_setup(&uc, UC_ARCH_MIPS, UC_MODE_32 | UC_MODE_LITTLE_ENDIAN, code, sizeof(code) - 1);
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// Execute one instruction with branch delay slot.
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OK(uc_emu_start(uc, code_start, code_start + sizeof(code) - 1, 0, 1));
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OK(uc_reg_read(uc, UC_MIPS_REG_PC, &r_pc));
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// Even if we just execute one instruction, the instruction in the
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// delay slot would also be executed.
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TEST_CHECK(r_pc == code_start + 0x8);
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OK(uc_close(uc));
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}
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static void test_mips_stop_at_delay_slot() {
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uc_engine* uc;
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char code[] = "\x02\x00\x00\x08\x00\x00\x00\x00\x00\x00\x00\x00"; // j 0x8; nop;
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int r_pc = 0x0;
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uc_common_setup(&uc, UC_ARCH_MIPS, UC_MODE_32 | UC_MODE_LITTLE_ENDIAN, code, sizeof(code) - 1);
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// Stop at the delay slot by design.
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OK(uc_emu_start(uc, code_start, code_start + 4, 0, 0));
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OK(uc_reg_read(uc, UC_MIPS_REG_PC, &r_pc));
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// The branch instruction isn't committed and the PC is not updated.
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// Users is responsible to restart emulation at the branch instruction.
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TEST_CHECK(r_pc == code_start);
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OK(uc_close(uc));
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}
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static void test_mips_lwx_exception_issue_1314() {
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uc_engine* uc;
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char code[] = "\x0a\xc8\x79\x7e"; // lwx $t9, $t9($s3)
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int reg;
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uc_common_setup(&uc, UC_ARCH_MIPS, UC_MODE_32 | UC_MODE_LITTLE_ENDIAN, code, sizeof(code) - 1);
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OK(uc_mem_map(uc, 0x10000, 0x4000, UC_PROT_ALL));
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// Enable DSP
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// https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00090-2B-MIPS32PRA-AFP-06.02.pdf
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OK(uc_reg_read(uc, UC_MIPS_REG_CP0_STATUS, ®));
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reg |= (1 << 24);
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OK(uc_reg_write(uc, UC_MIPS_REG_CP0_STATUS, ®));
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reg = 0;
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OK(uc_reg_write(uc, UC_MIPS_REG_1, ®));
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OK(uc_reg_write(uc, UC_MIPS_REG_T9, ®));
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reg = 0xdeadbeef;
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OK(uc_mem_write(uc, 0x10000, ®, 4));
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reg = 0x10000;
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OK(uc_reg_write(uc, UC_MIPS_REG_S3, ®));
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OK(uc_emu_start(uc, code_start, code_start + sizeof(code) - 1, 0, 0));
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OK(uc_reg_read(uc, UC_MIPS_REG_T9, ®));
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TEST_CHECK(reg == 0xdeadbeef);
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OK(uc_close(uc));
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}
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TEST_LIST = {
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{ "test_mips_stop_at_branch", test_mips_stop_at_branch },
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{ "test_mips_stop_at_delay_slot", test_mips_stop_at_delay_slot},
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{ "test_mips_el_ori", test_mips_el_ori},
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{ "test_mips_eb_ori", test_mips_eb_ori},
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{ "test_mips_lwx_exception_issue_1314", test_mips_lwx_exception_issue_1314},
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{ NULL, NULL }
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}; |