Chris Eagle
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e46545f722
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remove glib dependency by provide compatible replacements
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2016-12-18 14:56:58 -08:00 |
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Nguyen Anh Quynh
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b7cdbe7a88
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Merge branch 'feat/reg_save_restore' of https://github.com/rhelmot/unicorn into rhelmot-feat/reg_save_restore
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2016-10-07 09:57:07 +08:00 |
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Ryan Hileman
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cb615fdba7
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remove uc->cpus
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2016-09-23 07:38:21 -07:00 |
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Andrew Dutcher
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0ef2b5fd71
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New feature: registers can be bulk saved/restored in an opaque blob
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2016-08-20 04:14:07 -07:00 |
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Nguyen Anh Quynh
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cc6cbc5cf7
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Merge branch 'memleak' into m2
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2016-04-18 12:48:13 +08:00 |
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Ryan Hileman
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acd88856e1
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add batched reg access
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2016-04-04 20:51:38 -07:00 |
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Nguyen Anh Quynh
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fb1ebac000
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Merge branch 'master' into m1
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2016-03-09 15:13:42 +08:00 |
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Hiroyuki UEKAWA
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c5888e5670
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move macros in qemu/target-*/unicorn*.c to uc_priv.h
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2016-03-02 12:43:02 +09:00 |
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Hiroyuki UEKAWA
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1cd3c3093b
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fix WRITE_BYTE_H
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2016-03-02 10:51:50 +09:00 |
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Nguyen Anh Quynh
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20b01a6933
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fix merge conflict
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2016-02-01 12:08:38 +08:00 |
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danghvu
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36e53ad8a1
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Fix arm & arm64 memleaks
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2016-01-31 16:22:20 -06:00 |
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Nguyen Anh Quynh
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5a04bcb115
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allow to change PC during callback. this solves issue #210
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2016-01-28 14:06:17 +08:00 |
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Nguyen Anh Quynh
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c1dd9fbfdf
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arm64: handle SP register. this fixes issue #122
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2015-09-08 08:40:42 +08:00 |
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Nguyen Anh Quynh
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84e3b5c897
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cast all the values to write to registers in uc_reg_write() to unsigned type. this fixes issue #98
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2015-09-04 11:17:08 +08:00 |
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Jonathon Reinhart
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622d5cd5f9
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change uch to uc_struct (target-arm)
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2015-08-26 09:02:16 -04:00 |
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Jonathon Reinhart
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9163bba812
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restore mode of .[ch] files
These were marked as executable in 5c3b6819 , likely due to a Windows
filesystem being involved. This can be avoided:
http://stackoverflow.com/q/1580596/119527
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2015-08-24 21:19:12 -04:00 |
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Chris Eagle
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5c3b681945
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Add const to uc_reg_write and derivitives
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2015-08-24 09:42:50 -07:00 |
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mothran
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a167f7c456
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renames the register constants so unicorn and capstone can compile together
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2015-08-23 21:36:33 -07:00 |
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Nguyen Anh Quynh
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344d016104
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import
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2015-08-21 15:04:50 +08:00 |
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