change uch to uc_struct (target-arm)
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@ -10984,7 +10984,7 @@ static void disas_a64_insn(CPUARMState *env, DisasContext *s)
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// Unicorn: trace this instruction on request
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if (env->uc->hook_insn) {
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struct hook_struct *trace = hook_find((uch)s->uc, UC_HOOK_CODE, s->pc - 4);
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struct hook_struct *trace = hook_find(s->uc, UC_HOOK_CODE, s->pc - 4);
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if (trace)
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gen_uc_tracecode(tcg_ctx, 4, trace->callback, env->uc, s->pc - 4, trace->user_data);
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// if requested to emulate only some instructions, check if
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@ -11106,7 +11106,7 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu,
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// Unicorn: trace this block on request
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if (env->uc->hook_block) {
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struct hook_struct *trace = hook_find((uch)env->uc, UC_HOOK_BLOCK, pc_start);
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struct hook_struct *trace = hook_find(env->uc, UC_HOOK_BLOCK, pc_start);
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if (trace) {
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// save block address to see if we need to patch block size later
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env->uc->block_addr = pc_start;
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@ -7688,7 +7688,7 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn) // qq
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// Unicorn: trace this instruction on request
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if (s->uc->hook_insn) {
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struct hook_struct *trace = hook_find((uch)s->uc, UC_HOOK_CODE, s->pc - 4);
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struct hook_struct *trace = hook_find(s->uc, UC_HOOK_CODE, s->pc - 4);
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if (trace)
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gen_uc_tracecode(tcg_ctx, 4, trace->callback, s->uc, s->pc - 4, trace->user_data);
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// if requested to emulate only some instructions, check if
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@ -10411,7 +10411,7 @@ static void disas_thumb_insn(CPUARMState *env, DisasContext *s) // qq
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// Unicorn: trace this instruction on request
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if (env->uc->hook_insn) {
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struct hook_struct *trace = hook_find((uch)s->uc, UC_HOOK_CODE, s->pc);
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struct hook_struct *trace = hook_find(s->uc, UC_HOOK_CODE, s->pc);
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if (trace)
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gen_uc_tracecode(tcg_ctx, 2, trace->callback, env->uc, s->pc, trace->user_data);
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// if requested to emulate only some instructions, check to see
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@ -11229,7 +11229,7 @@ static inline void gen_intermediate_code_internal(ARMCPU *cpu,
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// Unicorn: trace this block on request
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if (env->uc->hook_block) {
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struct hook_struct *trace = hook_find((uch)env->uc, UC_HOOK_BLOCK, pc_start);
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struct hook_struct *trace = hook_find(env->uc, UC_HOOK_BLOCK, pc_start);
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if (trace) {
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// save block address to see if we need to patch block size later
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env->uc->block_addr = pc_start;
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@ -5,13 +5,13 @@
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#define UC_QEMU_TARGET_ARM_H
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// functions to read & write registers
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int arm_reg_read(uch handle, unsigned int regid, void *value);
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int arm_reg_write(uch handle, unsigned int regid, const void *value);
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int arm64_reg_read(uch handle, unsigned int regid, void *value);
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int arm64_reg_write(uch handle, unsigned int regid, const void *value);
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int arm_reg_read(struct uc_struct *uc, unsigned int regid, void *value);
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int arm_reg_write(struct uc_struct *uc, unsigned int regid, const void *value);
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int arm64_reg_read(struct uc_struct *uc, unsigned int regid, void *value);
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int arm64_reg_write(struct uc_struct *uc, unsigned int regid, const void *value);
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void arm_reg_reset(uch handle);
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void arm64_reg_reset(uch handle);
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void arm_reg_reset(struct uc_struct *uc);
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void arm64_reg_reset(struct uc_struct *uc);
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__attribute__ ((visibility ("default")))
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void arm_uc_init(struct uc_struct* uc);
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@ -25,23 +25,17 @@ static void arm64_set_pc(struct uc_struct *uc, uint64_t address)
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((CPUARMState *)uc->current_cpu->env_ptr)->pc = address;
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}
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void arm64_reg_reset(uch handle)
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void arm64_reg_reset(struct uc_struct *uc)
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{
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struct uc_struct *uc = (struct uc_struct *) handle;
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CPUArchState *env;
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env = first_cpu->env_ptr;
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CPUArchState *env = first_cpu->env_ptr;
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memset(env->xregs, 0, sizeof(env->xregs));
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env->pc = 0;
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}
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int arm64_reg_read(uch handle, unsigned int regid, void *value)
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int arm64_reg_read(struct uc_struct *uc, unsigned int regid, void *value)
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{
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CPUState *mycpu;
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struct uc_struct *uc = (struct uc_struct *) handle;
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mycpu = first_cpu;
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CPUState *mycpu = first_cpu;
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if (regid >= UC_ARM64_REG_X0 && regid <= UC_ARM64_REG_X28)
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*(int64_t *)value = ARM_CPU(uc, mycpu)->env.xregs[regid - UC_ARM64_REG_X0];
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@ -68,12 +62,9 @@ int arm64_reg_read(uch handle, unsigned int regid, void *value)
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#define WRITE_BYTE_H(x, b) (x = (x & ~0xff00) | (b & 0xff))
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#define WRITE_BYTE_L(x, b) (x = (x & ~0xff) | (b & 0xff))
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int arm64_reg_write(uch handle, unsigned int regid, const void *value)
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int arm64_reg_write(struct uc_struct *uc, unsigned int regid, const void *value)
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{
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CPUState *mycpu;
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struct uc_struct *uc = (struct uc_struct *) handle;
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mycpu = first_cpu;
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CPUState *mycpu = first_cpu;
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if (regid >= UC_ARM64_REG_X0 && regid <= UC_ARM64_REG_X28)
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ARM_CPU(uc, mycpu)->env.xregs[regid - UC_ARM64_REG_X0] = *(int64_t *)value;
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@ -25,9 +25,9 @@ static void arm_set_pc(struct uc_struct *uc, uint64_t address)
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((CPUARMState *)uc->current_cpu->env_ptr)->regs[15] = address;
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}
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void arm_reg_reset(uch handle)
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void arm_reg_reset(struct uc_struct *uc)
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{
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struct uc_struct *uc = (struct uc_struct *) handle;
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(void)uc;
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CPUArchState *env;
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env = first_cpu->env_ptr;
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@ -36,10 +36,9 @@ void arm_reg_reset(uch handle)
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env->pc = 0;
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}
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int arm_reg_read(uch handle, unsigned int regid, void *value)
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int arm_reg_read(struct uc_struct *uc, unsigned int regid, void *value)
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{
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CPUState *mycpu;
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struct uc_struct *uc = (struct uc_struct *) handle;
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mycpu = first_cpu;
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@ -78,12 +77,9 @@ int arm_reg_read(uch handle, unsigned int regid, void *value)
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#define WRITE_BYTE_H(x, b) (x = (x & ~0xff00) | (b & 0xff))
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#define WRITE_BYTE_L(x, b) (x = (x & ~0xff) | (b & 0xff))
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int arm_reg_write(uch handle, unsigned int regid, const void *value)
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int arm_reg_write(struct uc_struct *uc, unsigned int regid, const void *value)
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{
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CPUState *mycpu;
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struct uc_struct *uc = (struct uc_struct *) handle;
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mycpu = first_cpu;
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CPUState *mycpu = first_cpu;
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switch(uc->mode) {
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default:
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