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214 Commits

Author SHA1 Message Date
ζeh Matt
3a3bc0c22d Timeout error (#1173) 
* Implement timeout state and new error for such case

* Adjust test_i386_loop sample

* Adjust test_i386_loop test
 2019-12-29 00:16:54 +08:00
meta
ba74552199 Expose different 32-bit ARM CPU models to users via UC_MODE flags (#1165) 2019-10-26 05:01:00 +08:00
Azertinv
07f94ad1fc Added an invalid instruction hook (#1132) 
* first draft for an invalid instruction hook

* Fixed documentation on return value of invalid insn hook
 2019-09-23 01:53:06 +08:00
Chen Huitao
60896de9f4 add CMakeList.txt. build windows binary by using vs2019. (#1134) 
* add CMakeList.txt. build windows binary by using vs2019.

* remove macro redefinition warning.

* add nmake.bat.

* update CMakeLists.txt. build successfully on Ubuntu-1804-amd64.

* add CMakeList.txt. build windows binary by using vs2019.

* remove macro redefinition warning.

* add nmake.bat.

* update CMakeLists.txt. build successfully on Ubuntu-1804-amd64.

* Add build specific arch option.

* fix old MSVC inline and mipsel macro.

* add install target and option of embeded MSVCRT lib.

* add cmake.sh and document.

* add xwings and chenhuitao as programmer.

* fix COMPILE-CMAKE. rename txt to md.
 2019-09-08 16:42:43 +08:00
BAYET
8987ad0fff Handle serialization of cpu context save (#1129) 
* Handle the cpu context save in a more pythonic way, so the context can be serialized and reuse in an other process using the same emulator architecture and modes

* Fix type error ; mistakes a size_t uint64_t ; breaks in 32bit...
 2019-09-07 19:09:17 +08:00
kj.xwings.l
24f55a7973 Removed hardcoded CP0C3_ULRI (#1098) 
* activate CP0C3_ULRI for CONFIG3, mips

* updated with mips patches

* updated with mips patches

* remove hardcoded config3

* git ignore vscode

* fix spacing issue and turn on floating point
 2019-07-06 17:53:02 +08:00
yhql
3185128031 Add ARM MSP, PSP and CONTROL register access (#1071) 
Necessary for NVIC exception emulation from user.
 2019-03-07 08:37:27 +08:00
cfrantz
6c319941a5 Add support for the ARM IPSR register. (#1067) 
1. Create an enum name for the IPSR register.
2. Implement read and write of the IPSR via the xpsr helper functions.

Fixes #1065
 2019-02-28 09:55:27 +08:00
dmarxn
256e7782ce Added MXCSR register, fixed writing to FPUCW. (#1059) 
* Added MXCSR register for reading and writing

* Changed writing for fpucw register, now the qemu rounding status is updated as well
 2019-02-15 12:59:49 +08:00
Tasuku SUENAGA a.k.a. gunyarakun
da5f2fc883 Fix wrong register aliases on arm64 (#922) 2017-12-20 22:09:38 +08:00
Nguyen Anh Quynh
e6c27cfbd5 LGPL2 for all header files under include/unicorn/ 2017-12-16 10:08:42 +08:00
Nguyen Anh Quynh
fe466d003a callback to count number of instructions in uc_emu_start() should be executed first. fix #727 2017-06-16 13:22:38 +08:00
misson20000
3fdb2d2442 add architecture query (#842) 2017-05-21 09:47:02 +08:00
bulaza
14222bd5f0 Update UC_HOOK_MEM_VALID (#837) 
* Update UC_HOOK_MEM_VALID

UC_HOOK_MEM_READ fires before handlers for invalid memory reads, so UC_HOOK_MEM_VALID would technically also be receiving invalid memory reads. Switching to UC_HOOK_MEM_READ_AFTER ensures that only actually valid reads are hooked

* Removed macro change, added comment

Removed the macro change, but added a clarifying comment. May submit a future PR with a new macro added

* Update unicorn.h

will -> may

* Update unicorn.h
 2017-05-18 08:12:46 +07:00
misson20000
014ccfb94a Aarch64 add thread registers (#834) 
* add thread registers to AArch64

* update bindings to add AArch64 thread registers

* fix indentation for register read/write switch-case in unicorn_aarch64.c
 2017-05-14 14:42:49 +07:00
bulaza
476553223b Fixing issues with const_generator.py (#832) 2017-05-14 00:16:48 +07:00
bulaza
4b9efdc986 Adding INSN hook checks for x86 (#833) 
* adding INSN hook checking for x86

* tabs to spaces

* need to return bool not uc_err

* fixed conditional after switching to bool
 2017-05-14 00:16:17 +07:00
bulaza
e95edd37f3 Update unicorn.h (#821) 
Further clarifying the comments I PRed last week.
 2017-05-06 22:32:00 +08:00
Ryan Hileman
187b470245 add arm64 CPACR_EL1 register support (#814) 2017-05-02 14:51:19 +08:00
bulaza
c09a52e803 Update comments on UC_MEM_*_UNMAPPED (#811) 
Updated the comment on UC_MEM_*_UNMAPPED to clarify what happens if "true" is returned
 2017-04-27 09:29:01 +08:00
bulaza
f6908f03a9 Updated uc_close comment to clarify usage (#805) 2017-04-24 23:55:18 +08:00
Nguyen Anh Quynh
dd07ae607c bump extra version to 2 2017-04-21 15:30:40 +08:00
Nguyen Anh Quynh
e917c9de10 Merge branch 'master' into msvc2 2017-04-21 01:17:00 +08:00
Nguyen Anh Quynh
5dbc640b9a bump UC_VERSION_EXTRA to 1 2017-04-20 14:14:24 +08:00
Nguyen Anh Quynh
3b6779479e cleanup uc_priv.h 2017-03-30 15:59:13 +08:00
Nguyen Anh Quynh
094ca80092 fix conflicts 2017-03-30 12:23:24 +08:00
zhangwm
d8fe34a2e8 armeb: Add support for ARM big endian. 2017-03-13 22:32:44 +08:00
Nguyen Anh Quynh
c01dcf0a14 fix merge conflicts 2017-03-10 21:04:33 +08:00
Nguyen Anh Quynh
f4325f8c4e bindings: update to support X86 MSR id 2017-02-24 21:51:01 +08:00
Ahmed Samy
02e6c14e12 x86: add MSR API via reg API (#755) 
Writing / reading to model specific registers should be as easy as
calling a function, it's a bit stupid to write shell code and run them
just to write/read to a MSR, and even worse, you need more than just a
shellcode to read...

So, add a special register ID called UC_X86_REG_MSR, which should be
passed to uc_reg_write()/uc_reg_read() as the register ID, and then a
data structure which is uc_x86_msr (12 bytes), as the value (always), where:
	Byte	Value		Size
	0	MSR ID		4
	4       MSR val		8
 2017-02-24 21:37:19 +08:00
Nguyen Anh Quynh
6ea39f7d5a merge msvc with master 2017-02-24 10:39:36 +08:00
fG!
d5870ff47d Update unicorn.h (#753) 
Make it clear that only very few instructions can be hooked
 2017-02-21 10:22:17 +08:00
vardyh
7f9251511e MSVC port (vardyh) (#746) 
* unicorn: use waitable timer to implement usleep() on Windows

Signed-off-by: vardyh <vardyh.dev@gmail.com>

* atomic: implement barrier() for msvc

Signed-off-by: vardyh <vardyh.dev@gmail.com>
 2017-02-07 21:31:35 +08:00
Nguyen Anh Quynh
b616115df1 update ChangeLog 2017-01-25 12:00:18 +08:00
Parker Thompson
053ecd7bf4 Added ARM coproc registers (#684) 
* Added ARM coproc registers

* Added regression test for vfp
 2017-01-25 11:56:19 +08:00
xorstream
2a941e3efb Finalise MSVC port (#739) 
* Fix for MIPS issue.

* Sparc support added.

* M68K support added.

* Arm support ported.

* Fix issue with VS2015 shlobj.h file

* Arm issue fix.

* Finalise MSVC port.
 2017-01-24 22:09:33 +08:00
xorstream
8e45102b43 Arm support ported. (#736) 
* Fix for MIPS issue.

* Sparc support added.

* M68K support added.

* Arm support ported.

* Fix issue with VS2015 shlobj.h file
 2017-01-23 23:30:57 +08:00
Nguyen Anh Quynh
a0f7b526bd cleanup include/unicorn/*.h 2017-01-22 06:02:07 +08:00
xorstream
9fac29d154 Changed some MSVC compatibility defines based on MSVC version. (#724) 2017-01-21 20:21:27 +08:00
Nguyen Anh Quynh
e98a396e68 fix include path of platform.h 2017-01-21 11:31:29 +08:00
Nguyen Anh Quynh
330e7cb87b cleanup platform.h 2017-01-21 11:02:59 +08:00
xorstream
770c5616e2 Automated leading tab to spaces conversion. 2017-01-21 12:28:22 +11:00
xorstream
429bfca48e Fixes for MSVC native support to still work with GCC/GNU. 2017-01-21 01:07:10 +11:00
xorstream
fac6a66860 platform.h move #3 2017-01-21 00:13:21 +11:00
xorstream
f4b375c651 platform.h moved. 2017-01-21 00:03:50 +11:00
xorstream
b0ae2138fb Merge remote-tracking branch 'unicorn-engine/master' into msvc_native 2017-01-20 22:37:51 +11:00
xorstream
1fea4e6d87 Some small changes to clean up before pull request. 2017-01-20 22:34:14 +11:00
Nguyen Anh Quynh
c6de7930c9 remove mutex code 2017-01-20 15:44:03 +08:00
xorstream
92392e0f57 Merge with current master. 2017-01-20 18:22:28 +11:00
Nguyen Anh Quynh
42771848d6 no more spinlock 2017-01-20 14:57:33 +08:00