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armeb: rename arm's and mips's *REGS_STORAGE_SIZE to avoid big-endian and little-endian's duplicated definition.

This commit is contained in:
zhangwm 2017-03-15 22:25:35 +08:00
parent f144870adb
commit ccdb0ff523
14 changed files with 44 additions and 12 deletions
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1
.gitignore vendored
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@ -15,6 +15,7 @@ qemu/config-all-devices.mak
i386-softmmu/
arm-softmmu/
armeb-softmmu/
aarch64-softmmu/
mips-softmmu/
mips64-softmmu/

1
qemu/arm.h
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@ -3017,4 +3017,5 @@
#define xpsr_write xpsr_write_arm
#define xscale_cpar_write xscale_cpar_write_arm
#define xscale_cp_reginfo xscale_cp_reginfo_arm
#define ARM_REGS_STORAGE_SIZE ARM_REGS_STORAGE_SIZE_arm
#endif

1
qemu/armeb.h
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@ -3017,4 +3017,5 @@
#define xpsr_write xpsr_write_armeb
#define xscale_cpar_write xscale_cpar_write_armeb
#define xscale_cp_reginfo xscale_cp_reginfo_armeb
#define ARM_REGS_STORAGE_SIZE ARM_REGS_STORAGE_SIZE_armeb
#endif

2
qemu/gen_all_header.sh
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@ -1,4 +1,4 @@
#!/bin/sh
for d in x86_64 arm m68k aarch64 mips mipsel mips64 mips64el sparc sparc64; do
for d in x86_64 arm armeb m68k aarch64 mips mipsel mips64 mips64el sparc sparc64; do
python header_gen.py $d > $d.h
done

12
qemu/header_gen.py
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@ -3025,6 +3025,10 @@ symbols = (
'xscale_cp_reginfo'
)
arm_symbols = (
'ARM_REGS_STORAGE_SIZE',
)
mips_symbols = (
'cpu_mips_exec',
'cpu_mips_get_random',
@ -3931,7 +3935,9 @@ mips_symbols = (
'mips_reg_write',
'mips_tcg_init',
'mips_cpu_list',
'mips_release'
'mips_release',
'MIPS64_REGS_STORAGE_SIZE',
'MIPS_REGS_STORAGE_SIZE'
)
sparc_symbols = (
@ -4019,6 +4025,10 @@ if __name__ == '__main__':
for s in symbols:
print("#define %s %s_%s" %(s, s, arch))
if 'arm' in arch:
for s in arm_symbols:
print("#define %s %s_%s" %(s, s, arch))
if 'mips' in arch:
for s in mips_symbols:
print("#define %s %s_%s" %(s, s, arch))

2
qemu/mips.h
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@ -3923,4 +3923,6 @@
#define mips_tcg_init mips_tcg_init_mips
#define mips_cpu_list mips_cpu_list_mips
#define mips_release mips_release_mips
#define MIPS64_REGS_STORAGE_SIZE MIPS64_REGS_STORAGE_SIZE_mips
#define MIPS_REGS_STORAGE_SIZE MIPS_REGS_STORAGE_SIZE_mips
#endif

2
qemu/mips64.h
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@ -3923,4 +3923,6 @@
#define mips_tcg_init mips_tcg_init_mips64
#define mips_cpu_list mips_cpu_list_mips64
#define mips_release mips_release_mips64
#define MIPS64_REGS_STORAGE_SIZE MIPS64_REGS_STORAGE_SIZE_mips64
#define MIPS_REGS_STORAGE_SIZE MIPS_REGS_STORAGE_SIZE_mips64
#endif

2
qemu/mips64el.h
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@ -3923,4 +3923,6 @@
#define mips_tcg_init mips_tcg_init_mips64el
#define mips_cpu_list mips_cpu_list_mips64el
#define mips_release mips_release_mips64el
#define MIPS64_REGS_STORAGE_SIZE MIPS64_REGS_STORAGE_SIZE_mips64el
#define MIPS_REGS_STORAGE_SIZE MIPS_REGS_STORAGE_SIZE_mips64el
#endif

2
qemu/mipsel.h
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@ -3923,4 +3923,6 @@
#define mips_tcg_init mips_tcg_init_mipsel
#define mips_cpu_list mips_cpu_list_mipsel
#define mips_release mips_release_mipsel
#define MIPS64_REGS_STORAGE_SIZE MIPS64_REGS_STORAGE_SIZE_mipsel
#define MIPS_REGS_STORAGE_SIZE MIPS_REGS_STORAGE_SIZE_mipsel
#endif

3
qemu/target-arm/unicorn.h
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@ -20,7 +20,8 @@ void armeb_uc_init(struct uc_struct* uc);
__attribute__ ((visibility ("default")))
void arm64_uc_init(struct uc_struct* uc);
extern const int ARM_REGS_STORAGE_SIZE;
extern const int ARM_REGS_STORAGE_SIZE_arm;
extern const int ARM_REGS_STORAGE_SIZE_armeb;
extern const int ARM64_REGS_STORAGE_SIZE;
#endif

2
qemu/target-arm/unicorn_arm.c
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@ -9,9 +9,7 @@
#include "unicorn_common.h"
#include "uc_priv.h"
#ifndef TARGET_WORDS_BIGENDIAN
const int ARM_REGS_STORAGE_SIZE = offsetof(CPUARMState, tlb_table);
#endif
static void arm_set_pc(struct uc_struct *uc, uint64_t address)
{

3
qemu/target-mips/unicorn.c
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@ -9,14 +9,11 @@
#include "unicorn_common.h"
#include "uc_priv.h"
// prevent the lines from being compiled twice
#ifdef TARGET_WORDS_BIGENDIAN
#ifdef TARGET_MIPS64
const int MIPS64_REGS_STORAGE_SIZE = offsetof(CPUMIPSState, tlb_table);
#else // MIPS32
const int MIPS_REGS_STORAGE_SIZE = offsetof(CPUMIPSState, tlb_table);
#endif
#endif
#ifdef TARGET_MIPS64
typedef uint64_t mipsreg_t;

6
qemu/target-mips/unicorn.h
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@ -15,7 +15,9 @@ void mipsel_uc_init(struct uc_struct* uc);
void mips64_uc_init(struct uc_struct* uc);
void mips64el_uc_init(struct uc_struct* uc);
extern const int MIPS_REGS_STORAGE_SIZE;
extern const int MIPS64_REGS_STORAGE_SIZE;
extern const int MIPS_REGS_STORAGE_SIZE_mips;
extern const int MIPS_REGS_STORAGE_SIZE_mipsel;
extern const int MIPS64_REGS_STORAGE_SIZE_mips64;
extern const int MIPS64_REGS_STORAGE_SIZE_mips64el;
#endif

17
uc.c
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@ -1168,13 +1168,26 @@ static size_t cpu_context_size(uc_arch arch, uc_mode mode)
case UC_ARCH_X86: return X86_REGS_STORAGE_SIZE;
#endif
#ifdef UNICORN_HAS_ARM
case UC_ARCH_ARM: return ARM_REGS_STORAGE_SIZE;
case UC_ARCH_ARM: return mode & UC_MODE_BIG_ENDIAN ? ARM_REGS_STORAGE_SIZE_armeb : ARM_REGS_STORAGE_SIZE_arm;
#endif
#ifdef UNICORN_HAS_ARM64
case UC_ARCH_ARM64: return ARM64_REGS_STORAGE_SIZE;
#endif
#ifdef UNICORN_HAS_MIPS
case UC_ARCH_MIPS: return mode & UC_MODE_MIPS64 ? MIPS64_REGS_STORAGE_SIZE : MIPS_REGS_STORAGE_SIZE;
case UC_ARCH_MIPS:
if (mode & UC_MODE_MIPS64) {
if (mode & UC_MODE_BIG_ENDIAN) {
return MIPS64_REGS_STORAGE_SIZE_mips64;
} else {
return MIPS64_REGS_STORAGE_SIZE_mips64el;
}
} else {
if (mode & UC_MODE_BIG_ENDIAN) {
return MIPS_REGS_STORAGE_SIZE_mips;
} else {
return MIPS_REGS_STORAGE_SIZE_mipsel;
}
}
#endif
#ifdef UNICORN_HAS_SPARC
case UC_ARCH_SPARC: return mode & UC_MODE_SPARC64 ? SPARC64_REGS_STORAGE_SIZE : SPARC_REGS_STORAGE_SIZE;