From ccdb0ff5238912079575e2c94f44ab8161ce0980 Mon Sep 17 00:00:00 2001 From: zhangwm Date: Wed, 15 Mar 2017 22:25:35 +0800 Subject: [PATCH] armeb: rename arm's and mips's *REGS_STORAGE_SIZE to avoid big-endian and little-endian's duplicated definition. --- .gitignore | 1 + qemu/arm.h | 1 + qemu/armeb.h | 1 + qemu/gen_all_header.sh | 2 +- qemu/header_gen.py | 12 +++++++++++- qemu/mips.h | 2 ++ qemu/mips64.h | 2 ++ qemu/mips64el.h | 2 ++ qemu/mipsel.h | 2 ++ qemu/target-arm/unicorn.h | 3 ++- qemu/target-arm/unicorn_arm.c | 2 -- qemu/target-mips/unicorn.c | 3 --- qemu/target-mips/unicorn.h | 6 ++++-- uc.c | 17 +++++++++++++++-- 14 files changed, 44 insertions(+), 12 deletions(-) diff --git a/.gitignore b/.gitignore index 10d73b35..30240c01 100644 --- a/.gitignore +++ b/.gitignore @@ -15,6 +15,7 @@ qemu/config-all-devices.mak i386-softmmu/ arm-softmmu/ +armeb-softmmu/ aarch64-softmmu/ mips-softmmu/ mips64-softmmu/ diff --git a/qemu/arm.h b/qemu/arm.h index 5dcea42b..87d02032 100644 --- a/qemu/arm.h +++ b/qemu/arm.h @@ -3017,4 +3017,5 @@ #define xpsr_write xpsr_write_arm #define xscale_cpar_write xscale_cpar_write_arm #define xscale_cp_reginfo xscale_cp_reginfo_arm +#define ARM_REGS_STORAGE_SIZE ARM_REGS_STORAGE_SIZE_arm #endif diff --git a/qemu/armeb.h b/qemu/armeb.h index 3cfc4338..30b771b5 100644 --- a/qemu/armeb.h +++ b/qemu/armeb.h @@ -3017,4 +3017,5 @@ #define xpsr_write xpsr_write_armeb #define xscale_cpar_write xscale_cpar_write_armeb #define xscale_cp_reginfo xscale_cp_reginfo_armeb +#define ARM_REGS_STORAGE_SIZE ARM_REGS_STORAGE_SIZE_armeb #endif diff --git a/qemu/gen_all_header.sh b/qemu/gen_all_header.sh index 485d6360..3c627337 100755 --- a/qemu/gen_all_header.sh +++ b/qemu/gen_all_header.sh @@ -1,4 +1,4 @@ #!/bin/sh -for d in x86_64 arm m68k aarch64 mips mipsel mips64 mips64el sparc sparc64; do +for d in x86_64 arm armeb m68k aarch64 mips mipsel mips64 mips64el sparc sparc64; do python header_gen.py $d > $d.h done diff --git a/qemu/header_gen.py b/qemu/header_gen.py index f4702e67..b84af804 100644 --- a/qemu/header_gen.py +++ b/qemu/header_gen.py @@ -3025,6 +3025,10 @@ symbols = ( 'xscale_cp_reginfo' ) +arm_symbols = ( + 'ARM_REGS_STORAGE_SIZE', +) + mips_symbols = ( 'cpu_mips_exec', 'cpu_mips_get_random', @@ -3931,7 +3935,9 @@ mips_symbols = ( 'mips_reg_write', 'mips_tcg_init', 'mips_cpu_list', - 'mips_release' + 'mips_release', + 'MIPS64_REGS_STORAGE_SIZE', + 'MIPS_REGS_STORAGE_SIZE' ) sparc_symbols = ( @@ -4019,6 +4025,10 @@ if __name__ == '__main__': for s in symbols: print("#define %s %s_%s" %(s, s, arch)) + if 'arm' in arch: + for s in arm_symbols: + print("#define %s %s_%s" %(s, s, arch)) + if 'mips' in arch: for s in mips_symbols: print("#define %s %s_%s" %(s, s, arch)) diff --git a/qemu/mips.h b/qemu/mips.h index 99d0899d..36ad9a4d 100644 --- a/qemu/mips.h +++ b/qemu/mips.h @@ -3923,4 +3923,6 @@ #define mips_tcg_init mips_tcg_init_mips #define mips_cpu_list mips_cpu_list_mips #define mips_release mips_release_mips +#define MIPS64_REGS_STORAGE_SIZE MIPS64_REGS_STORAGE_SIZE_mips +#define MIPS_REGS_STORAGE_SIZE MIPS_REGS_STORAGE_SIZE_mips #endif diff --git a/qemu/mips64.h b/qemu/mips64.h index 139d9389..e464d4b3 100644 --- a/qemu/mips64.h +++ b/qemu/mips64.h @@ -3923,4 +3923,6 @@ #define mips_tcg_init mips_tcg_init_mips64 #define mips_cpu_list mips_cpu_list_mips64 #define mips_release mips_release_mips64 +#define MIPS64_REGS_STORAGE_SIZE MIPS64_REGS_STORAGE_SIZE_mips64 +#define MIPS_REGS_STORAGE_SIZE MIPS_REGS_STORAGE_SIZE_mips64 #endif diff --git a/qemu/mips64el.h b/qemu/mips64el.h index 62289de5..afe0d47f 100644 --- a/qemu/mips64el.h +++ b/qemu/mips64el.h @@ -3923,4 +3923,6 @@ #define mips_tcg_init mips_tcg_init_mips64el #define mips_cpu_list mips_cpu_list_mips64el #define mips_release mips_release_mips64el +#define MIPS64_REGS_STORAGE_SIZE MIPS64_REGS_STORAGE_SIZE_mips64el +#define MIPS_REGS_STORAGE_SIZE MIPS_REGS_STORAGE_SIZE_mips64el #endif diff --git a/qemu/mipsel.h b/qemu/mipsel.h index 147bda28..a04123e7 100644 --- a/qemu/mipsel.h +++ b/qemu/mipsel.h @@ -3923,4 +3923,6 @@ #define mips_tcg_init mips_tcg_init_mipsel #define mips_cpu_list mips_cpu_list_mipsel #define mips_release mips_release_mipsel +#define MIPS64_REGS_STORAGE_SIZE MIPS64_REGS_STORAGE_SIZE_mipsel +#define MIPS_REGS_STORAGE_SIZE MIPS_REGS_STORAGE_SIZE_mipsel #endif diff --git a/qemu/target-arm/unicorn.h b/qemu/target-arm/unicorn.h index cb3b3bb1..4918c477 100644 --- a/qemu/target-arm/unicorn.h +++ b/qemu/target-arm/unicorn.h @@ -20,7 +20,8 @@ void armeb_uc_init(struct uc_struct* uc); __attribute__ ((visibility ("default"))) void arm64_uc_init(struct uc_struct* uc); -extern const int ARM_REGS_STORAGE_SIZE; +extern const int ARM_REGS_STORAGE_SIZE_arm; +extern const int ARM_REGS_STORAGE_SIZE_armeb; extern const int ARM64_REGS_STORAGE_SIZE; #endif diff --git a/qemu/target-arm/unicorn_arm.c b/qemu/target-arm/unicorn_arm.c index d84da0ed..ea5a2276 100644 --- a/qemu/target-arm/unicorn_arm.c +++ b/qemu/target-arm/unicorn_arm.c @@ -9,9 +9,7 @@ #include "unicorn_common.h" #include "uc_priv.h" -#ifndef TARGET_WORDS_BIGENDIAN const int ARM_REGS_STORAGE_SIZE = offsetof(CPUARMState, tlb_table); -#endif static void arm_set_pc(struct uc_struct *uc, uint64_t address) { diff --git a/qemu/target-mips/unicorn.c b/qemu/target-mips/unicorn.c index 71f43608..0aa63391 100644 --- a/qemu/target-mips/unicorn.c +++ b/qemu/target-mips/unicorn.c @@ -9,14 +9,11 @@ #include "unicorn_common.h" #include "uc_priv.h" -// prevent the lines from being compiled twice -#ifdef TARGET_WORDS_BIGENDIAN #ifdef TARGET_MIPS64 const int MIPS64_REGS_STORAGE_SIZE = offsetof(CPUMIPSState, tlb_table); #else // MIPS32 const int MIPS_REGS_STORAGE_SIZE = offsetof(CPUMIPSState, tlb_table); #endif -#endif #ifdef TARGET_MIPS64 typedef uint64_t mipsreg_t; diff --git a/qemu/target-mips/unicorn.h b/qemu/target-mips/unicorn.h index 53b5c32a..b1c6cac8 100644 --- a/qemu/target-mips/unicorn.h +++ b/qemu/target-mips/unicorn.h @@ -15,7 +15,9 @@ void mipsel_uc_init(struct uc_struct* uc); void mips64_uc_init(struct uc_struct* uc); void mips64el_uc_init(struct uc_struct* uc); -extern const int MIPS_REGS_STORAGE_SIZE; -extern const int MIPS64_REGS_STORAGE_SIZE; +extern const int MIPS_REGS_STORAGE_SIZE_mips; +extern const int MIPS_REGS_STORAGE_SIZE_mipsel; +extern const int MIPS64_REGS_STORAGE_SIZE_mips64; +extern const int MIPS64_REGS_STORAGE_SIZE_mips64el; #endif diff --git a/uc.c b/uc.c index cc91b1ef..a40ccd35 100644 --- a/uc.c +++ b/uc.c @@ -1168,13 +1168,26 @@ static size_t cpu_context_size(uc_arch arch, uc_mode mode) case UC_ARCH_X86: return X86_REGS_STORAGE_SIZE; #endif #ifdef UNICORN_HAS_ARM - case UC_ARCH_ARM: return ARM_REGS_STORAGE_SIZE; + case UC_ARCH_ARM: return mode & UC_MODE_BIG_ENDIAN ? ARM_REGS_STORAGE_SIZE_armeb : ARM_REGS_STORAGE_SIZE_arm; #endif #ifdef UNICORN_HAS_ARM64 case UC_ARCH_ARM64: return ARM64_REGS_STORAGE_SIZE; #endif #ifdef UNICORN_HAS_MIPS - case UC_ARCH_MIPS: return mode & UC_MODE_MIPS64 ? MIPS64_REGS_STORAGE_SIZE : MIPS_REGS_STORAGE_SIZE; + case UC_ARCH_MIPS: + if (mode & UC_MODE_MIPS64) { + if (mode & UC_MODE_BIG_ENDIAN) { + return MIPS64_REGS_STORAGE_SIZE_mips64; + } else { + return MIPS64_REGS_STORAGE_SIZE_mips64el; + } + } else { + if (mode & UC_MODE_BIG_ENDIAN) { + return MIPS_REGS_STORAGE_SIZE_mips; + } else { + return MIPS_REGS_STORAGE_SIZE_mipsel; + } + } #endif #ifdef UNICORN_HAS_SPARC case UC_ARCH_SPARC: return mode & UC_MODE_SPARC64 ? SPARC64_REGS_STORAGE_SIZE : SPARC_REGS_STORAGE_SIZE;