Merge pull request #1504 from Kritzefitz/rust-riscv-registers
rust: Add RISCV CSR registers
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commit
c190069b10
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@ -41,41 +41,168 @@ pub enum RegisterRISCV {
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X30 = 31,
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X31 = 32,
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// CSR
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USTATUS = 33,
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UIE = 34,
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UTVEC = 35,
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USCRATCH = 36,
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UEPC = 37,
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UCAUSE = 38,
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UTVAL = 39,
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UIP = 40,
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FFLAGS = 41,
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FRM = 42,
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FCSR = 43,
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CYCLE = 44,
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TIME = 45,
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INSTRET = 46,
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HPMCOUNTER3 = 47,
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HPMCOUNTER4 = 48,
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HPMCOUNTER5 = 49,
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HPMCOUNTER6 = 50,
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HPMCOUNTER7 = 51,
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HPMCOUNTER8 = 52,
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HPMCOUNTER9 = 53,
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HPMCOUNTER10 = 54,
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HPMCOUNTER11 = 55,
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HPMCOUNTER12 = 56,
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HPMCOUNTER13 = 57,
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HPMCOUNTER14 = 58,
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HPMCOUNTER15 = 59,
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HPMCOUNTER16 = 60,
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HPMCOUNTER17 = 61,
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HPMCOUNTER18 = 62,
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HPMCOUNTER19 = 63,
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HPMCOUNTER20 = 64,
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HPMCOUNTER21 = 65,
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HPMCOUNTER22 = 66,
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HPMCOUNTER23 = 67,
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HPMCOUNTER24 = 68,
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HPMCOUNTER25 = 69,
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HPMCOUNTER26 = 70,
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HPMCOUNTER27 = 71,
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HPMCOUNTER28 = 72,
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HPMCOUNTER29 = 73,
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HPMCOUNTER30 = 74,
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HPMCOUNTER31 = 75,
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CYCLEH = 76,
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TIMEH = 77,
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INSTRETH = 78,
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HPMCOUNTER3H = 79,
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HPMCOUNTER4H = 80,
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HPMCOUNTER5H = 81,
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HPMCOUNTER6H = 82,
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HPMCOUNTER7H = 83,
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HPMCOUNTER8H = 84,
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HPMCOUNTER9H = 85,
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HPMCOUNTER10H = 86,
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HPMCOUNTER11H = 87,
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HPMCOUNTER12H = 88,
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HPMCOUNTER13H = 89,
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HPMCOUNTER14H = 90,
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HPMCOUNTER15H = 91,
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HPMCOUNTER16H = 92,
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HPMCOUNTER17H = 93,
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HPMCOUNTER18H = 94,
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HPMCOUNTER19H = 95,
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HPMCOUNTER20H = 96,
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HPMCOUNTER21H = 97,
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HPMCOUNTER22H = 98,
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HPMCOUNTER23H = 99,
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HPMCOUNTER24H = 100,
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HPMCOUNTER25H = 101,
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HPMCOUNTER26H = 102,
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HPMCOUNTER27H = 103,
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HPMCOUNTER28H = 104,
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HPMCOUNTER29H = 105,
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HPMCOUNTER30H = 106,
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HPMCOUNTER31H = 107,
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MCYCLE = 108,
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MINSTRET = 109,
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MCYCLEH = 110,
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MINSTRETH = 111,
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MVENDORID = 112,
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MARCHID = 113,
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MIMPID = 114,
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MHARTID = 115,
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MSTATUS = 116,
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MISA = 117,
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MEDELEG = 118,
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MIDELEG = 119,
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MIE = 120,
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MTVEC = 121,
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MCOUNTEREN = 122,
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MSTATUSH = 123,
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MUCOUNTEREN = 124,
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MSCOUNTEREN = 125,
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MHCOUNTEREN = 126,
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MSCRATCH = 127,
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MEPC = 128,
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MCAUSE = 129,
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MTVAL = 130,
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MIP = 131,
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MBADADDR = 132,
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SSTATUS = 133,
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SEDELEG = 134,
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SIDELEG = 135,
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SIE = 136,
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STVEC = 137,
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SCOUNTEREN = 138,
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SSCRATCH = 139,
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SEPC = 140,
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SCAUSE = 141,
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STVAL = 142,
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SIP = 143,
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SBADADDR = 144,
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SPTBR = 145,
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SATP = 146,
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HSTATUS = 147,
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HEDELEG = 148,
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HIDELEG = 149,
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HIE = 150,
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HCOUNTEREN = 151,
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HTVAL = 152,
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HIP = 153,
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HTINST = 154,
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HGATP = 155,
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HTIMEDELTA = 156,
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HTIMEDELTAH = 157,
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// Floating-point registers
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F0 = 33,
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F1 = 34,
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F2 = 35,
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F3 = 36,
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F4 = 37,
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F5 = 38,
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F6 = 39,
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F7 = 40,
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F8 = 41,
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F9 = 42,
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F10 = 43,
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F11 = 44,
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F12 = 45,
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F13 = 46,
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F14 = 47,
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F15 = 48,
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F16 = 49,
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F17 = 50,
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F18 = 51,
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F19 = 52,
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F20 = 53,
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F21 = 54,
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F22 = 55,
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F23 = 56,
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F24 = 57,
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F25 = 58,
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F26 = 59,
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F27 = 60,
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F28 = 61,
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F29 = 62,
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F30 = 63,
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F31 = 64,
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PC = 65,
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ENDING = 66,
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F0 = 158,
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F1 = 159,
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F2 = 160,
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F3 = 161,
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F4 = 162,
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F5 = 163,
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F6 = 164,
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F7 = 165,
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F8 = 166,
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F9 = 167,
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F10 = 168,
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F11 = 169,
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F12 = 170,
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F13 = 171,
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F14 = 172,
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F15 = 173,
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F16 = 174,
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F17 = 175,
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F18 = 176,
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F19 = 177,
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F20 = 178,
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F21 = 179,
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F22 = 180,
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F23 = 181,
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F24 = 182,
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F25 = 183,
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F26 = 184,
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F27 = 185,
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F28 = 186,
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F29 = 187,
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F30 = 188,
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F31 = 189,
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PC = 190,
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ENDING = 191,
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}
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impl RegisterRISCV {
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