i386 call internal helper on special porpese register write
Some registers writes have side effects. i.e. write to cr3 flush the tlb, if the PG bit is set.
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@ -977,10 +977,16 @@ static int reg_write(CPUX86State *env, unsigned int regid, const void *value,
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default:
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break;
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case UC_X86_REG_CR0:
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cpu_x86_update_cr0(env, *(uint32_t *)value);
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goto write_cr;
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case UC_X86_REG_CR1:
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case UC_X86_REG_CR2:
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case UC_X86_REG_CR3:
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cpu_x86_update_cr3(env, *(uint32_t *)value);
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goto write_cr;
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case UC_X86_REG_CR4:
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cpu_x86_update_cr4(env, *(uint32_t *)value);
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write_cr:
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env->cr[regid - UC_X86_REG_CR0] = *(uint32_t *)value;
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break;
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case UC_X86_REG_DR0:
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@ -1163,10 +1169,16 @@ static int reg_write(CPUX86State *env, unsigned int regid, const void *value,
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default:
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break;
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case UC_X86_REG_CR0:
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cpu_x86_update_cr0(env, *(uint32_t *) value);
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goto write_cr64;
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case UC_X86_REG_CR1:
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case UC_X86_REG_CR2:
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case UC_X86_REG_CR3:
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cpu_x86_update_cr3(env, *(uint32_t *) value);
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goto write_cr64;
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case UC_X86_REG_CR4:
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cpu_x86_update_cr4(env, *(uint32_t *) value);
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write_cr64:
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env->cr[regid - UC_X86_REG_CR0] = *(uint64_t *)value;
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break;
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case UC_X86_REG_DR0:
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