commit
051ae39f08
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@ -386,6 +386,10 @@ static inline bool cpu_handle_exception(CPUState *cpu, int *ret)
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#if defined(TARGET_RISCV)
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CPURISCVState *env = &(RISCV_CPU(uc->cpu)->env);
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env->pc += 4;
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#endif
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#if defined(TARGET_PPC)
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CPUPPCState *env = &(POWERPC_CPU(uc->cpu)->env);
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env->nip += 4;
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#endif
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// Unicorn: call registered interrupt callbacks
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catched = false;
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@ -63,6 +63,33 @@ static void test_ppc32_fadd()
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OK(uc_close(uc));
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}
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static void test_ppc32_sc_cb(uc_engine *uc, uint32_t intno, void *data)
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{
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uc_emu_stop(uc);
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return;
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}
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static void test_ppc32_sc()
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{
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uc_engine *uc;
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char code[] = "\x44\x00\x00\x02"; // sc
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uint32_t r_pc;
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uc_hook h;
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uc_common_setup(&uc, UC_ARCH_PPC, UC_MODE_32 | UC_MODE_BIG_ENDIAN, code,
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sizeof(code) - 1);
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OK(uc_hook_add(uc, &h, UC_HOOK_INTR, test_ppc32_sc_cb, NULL, 1, 0));
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OK(uc_emu_start(uc, code_start, code_start + sizeof(code) - 1, 0, 0));
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OK(uc_reg_read(uc, UC_PPC_REG_PC, &r_pc));
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TEST_CHECK(r_pc == code_start + 4);
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OK(uc_close(uc));
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}
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TEST_LIST = {{"test_ppc32_add", test_ppc32_add},
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{"test_ppc32_fadd", test_ppc32_fadd},
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{"test_ppc32_sc", test_ppc32_sc},
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{NULL, NULL}};
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