qemu/target/ppc/translate
Nicholas Piggin 2cc0e449d1 target/ppc: Fix lxv/stxv MSR facility check
The move to decodetree flipped the inequality test for the VEC / VSX
MSR facility check.

This caused application crashes under Linux, where these facility
unavailable interrupts are used for lazy-switching of VEC/VSX register
sets. Getting the incorrect interrupt would result in wrong registers
being loaded, potentially overwriting live values and/or exposing
stale ones.

Cc: qemu-stable@nongnu.org
Reported-by: Joel Stanley <joel@jms.id.au>
Fixes: 70426b5bb7 ("target/ppc: moved stxvx and lxvx from legacy to decodtree")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1769
Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Tested-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Tested-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-02-23 23:16:34 +10:00
..
branch-impl.c.inc tcg: Rename cpu_env to tcg_env 2023-10-03 08:01:02 -07:00
dfp-impl.c.inc tcg: Rename cpu_env to tcg_env 2023-10-03 08:01:02 -07:00
fixedpoint-impl.c.inc tcg: Rename cpu_env to tcg_env 2023-10-03 08:01:02 -07:00
fp-impl.c.inc tcg: Rename cpu_env to tcg_env 2023-10-03 08:01:02 -07:00
fp-ops.c.inc
processor-ctrl-impl.c.inc tcg: Rename cpu_env to tcg_env 2023-10-03 08:01:02 -07:00
spe-impl.c.inc tcg: Rename cpu_env to tcg_env 2023-10-03 08:01:02 -07:00
spe-ops.c.inc
storage-ctrl-impl.c.inc tcg: Rename cpu_env to tcg_env 2023-10-03 08:01:02 -07:00
vmx-impl.c.inc ppc: correct typos 2024-02-20 22:21:25 +03:00
vmx-ops.c.inc
vsx-impl.c.inc target/ppc: Fix lxv/stxv MSR facility check 2024-02-23 23:16:34 +10:00
vsx-ops.c.inc