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Babu Moger fe52acd2a0 i386: Initialize cache information for EPYC family processors 
Initialize pre-determined cache information for EPYC processors.

Signed-off-by: Babu Moger <babu.moger@amd.com>
Tested-by: Geoffrey McRae <geoff@hostfission.com>
Message-Id: <20180510204148.11687-5-babu.moger@amd.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2018-05-15 11:33:33 -03:00
..
alpha
translator: merge max_insns into DisasContextBase
2018-05-09 10:12:21 -07:00
arm
target-arm queue:
2018-05-11 17:41:54 +01:00
cris
* Don't silently truncate extremely long words in the command line
2018-05-14 09:55:09 +01:00
hppa
translator: merge max_insns into DisasContextBase
2018-05-09 10:12:21 -07:00
i386
i386: Initialize cache information for EPYC family processors
2018-05-15 11:33:33 -03:00
lm32
target/lm32: avoid integer overflow in next_page PC check
2018-05-09 10:12:21 -07:00
m68k
m68k: fix floatx80_mod() (Coverity CID1390568)
2018-05-14 19:13:07 +02:00
microblaze
target/microblaze: avoid integer overflow in next_page PC check
2018-05-09 10:12:21 -07:00
mips
* Don't silently truncate extremely long words in the command line
2018-05-14 09:55:09 +01:00
moxie
icount: fix cpu_restore_state_from_tb for non-tb-exit cases
2018-04-11 09:05:22 +10:00
nios2
cpu: get rid of unused cpu_init() defines
2018-03-19 14:10:36 -03:00
openrisc
target/openrisc: Merge disas_openrisc_insn
2018-05-14 14:58:08 -07:00
ppc
* Don't silently truncate extremely long words in the command line
2018-05-14 09:55:09 +01:00
riscv
target-arm queue:
2018-05-11 17:41:54 +01:00
s390x
target/s390x: Fix brace Werror with clang 6.0.0
2018-05-14 17:10:02 +02:00
sh4
target/sh4: convert to TranslatorOps
2018-05-09 10:12:21 -07:00
sparc
target/sparc: convert to TranslatorOps
2018-05-09 10:12:21 -07:00
tilegx
target/tilegx: avoid integer overflow in next_page PC check
2018-05-09 10:12:21 -07:00
tricore
icount: fix cpu_restore_state_from_tb for non-tb-exit cases
2018-04-11 09:05:22 +10:00
unicore32
target/unicore32: avoid integer overflow in next_page PC check
2018-05-09 10:12:21 -07:00
xtensa
target-arm queue:
2018-05-11 17:41:54 +01:00