Jonathan Cameron 4a58330343 hw/cxl: Add a switch mailbox CCI function ... CXL switch CCIs were added in CXL r3.0. They are a PCI function, identified by class code that provides a CXL mailbox (identical to that previously defined for CXL type 3 memory devices) over which various FM-API commands may be used. Whilst the intent of this feature is enable switch control from a BMC attached to a switch upstream port, it is also useful to allow emulation of this feature on the upstream port connected to a host using the CXL devices as this greatly simplifies testing. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20231023160806.13206-7-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>		2023-11-07 03:39:11 -05:00
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cxl_upstream_port.h	hw/cxl: Add a switch mailbox CCI function	2023-11-07 03:39:11 -05:00
pci_expander_bridge.h	pci/pci_expander_bridge: For CXL HB delay the HB register memory region setup.	2022-06-09 19:32:49 -04:00
simba.h
xio3130_downstream.h	pci: expose TYPE_XIO3130_DOWNSTREAM name	2022-03-06 05:08:23 -05:00