pci: expose TYPE_XIO3130_DOWNSTREAM name

Type name will be used in followup patch for cast check
in pcihp code.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20220301151200.3507298-2-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Igor Mammedov 2022-03-01 10:11:58 -05:00 committed by Michael S. Tsirkin
parent ad003b9e68
commit c41481af9a
2 changed files with 17 additions and 1 deletions

View File

@ -28,6 +28,7 @@
#include "migration/vmstate.h"
#include "qapi/error.h"
#include "qemu/module.h"
#include "hw/pci-bridge/xio3130_downstream.h"
#define PCI_DEVICE_ID_TI_XIO3130D 0x8233 /* downstream port */
#define XIO3130_REVISION 0x1
@ -173,7 +174,7 @@ static void xio3130_downstream_class_init(ObjectClass *klass, void *data)
}
static const TypeInfo xio3130_downstream_info = {
.name = "xio3130-downstream",
.name = TYPE_XIO3130_DOWNSTREAM,
.parent = TYPE_PCIE_SLOT,
.class_init = xio3130_downstream_class_init,
.interfaces = (InterfaceInfo[]) {

View File

@ -0,0 +1,15 @@
/*
* TI X3130 pci express downstream port switch
*
* Copyright (C) 2022 Igor Mammedov <imammedo@redhat.com>
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
#ifndef HW_PCI_BRIDGE_XIO3130_DOWNSTREAM_H
#define HW_PCI_BRIDGE_XIO3130_DOWNSTREAM_H
#define TYPE_XIO3130_DOWNSTREAM "xio3130-downstream"
#endif