qemu/target
Peter Maydell 687f9f7834 MIPS patches queue
Various fixes:
 - Potential integer overflow (CID 1452921)
 - Invalid emulation of nanoMIPS BPOSGE32 opcode
 - Missing exception when DINSV opcode used with DSP disabled
 - Do not abort but emit exception for invalid BRANCH opcodes
 - TCG temporary leaks
 
 Housekeeping:
 - Remove dead code / comments
 - Restrict few files to TCG, declarations to sysemu
 - Merge MSA32 and MSA64 decodetree definitions
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Merge remote-tracking branch 'remotes/philmd/tags/mips-20210625' into staging

MIPS patches queue

Various fixes:
- Potential integer overflow (CID 1452921)
- Invalid emulation of nanoMIPS BPOSGE32 opcode
- Missing exception when DINSV opcode used with DSP disabled
- Do not abort but emit exception for invalid BRANCH opcodes
- TCG temporary leaks

Housekeeping:
- Remove dead code / comments
- Restrict few files to TCG, declarations to sysemu
- Merge MSA32 and MSA64 decodetree definitions

# gpg: Signature made Fri 25 Jun 2021 10:22:20 BST
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* remotes/philmd/tags/mips-20210625:
  target/mips: Merge msa32/msa64 decodetree definitions
  target/mips: Remove pointless gen_msa()
  target/mips: Optimize regnames[] arrays
  target/mips: Constify host_to_mips_errno[]
  target/mips: fix emulation of nanoMIPS BPOSGE32 instruction
  target/mips: Remove microMIPS BPOSGE32 / BPOSGE64 unuseful cases
  target/mips: Remove SmartMIPS / MDMX unuseful comments
  target/mips: Restrict some system specific declarations to sysemu
  target/mips: Move translate.h to tcg/ sub directory
  target/mips: Move TCG trace events to tcg/ sub directory
  target/mips: Do not abort on invalid instruction
  target/mips: Raise exception when DINSV opcode used with DSP disabled
  target/mips: Fix more TCG temporary leaks in gen_pool32a5_nanomips_insn
  target/mips: Fix TCG temporary leaks in gen_pool32a5_nanomips_insn()
  target/mips: Fix potential integer overflow (CID 1452921)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-06-28 09:44:42 +01:00
..
alpha hw/core: Constify TCGCPUOps 2021-05-26 15:33:59 -07:00
arm target/arm: Implement MTE3 2021-06-24 14:58:48 +01:00
avr hw/core: Constify TCGCPUOps 2021-05-26 15:33:59 -07:00
cris hw/core: Constify TCGCPUOps 2021-05-26 15:33:59 -07:00
hexagon hw/core: Constify TCGCPUOps 2021-05-26 15:33:59 -07:00
hppa tcg: Combine dh_is_64bit and dh_is_signed to dh_typecode 2021-06-19 08:51:11 -07:00
i386 TCI cleanup and re-encoding 2021-06-22 10:39:16 +01:00
m68k tcg: Combine dh_is_64bit and dh_is_signed to dh_typecode 2021-06-19 08:51:11 -07:00
microblaze hw/core: Constify TCGCPUOps 2021-05-26 15:33:59 -07:00
mips target/mips: Merge msa32/msa64 decodetree definitions 2021-06-24 16:48:08 +02:00
nios2 target/nios2: fix page-fit instruction count 2021-06-05 21:17:10 +02:00
openrisc hw/core: Constify TCGCPUOps 2021-05-26 15:33:59 -07:00
ppc tcg: Combine dh_is_64bit and dh_is_signed to dh_typecode 2021-06-19 08:51:11 -07:00
riscv target/riscv: gdbstub: Fix dynamic CSR XML generation 2021-06-24 05:00:12 -07:00
rx hw/core: Constify TCGCPUOps 2021-05-26 15:33:59 -07:00
s390x target/s390x: Use s390_cpu_{set_psw, get_psw_mask} in gdbstub 2021-06-21 08:48:21 +02:00
sh4 hw/core: Constify TCGCPUOps 2021-05-26 15:33:59 -07:00
sparc docs: fix references to docs/devel/tracing.rst 2021-06-02 06:51:09 +02:00
tricore hw/core: Constify TCGCPUOps 2021-05-26 15:33:59 -07:00
xtensa hw/core: Constify TCGCPUOps 2021-05-26 15:33:59 -07:00
meson.build Drop the deprecated unicore32 target 2021-05-12 18:20:52 +02:00